CN100481513C - 薄膜晶体管及其制备方法 - Google Patents

薄膜晶体管及其制备方法 Download PDF

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CN100481513C
CN100481513C CNB2005100813296A CN200510081329A CN100481513C CN 100481513 C CN100481513 C CN 100481513C CN B2005100813296 A CNB2005100813296 A CN B2005100813296A CN 200510081329 A CN200510081329 A CN 200510081329A CN 100481513 C CN100481513 C CN 100481513C
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CN1716635A (zh
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朴炳建
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Samsung Display Co Ltd
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Abstract

本发明公开了一种薄膜晶体管及其制备方法。该薄膜晶体管包括具有第一区域和第二区域的衬底、形成于第一区域和第二区域中的半导体层图案、形成于第一区域的半导体层图案的沟道区域上的第一栅极绝缘层图案。第二栅极绝缘层图案形成于衬底上，第一导电层图案形成于第一区域的沟道区域和第二区域的半导体层图案之上，层间绝缘层形成于衬底上。第二导电层图案形成于第一区域中和第二区域的第一导电层图案上。第一区域的第二导电层图案通过第二栅极绝缘层和层间绝缘层耦合至第一区域的半导体层图案。

Description

薄膜晶体管及其制备方法
技术领域
本发明涉及薄膜晶体管(TFT)及其制备方法，更特别的，本发明涉及这样的TFT及其制备方法，其中在电容器容量不降低的情形下使电容器的表面积减少。
背景技术
通常，比如有源矩阵有机发光显示器(OLED)的平板显示装置在每个像素中具有TFT，每个像素可以耦合到栅线、数据线以及电源线，并且其还包括电容器和有机发光二极管。多个导电层可以用来形成栅线、栅电极、数据线、源电极和漏电极、电源层、阳极电极等等。通过在导电层之间所设置的绝缘层中形成接触孔，然后掩埋该导电层，可以将这样的导电层电连接到其他每个元件。
图1是示出了传统有源矩阵OLED的平面视图。
参考图1，传统有源矩阵OLED可以包括多条栅线310、多条数据线320、多条电源线330，以及连接到这些栅线310、数据线320、电源线330的多个像素。
每个像素可以包括开关TFT和驱动TFT、电容器和发光二极管。开关TFT 370连接到栅线310和数据线320，驱动TFT 350驱动发光二极管360并连接到电源线330，电容器340保持驱动TFT 350的栅极-源极电压，发光二极管360发光来显示图像。
驱动TFT 350具有半导体层352，该半导体层352包括源极区和漏极区、栅电极354、分别通过接触孔连接到源极区和漏极区的源极电极356a和漏极电极356b。开关TFT 370可以具有同样的结构。
电容器340包括底电极344和顶电极346，底电极344连接到驱动TFT350的栅极并例如连接到开关TFT 370的漏极电极，顶电极346连接到电源线330并例如连接到驱动TFT 350的源极电极356a。像素电极361可以作为具有开口365的反光二极管的阳极，并且可以例如通过通路孔358连接到驱动TFT 350的漏极电极356b。
图2A和图2B是示出了根据传统方法形成TFT的序列的横截面视图。
参考图2A，缓冲层110可以形成于衬底100的整个表面上，而衬底100可以分为第一区域A和第二区域B。缓冲层110可以由预定厚度的二氧化硅制成，并且可以使用等离子体增强化学气相沉积(PECVD)方法形成。在该例中，缓冲层110可以防止来自衬底100的杂质渗入到缓冲层110之上的各层中。
接下来，预定厚度的非晶硅层(未示出)可以沉积在缓冲层110上。该非晶硅层然后可以被晶化，例如通过准分子激光退火(ELA)、连续横向固化(SLS)、金属诱导晶化(MIC)、金属诱导横向晶化(MILC)等，然后使用光刻方法构图由此在单位像素内的第一区域A和第二区B中形成多晶硅层图案120。
然后，第一栅极绝缘层130可以形成于衬底的整个表面上。在该情形中，第一栅极绝缘层130可以是由二氧化硅(SiO2)层或氮化硅(SiNx)层形成，并且其可以是约400到1000
Figure C200510081329D0006080946QIETU
厚。
然后可以在第一栅极绝缘层130上形成对应于晶体管沟道区域的光致抗蚀剂层图案(未示出)。使用该光致抗蚀剂层图案作为掩模，可以将杂质离子注入多晶硅层图案120中，从而在第一区域A的多晶硅层图案120中形成源极和漏极区122，以及在第二区域B的多晶硅层图案120中形成第一电极124，而第一电极124可以用作下电容器C1的底电极。然后，可以去除该光致抗蚀剂层图案。
接下来，第二栅极绝缘层132可以形成于第一栅极绝缘层130上。第二栅极绝缘层132可以由SiO2层或SiNx层形成，并且其可以是约200到800
Figure C200510081329D0006080946QIETU
厚。或者，第二栅极绝缘层132可以在如上所述的于多晶硅层图案120中注入杂质离子之前形成。
用于形成栅电极的金属层(未示出)可以形成于第二栅极绝缘层132上。该金属层可以由单层的钼(Mo)或比如钨钼(MoW)的合金、单层的铝(Al)或比如铝-钕(Al-Nd)的合金、或者包含这些金属的双层形成。使用光刻方法可以将该金属层蚀刻从而在第一区域A中形成栅电极134，在第二区域B中形成第二电极136，第二电极136可以被用作下电容器C1的顶电极。在该情形中，第二电极136可以被用作下电容器C1的顶电极，还可以用作上电容器C2的底电极。因此，堆叠结构d包括第一栅极绝缘层130和第二栅极绝缘层132，并可被用作下电容器C1的电介质层。
然后，可以在衬底的整个表面上形成预定厚度的层间绝缘层140。在该情形中，SiO2层和SiNx层可以堆叠来形成层间绝缘层140，其可以厚约3000到5000
Figure C200510081329D0006080946QIETU
。
参考图2B，层间绝缘层140、第一栅极绝缘层130和第二栅极绝缘层132可以由光刻方法蚀刻来形成分别显露源极和漏极区122的接触孔。
电极材料然后可以在包括接触孔的整个表面上形成，并使用光刻方法蚀刻来在第一区域A中分别形成连接到源极和漏极区122的源极电极150和漏极电极152，在第二区域B中形成用作上电容器C2的顶电极的第三电极154。在该情形中，该电极材料可以采用单层的Mo或比如MoW的合金、单层的Al或比如Al-Nd的合金、或者包含这些金属的双层。
然后可以在衬底的整个表面上形成预定厚度的钝化层160，其由比如SiNx层的无机绝缘层制备。
在制备具有上述结构的TFT的方法中，多晶硅层图案、栅极绝缘层和栅极电极被用作下电容器C1，而栅极电极、层间绝缘层和漏极电极可以被用作上电容器C2。下电容器C1和上电容器C2形成相同的区域中。下电容器C1具有两个栅极绝缘层作为电介质层，而上电容器C2具有层间绝缘层作为电介质层。因此，像素内的电容可能占用相当大的面积，并且在器件高度集成时可能需要大电容的电容器。但是，需要增加电容器的表面积来增加器电容量，这不可避免地导致有机发光显示器的开口率下降。
发明内容
本发明提供了一种TFT及其制备方法，其中，在不改变电容器电容量级的情形下通过部分减少使用双栅极绝缘层的有机发光显示器中的栅极绝缘层的厚度，电容器的表面积得以减少，由此增加了该有机发光显示器中的开口率。
本发明附加的特征将在随后的说明中阐述，并且将部分地从说明中变得清楚，或可以通过实践本发明来获得。
本发明公开了一种薄膜晶体管，其包括具有第一区域和第二区域的衬底、形成于第一区域和第二区域中的半导体层图案、形成于第一区域的半导体层图案的沟道区域上的第一栅极绝缘层图案。第二栅极绝缘层图案形成于衬底上，第一导电层图案形成于第一区域的沟道区域和第二区域的半导体层图案之上，层间绝缘层形成于衬底上。第二导电层图案形成于第一区域中和第二区域的第一导电层图案上。第一区域的第二导电层图案通过第二栅极绝缘层和层间绝缘层耦合至第一区域的半导体层图案。
本发明还公开了一种制备薄膜晶体管的方法，该方法包括：在衬底的第一区域和第二区域中形成多晶硅层图案，在衬底上形成第一栅极绝缘层，形成光致抗蚀剂层图案，以保护第一区域的多晶硅层图案的沟道区域，使用光致抗蚀剂层图案作为掩模，掺杂第一区域和第二区域的多晶硅层图案，以在第一区域中形成源极区和漏极区，并在第二区域中形成第一电极，使用光致抗蚀剂层图案作为掩模，蚀刻第一栅极绝缘层来形成第一栅极绝缘层图案，然后去除光致抗蚀剂层图案，在衬底上形成第二栅极绝缘层，在衬底的第一区域中形成栅电极，在衬底的第二区域中形成第二电极，在衬底上形成层间绝缘层，蚀刻层间绝缘层和第二栅极绝缘层来显露源极区和漏极区，以及形成分别耦合到源极区和漏极区的源电极和漏电极，并在第二区域中形成第三电极。
应该理解，全面概略的说明以及随后详细的描述都是示范性和说明性的，并且它们用来提供对所要求保护的发明的进一步的说明。
附图说明
附图被用来提供对本发明进一步的理解，并结合到说明书中构成其一部分，附图图示说明了本发明的实施例，而且与说明部分一道用来解释本发明的原理。
图1是示出了传统有机发光显示器的平面视图；
图2A和图2B是示出了根据传统方法形成TFT的序列的横截面视图；
图3A、3B、3C、3D、3E、3F和3G是示出了根据本发明的实施例形成TFT的工序的横截面视图。
具体实施方式
下面将详细地参考本发明的实施例，并且在附图中对本发明的示例进行图示，全文中相似的标记表示相似的元件。应当理解，当提及比如层、薄膜、区域或衬底的元件在另一元件“上”时，它可以直接位于其他元件之上，或者还可以中间元件存在。与此相反，当提及元件“直接”在另一元件“上”时，就没有中间元件存在。
图3A、3B、3C、3D、3E、3F和3G是示出了根据本发明的实施例形成TFT的序列的横截面视图，这可以被用来形成N型金属氧化物半导体(NMOS)TFT，PMOS TFT或互补MOS(CMOS)TFT。
参考图3A，缓冲层210可以形成于衬底200的整个表面上，衬底200可以分为第一区域A和第二区域B。缓冲层210例如可以由预定厚度的二氧化硅(SiO2)层形成，并且它可以例如使用等离子体增强化学气相沉积(PECVD)形成。在该情形中，缓冲层210可以防止来自衬底200的杂质渗入缓冲层210以上的层中。
接下来，预定厚度的非晶硅层(未示出)可以沉积在缓冲层210上。该非晶硅层然后可以被晶化，例如通过准分子激光退火(ELA)、连续横向固化(SLS)、金属诱导晶化(MIC)、金属诱导横向晶化(MILC)等。该非晶硅层然后可以使用例如光刻方法构图，由此在单位像素内的第一区域A和第二区B中分别形成多晶硅层图案220a和220b。
第一栅极绝缘层230然后可以形成于衬底的整个表面上。在该情形中，第一栅极绝缘层230例如可以由二氧化硅(SiO2)层或氮化硅(SiNx)层形成，并且其可以是约400到1000
Figure C200510081329D0006080946QIETU
厚，优选地为约800
Figure C200510081329D0006080946QIETU
。
参考图3B，对应于晶体管沟道区域的光致抗蚀剂层图案238然后可以形成于第一区域A中的第一栅极绝缘层230上。使用该光致抗蚀剂层图案238作为掩模，可以将杂质离子注入多晶硅层图案220a和220b中，从而形成源极和漏极区222a且可以用作电容器C1的底电极的第一电极222b。这里，可以使用n+杂质或p+杂质作为掺杂剂进行离子注入处理。当TFT是CMOS TFT时，n+杂质可以被注入到第一电极222b中。
参考图3C，使用该光致抗蚀剂层图案238作为掩模，可以对第一栅极绝缘层230进行蚀刻，来自晶体管的沟道区域之上形成第一栅极绝缘层图案231。
然后可以去除光致抗蚀剂层图案238。
或者，在具有轻掺杂的漏极(LDD)区的NMOS TFT的情形，第一栅极绝缘层图案231可以超出沟道区域延伸到LDD区。
参考图3D，第二栅极绝缘层232可以形成于衬底的整个表面上。第二栅极绝缘层232例如可以由SiO2层或SiNx层形成，并且其可以是约200到800
Figure C200510081329D0006080946QIETU
厚，优选的是由SiNx形成、厚约400
Figure C200510081329D0006080946QIETU
。
参考图3E，第一导电层(未示出)可以形成于第二栅极绝缘层232上。第一导电层例如可以是由单层的Mo或比如MoW的合金、单层的Al或比如Al-Nd的合金、或者包含这些金属的双层形成。例如可以使用光刻方法来蚀刻第一导电层以形成第一导电层图案，该第一导电层图案包括形成于第一区域A中的栅电极234和形成于第二区域B中的第二电极236。在该情形中，第二电极236可以被用作下电容器C1的顶电极，还可以用作上电容器C2的底电极。第一栅极绝缘层图案231和第二栅极绝缘层232可以用作栅极绝缘层d`，并且它们在第一区域A中可以是约600到1800
Figure C200510081329D0006080946QIETU
厚。此外，第二栅极绝缘层232可以被用作下电容器C1的介电层d``，并且在第二区域B中可以是约200到800
Figure C200510081329D0006080946QIETU
厚，优选为约400
Figure C200510081329D0006080946QIETU
。
参考图3F，然后，可以在衬底的整个表面上形成预定厚度的层间绝缘层240。层间绝缘层240例如可以由SiO2层形成，并可以厚约3000到5000
Figure C200510081329D0006080946QIETU
，优选为4000
Figure C200510081329D0006080946QIETU
。
参考图3G，例如可以使用光刻方法，将层间绝缘层240和第二栅极绝缘层232蚀刻来形成分别显露源极和漏极区222a的接触孔。
然后可以在包括接触孔的衬底的整个表面上形成第二导电层，并且例如使用光刻方法将其蚀刻来形成第二导电层图案，该第二导电层图案包括形成于第一区域A中的源极电极250和漏极电极252，以及形成于第二区域B中的第三电极254。源极电极250和漏极电极252可以分别耦合到源极和漏极区222a，并且第三电极254可以被用作上电容器C2的顶电极。这里，例如第二导电层可以由单层的Mo或比如MoW的合金、单层的Al或比如Al-Nd的合金、或者包含这些金属的双层制备。
然后，可以在衬底的整个表面上形成预定厚度的钝化层260，其由比如SiNx层的无机绝缘层制备。
电容器垂直形成于相同区域中，其中下电极C1和上电极C2如图3G所示形成。
同时，根据本发明实施例的电容器的表面积可以由如下的等式1表示：
【等式1】
A = C st ϵILD dILD + 1 dGI 1 ϵGI 1 + dGI 2 ϵGI 2
(ε是介电常数，d是介电层的厚度，Cst是电容值，ILD是层间绝缘层，GI1是第一栅极绝缘层，而GI2是第二栅极绝缘层)
并且，其中下电容器C1只具有第二栅极绝缘层232作为介电层(即，GI1＝0)，并且该电容器的表面积可以由如下的等式2表示：
【等式2】
A ′ = C st ϵILD dILD + ϵGI 2 dGI 2
当在上述条件下，像素包括五个晶体管和两个电容器时，电容器的表面积可以减少了约27％，并且像素所得到的开口率可以提高10％或更多。
此外，当像素包括两个晶体管和一个电容器时，电容器的表面积可以减少了约27％，并且像素所得到的开口率可以提高约2.7％或更多。
根据本发明的实施例，当制备使用双栅极绝缘层的OLED时，在TFT区域中的栅极绝缘层的厚度可以与电容器区域中的厚度不同。因此，栅电极的电特性可以得到维持，并且电容器的表面积可以在不改变电容器电容的情形下减少。电容器表面积的减少可以提高OLED的开口率，并且当增加电容器以降低漏电流时，增强开口率的效果还可以得到进一步提高。
对于本领域普通技术人员清楚的是，在不背离本发明精神或范围的情形下，可以对本发明进行各种修改和变化。因此应认为，如果本发明的这些修改和变化落入权利要求及其等同方案的范围之内，它们由本发明所覆盖。
本申请要求于2004年6月29日向韩国专利局提交的第10-2004-0049823号的韩国专利申请的优先权，并将该专利申请以全文引用方式结合于此。

Claims (19)

1、一种薄膜晶体管，包括：
衬底，具有第一区域和第二区域；
半导体层图案，形成于所述第一区域和第二区域中；
第一栅极绝缘层图案，形成于所述第一区域的半导体层图案的沟道区域上；
第二栅极绝缘层图案，形成于所述衬底上；
第一导电层图案，形成于所述第一区域的沟道区域和所述第二区域的半导体层图案之上；
层间绝缘层，形成于所述衬底上；
第二导电层图案，形成于所述第一区域中和所述第二区域的第一导电层图案上，
其中，所述第一区域的第二导电层图案通过所述第二栅极绝缘层和所述层间绝缘层耦合至所述第一区域的半导体层图案。
2、根据权利要求1的薄膜晶体管，其中所述半导体层图案是多晶硅层图案。
3、根据权利要求1的薄膜晶体管，其中所述第一区域的半导体层图案是沟道区、源极区和漏极区，并且所述第二区域的半导体层图案是下电容器的底电极。
4、根据权利要求1的薄膜晶体管，其中所述第一栅极绝缘层图案是由二氧化硅层和氮化硅层中任何一个形成的。
5、根据权利要求4的薄膜晶体管，其中所述第一栅极绝缘层图案厚400至
Figure C200510081329C00021
6、根据权利要求1的薄膜晶体管，其中所述第二栅极绝缘层图案由二氧化硅层和氮化硅层中任何一个形成。
7、根据权利要求6的薄膜晶体管，其中所述第二栅极绝缘层图案厚200至
Figure C200510081329C00022
8、根据权利要求1的薄膜晶体管，其中所述第一区域的第一导电层图案是栅电极，并且所述第二区域的第一导电层图案用作下电容器的顶电极并且还用作上电容器的底电极。
9、根据权利要求1的薄膜晶体管，其中所述第一区域的第二导电层图案是源极电极和漏极电极，并且所述第二区域的第二导电层图案是上电容器的顶电极。
10、一种制备薄膜晶体管的方法，包括：
在衬底的第一区域和第二区域中形成多晶硅层图案；
在所述衬底上形成第一栅极绝缘层；
形成光致抗蚀剂层图案，以保护所述第一区域的多晶硅层图案的沟道区域；
使用所述光致抗蚀剂层图案作为掩模，掺杂所述第一区域和所述第二区域的多晶硅层图案，以在所述第一区域中形成源极区和漏极区，并在所述第二区域中形成第一电极；
使用所述光致抗蚀剂层图案作为掩模，蚀刻所述第一栅极绝缘层来形成第一栅极绝缘层图案，然后去除所述光致抗蚀剂层图案；
在所述衬底上形成第二栅极绝缘层；
在所述衬底的第一区域中形成栅电极，在所述衬底的第二区域中形成第二电极；
在所述衬底上形成层间绝缘层；
蚀刻所述层间绝缘层和所述第二栅极绝缘层来显露所述源极区和所述漏极区；以及
形成分别耦合到所述源极区和所述漏极区的源电极和漏电极，并在所述第二区域中形成第三电极。
11、根据权利要求10的方法，其中所述第一电极是下电容器的底电极。
12、根据权利要求10的方法，其中所述第一栅极绝缘层图案由二氧化硅层和氮化硅层中任何一个形成。
13、根据权利要求12的方法，其中所述第一栅极绝缘层图案厚400到
Figure C200510081329C00031
4、根据权利要求10的方法，其中所述第二栅极绝缘层图案由二氧化硅层和氮化硅层中任何一个形成。
15、根据权利要求14的方法，其中所述第二栅极绝缘层图案厚200到
16、根据权利要求10的方法，其中所述第二电极是下电容器的顶电极和上电容器的底电极。
17、根据权利要求10的方法，其中所述第三电极是上电容器的顶电极。
18、一种包括权利要求1所述的薄膜晶体管的平板显示装置。
19、一种薄膜晶体管，包括：
衬底，具有第一区域和第二区域；
半导体层图案，形成于所述第一区域和第二区域中；第一导电层图案，形成于所述第一区域的半导体层图案的沟道区域上以及在所述第二区域的半导体层图案上；
第二导电层图案，形成于所述第一区域中和所述第二区域的第一导电层图案上；
其中，在所述第一区域的第一导电层图案和半导体层图案之间的第一间隙大于在所述第二区域的第一导电层图案和半导体层图案之间的第二间隙，
其中，所述第一间隙是由形成于所述沟道区域上的第一栅极绝缘层图案和形成于所述衬底上的第二栅极绝缘层图案形成，而所述第二间隙是由第二栅极绝缘层图案形成。
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