CN100472733C - 低k介电薄膜的后处理 - Google Patents

低k介电薄膜的后处理 Download PDF

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CN100472733C
CN100472733C CNB2005800127783A CN200580012778A CN100472733C CN 100472733 C CN100472733 C CN 100472733C CN B2005800127783 A CNB2005800127783 A CN B2005800127783A CN 200580012778 A CN200580012778 A CN 200580012778A CN 100472733 C CN100472733 C CN 100472733C
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dielectric constant
low dielectric
constant films
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CN1947229A (zh
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崔振江
约瑟芬·J·常
亚历山德罗斯·T·迪莫斯
瑞泽·阿扎维尼
德里克·R·威蒂
海伦·R·阿默
吉利士·A·迪克西特
希琴曼·麦萨迪
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Applied Materials Inc
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Abstract

本发明提供一种在衬底上沉积低介电常数薄膜并后处理该低介电常数薄膜的方法。该后处理包括将该低介电常数薄膜快速加热至所需高温并接着将该低介电常数薄膜快速冷却，从而使该低介电常数薄膜暴露在该所需高温约5秒或更少。在实施方案中，该后处理还包括将该低介电常数薄膜暴露在电子束处理和/或UV辐射中。

Description

低K介电薄膜的后处理
技术领域
本发明的实施方式涉及集成电路的制造。更明确而言，本发明的实施方式涉及用于沉积及后处理低介电常数薄膜的工序。
背景技术
从数十年前半导体组件首次提出以来，半导体组件几何结构在尺寸上已显著地降低。从当时起，集成电路大致依循着两年/尺寸减半的准则(常称为摩尔定律)，其表示每过两年芯片上的组件数目便会倍数增加。现今制造设备可固定地生产具0.13μm甚至0.1μm特征尺寸的组件，而未来设备很快将可生产出几何结构更小的组件。
为进一步缩小集成电路上的组件尺寸，现已需要使用低电阻的导电材料以及低介电常数(k)的绝缘体以降低邻近金属线间的电容耦合。近来在低介电常数绝缘薄膜的发展已将重心放在将硅(Si)、碳(C)及氧(O)原子混入薄膜中。此领域的一大挑战是开发出含Si、C及O原子的薄膜，从而使该膜薄膜具有低k值并展现所需的热及机械特性。通常含Si、C及O原子且具有所需介电常数的薄膜的机械强度较差，且于随后工序期间容易受到蚀刻化学物及等离子暴露的损伤，使集成电路失效。
热及等离子退火工序已开发出可改善低介电常数薄膜的特性。热及等离子退火工序通常在约低于400℃的温度下实施，以避免损伤沉积有低介电常数薄膜的衬底或器件上的其它元件。现已发现热及等离子退火工序可密化(densify)含Si、C及O原子的低介电常数薄膜。然而，前述退火工序通常实施约30分钟至2小时，且因此会明显增加衬底处理时间。同样的，业界仍持续需要对低介电常数薄膜的机械及介电特性的改善。
因此，需要低介电常数薄膜的后处理方法，以期能改善低介电常数薄膜的特性。
发明内容
本发明的实施方式涉及一种处理衬底的方法，包括：在RF电源下在衬底上沉积包含硅及碳的低介电常数薄膜，并通过下述工序后处理该经沉积的低介电常数薄膜，所述工序包括：以至少约10℃/秒的速率将该低介电常数薄膜加热到至少约600℃的所需温度，其中该低介电常数薄膜维持在该所需温度约5秒或更少，以及以至少约10℃/秒的速率冷却该低介电常数薄膜。在一实施方式中，加热该低介电常数薄膜的起始至冷却该低介电常数薄膜的终了的时间长度一般在0.5分钟至5分钟。
在一实施方式中，该低介电常数薄膜从在约25℃至约250℃之间的温度加热至在约600℃至约1000℃之间的所需温度，其中该低介电常数薄膜在该所需温度下加热约5秒或更少，并然后从该所需温度进行冷却，其中加热该低介电常数薄膜的起始至冷却该低介电常数薄膜的终了的时间长度一般在0.5分钟至5分钟。
本发明的另一实施方式包括通过以至少约10℃/秒的速率将该低介电常数薄膜加热至所需温度以后处理低介电常数薄膜，其中该低介电常数薄膜维持在该所需温度约5秒或更少，并以至少约10℃/秒的速率冷却该低介电常数薄膜，并以选自电子束处理及UV辐射处理的一个或多个工序处理该低介电常数薄膜。
附图说明
通过本发明上述简述的详细、明确的叙述并参照实施方式及附图所示可以理解本发明前述的特征。然而应注意的是，附图所示仅为本发明的一般实施方式，因此不应视为限制本发明的范围，本发明范围不包括其它等效实施方式。
图1所示示例性CVD反应器的截面图，其配置为根据本文所述实施方式使用；
图2所示根据本发明一实施方式的快速热处理(RTP)腔室的一部份的示意性垂直截面图；以及
图3所示为根据本发明实施方式的电子束腔室。
具体实施方式
本发明的一或多个实施方式提供一种方法，其包含在衬底上沉积低介电常数薄膜以及并对该低介电常数薄膜进行后处理，而该后处理通过一工序进行，该工序包括：快速加热该低介电常数薄膜至所需高温(例如从约600℃至约1000℃)；以及接着快速冷却该低介电常数薄膜；该介电常数薄膜暴露在该所需高温约5秒或更少。优选的，该低介电常数薄膜暴露在该所需高温约1秒或更少。在一实施例中，该快速加热及快速冷却该低介电常数薄膜的工序是一瞬间(spike)退火工序。
沉积低介电常数薄膜
该低介电常数薄膜的介电常数约小于4，且包含硅及碳，较佳则包含氧。该低介电常数薄膜是在RF电源下由至少包含一种或多种有机硅化物的混合物所沉积。该一种或多种用于沉积低介电层的有机硅化物为有机硅烷(organosilane)、有机硅氧化物(organosiloxanes)或其结合物。此处所用的术语“有机硅化物(organosilicon compound)”意指为有机基团中含有碳原子的化合物，且其可为环状或链状。有机基团可包括烷基、烯基、环已烯基、以及除其功能性衍生物外的芳基。优选地，该有机硅化物包括一个或多个接于硅原子的碳原子，以使碳原子不会在适当工序条件下通过氧化而快速移除。该有机硅化物优选地也包括一个或多个氧原子。
合适的环状有机硅化物包括具有三个或更多硅原子的环状结构，及选择性地包括一个或多个氧原子。商业可得的可用环状有机硅化物包括具有数个硅及氧原子交替的环，其中该硅原子与一或两个烷基相键结。一些示例性的环状有机硅化物包括：
2，4，6-硅代环己烷                    -(-SiH2CH2-)3-    (环状)
1，3，5，7-四甲基环四硅氧烷(TMCTS)    -(-SiHCH3-O-)4-   (环状)
八甲基环四硅氧烷(OMCTS)               -(-Si(CH3)2-O-)4- (环状)
1，3，5，7，9-五甲基环五硅氧烷        -(-SiHCH3-O-)5-   (环状)
1，3，5，7-硅代-2，6-氧代环辛烷       -(-SiH2CH2-SiH2-O-)2-  (环状)
六甲基环三硅氧烷                      -(-Si(CH3)2-O-)3-  (环状)
合适的直链有机硅化物包括具有直链或分支结构(具一或多个硅原子及一或多个碳原子)的脂肪族有机硅化物。该有机硅化物还可包含一个或多个氧原子。一些示例性的直链有机硅化物包括：
甲基硅烷                       CH3-SiH3
二甲基硅烷                     (CH3)2-SiH2
三甲基硅烷                     (CH3)3-SiH
乙基硅烷                       CH3-CH2-SiH3
二硅烷基甲烷                   SiH3-CH2-SiH3
双(甲基硅烷基)甲烷             CH3-SiH2-CH2-SiH2-CH3
1，2-二硅烷基乙烷              SiH3-CH2-CH2-SiH3
1，2-双(甲基硅烷基)乙烷        CH3-SiH2-CH2-CH2-SiH2-CH3
2，2-二硅烷基丙烷              SiH3-C(CH3)2-SiH3
二乙基硅烷                     (C2H5)2-SiH2
丙基硅烷                       C3H7-SiH3
乙烯基甲基硅烷                 (CH2＝CH)-SiH2-CH3
1，1，2，2-四甲基二硅烷        (CH3)2-SiH-SiH-(CH3)2
六甲基二硅烷                   CH3)3Si-Si-(CH3)3
1，1，2，2，3，3-六甲基三硅烷  (CH3)2-SiH-Si(CH3)2-SiH-(CH3)2
1，1，2，3，3-五甲基三硅烷     (CH3)2-SiH-SiH(CH3)-SiH-(CH3)2
1，3-双(甲基硅烷基)丙烷        CH3-SiH2-(CH2)3-SiH2-CH3
1，2-双(二甲基硅烷基)乙烷      (CH3)2-SiH-(CH2)2-SiH-(CH3)2
1，3-双(二甲基硅烷基)丙烷      (CH3)2-SiH-(CH2)3-SiH-(CH3)2
二乙氧甲基硅烷基(DEMS)         CH3-SiH-(O-CH2-CH3)2
1，3-二甲基二硅氧烷            CH3-SiH2-O-SiH2-CH3
1，1，3，3-四甲基二硅氧烷      (CH3)2-SiH-O-SiH-(CH3)2
六甲基二硅氧烷(HMDS)           (CH3)3-Si-O-Si-(CH3)3
1，3-双(硅烷基甲撑)二硅氧烷    (SiH3-CH2-SiH2-)2-O
双(1-甲基二硅氧烷基)甲烷       (CH3-SiH2-O-SiH2-)2-CH2
2，2-双(1-甲基二硅氧烷基)丙烷  (CH3-SiH2-O-SiH2-)2-C(CH3)2
二甲基二甲氧基硅烷(DMDMOS)          (CH3O)2-Si-(CH3)2
苯基二甲氧基硅烷                    C6H5-SiH-(O-CH3)2
二苯基甲基硅烷                      (C6H5)2-SiH-CH3
二甲基苯硅烷                        (CH3)2-SiH-C6H5
二甲氧基甲基乙烯基硅烷(DMMVS)       (CH3O)2-Si(CH3)-CH2＝CH3
在一实施方式中，该低介电常数薄膜是在RF电源下由包含一种或多种有机硅化物及一种或多种氧化气体的混合物中所沉积。可使用的氧化气体包括氧气(O2)、臭氧(O3)、一氧化二氮(N2O)、一氧化碳(CO)、二氧化碳(CO2)、水(H2O)、二甲基代乙二醛(2，3-butane dione)或其结合物。当使用臭氧作为氧化气体时，臭氧产生器可将气体源中重量6％至20％(一般约15％)的氧气转换为臭氧，而剩余仍为氧气。然而，臭氧浓度可依据所需臭氧的量、以及所用臭氧产生设备的类型增加或减少。氧气或含氧化合物的解离可在进入沉积室之前在微波腔室内进行，以降低含硅化合物的过量解离。优选地，可施加射频(RF)电源至反应区以增加解离量。
亦可选择的是，除该一种或多种有机硅化物及该选择性的一种或多种氧化气体外，混合物中也可包括一种或多种碳氢化合物以沉积低介电常数薄膜。可使用的碳氢化合物包括具有从约1至20个邻接碳原子的脂肪族碳氢化合物。该碳氢化合物可包括数个通过单键、双键及三键的任一结合而键结的邻接碳原子。例如，有机化合物可包括具有两个至约20个碳原子的烯烃基及亚烃基，例如乙烯、丙烯、乙炔及丁二烯。
也可使用一种或多种具有环状团的碳氢化合物。此处所用的术语“环状团(cyclic group)”意指为环形结构。该环形结构可包含仅三个原子。该原子可包括，例如碳、硅、氮、氧、氟及其结合物。该环状团可包括一个或多个单键、双键、三键及其任一结合。例如，环状团可包括一个或多个芳香烃、芳基、苯基、环已烷基、环己二烯基、环庚二烯基、及其组合。该环状团可为双环或三环。此外，该环状团优选地为键结至直链或分支官能基团。该直链或分支官能基团优选地包含烷基或烷基乙烯基团，且具有约1个至20个碳原子。该直链或分支官能基团也可包括氧原子，例如酮、醚及酯类。一些具有至少一个环状团的示例性碳氢化合物包括松油烯(alpha-terpinene，ATP)、乙烯基环已胺(vinylcyclohexane，VCH)及乙酸苯酯(phenylacetate)。
亦可选择的是，该混合物中也可包括一种或多种用于沉积低介电常数薄膜的运载气体。可使用的运载气体包括氩、氦、二氧化碳及其组合。
该薄膜也可利用任何化学气相沉积腔室进行沉积。图1所示为可使用的平行板式CVD工序腔室10的截面图。该腔室10包括高真空区15及气体散流歧管11，该气体散流歧管11具有数个穿孔用以散布工艺气体至衬底(未示出)。该衬底置于衬底支撑板或基座12上。该基座12安装在支撑杆13上，而该支撑杆13将该基座12连接至提升电机14。该提升电机14可将该基座12升举及降低于处理位置及较低的衬底装载位置，以使基座12(及该支撑在基座12上表面上的衬底)在较低的装载/卸载位置及较高的处理位置(相当接近该歧管11)之间控制地移动。当该基座12及该衬底位于较高处理位置时，绝缘体17环绕该基座12及该衬底。
引入歧管11的气体均匀地径向分布在衬底表面。具有节流阀的真空泵32可经由歧管24控制来自该腔室10的气体的排气速率。若需要时，沉积物及运载气体可流经气体线18进入混合系统19并接着至该歧管11。一般而言，各工艺气体供应线18包括(i)安全关闭阀(未示出)，可用以自动或手动地关闭流进腔室的工艺气体，以及(ii)质量流量控制器(亦未示出)，用以测量流经气体供应线18的气体。当工序中使用有毒气体时，通常配置中各气体供应线18上设置数个安全关闭阀。
在一实施例中，有机硅化物以用于200或300mm衬底的流率(约100sccm至约10000sccm)引入该混合系统19。该选择性碳氢化合物以约100sccm至约1000sccm的流率引入该混合系统19。该选择性使用的氧化气体流率约为100sccm至约6000sccm。该运载气体流率约为100sccm至约5000sccm。在一优选实施方式中，该有机硅化物为八甲基环四硅氧烷(OMCTS)，而该碳氢化合物为乙烯。
该沉积工序优选地为等离子增强型工序。在等离子增强型工序中，受控的等离子一般通过施加(利用RF电源25)至气体散流歧管11的RF能量形成在该衬底邻近处。或者，RF电源可提供至基座12。至该沉积腔室的RF电源可为周期式或脉冲式，以降低衬底受热并促进沉积薄膜的多孔性。用于200mm或300mm衬底的等离子的功率密度在约0.03W/cm2至约3.2W/cm2之间，该值与用于200mm衬底时约10瓦至约1000瓦的RF功率水平相对应，并与用于300mm衬底时约20瓦至约2250瓦的RF功率水平相对应。优选地，用于300mm衬底的RF功率水平约为200瓦至约1700瓦。
RF电源25可提供在约0.01MHz至300MHz之间的单频率RF电源。优选地，该RF电源可利用混合、同步频率作传送以增加引入高真空区域15的反应物的分解。在一方面，该混合频率为约12kHz的低频及约13.56mHz的高频的混合频率。于另一方面中，该低频范围在约300Hz至约1000kHz之间，而该高频范围在约5mHz及约50mHz之间。优选地，该低频功率水平为150瓦。优选地，该高频功率水平在约200瓦至约750瓦之间，且更优选地在约200瓦至约400瓦。
在沉积期间，该衬底保持在从约-20℃至约500℃之间的温度，并优选地在从约100℃至约450℃之间。该沉积压力一般在约1Torr至约20Torr之间，并优选地在约4Torr至约7Torr之间。下文将详述依据此处所述实施方式中可用于沉积低介电常数层的示例性腔室。
当需要远程分解氧化气体时，可选择使用的微波腔室28在气体进入处理腔室10之前先将在约50瓦至约6000瓦间的电源输入至该氧化气体。该附加的微波电源可避免有机硅化物在与氧化气体反应之前发生过量分解。在微波电源加至氧化气体时，具有分别用于有机硅化物及氧化气体的通道的气体散流板(未示出)为优选的。
一般而言，该腔室内衬、散流歧管11、基座12及各种其它反应器硬件中任一或全部由诸如铝或电镀铝的材料制成。上述CVD反应器的实施例描述于授予Wang等人并转让给应用材料公司(本发明的受让人)的美国专利案第5,000,113号，标题为“AThemal CVD/PECVDReactor and Use for Thermal Chemical VaporDeposition of Silicon Dioxideand In-situ Multi-step Planarized Process”中，在将其全文与本发明范围相符部分结合进来以供参考。
系统控制器34可控制电机14、气体混合系统19及高频电源25，其等系藉控制线36相连接。系统控制器34可控制该CVD反应器的动作，并且一般包括硬盘驱动器、软盘驱动器及插件架(card rack)。该插件架包含单板式计算机(single board computer，SBC)、模拟及数字输入/输出板、接口板以及步进电机控制板。系统控制器34符合总线模块欧式卡(Versa Modular Europeans，VME)标准，该标准定义了主板、插件架(card cage)以及连接器尺寸及类型。该VME标准还定义了具有16位数据总线及24位地址总线的总线结构。系统控制器34在存储在硬盘驱动器38上的计算机程序的控制下运行。
此处所述的该低介电常数薄膜可利用存储有软件例程的计算机存储介质进行沉积，其中当执行该软件例程时可使通用计算机控制沉积腔室。该软件例程包含用于根据这里所述的任意实施方式沉积任何薄膜的数个指令。
后处理低介电常数薄膜
在该低介电常数薄膜沉积后，该通过下述工序对低介电常数薄膜进行后处理，该工序包括将该低介电常数薄膜快速加热致所需高温，并接着将其快速冷却。该所需高温在约600℃至约1000℃，例如约800℃。优选地，该低介电常数薄膜由从约25℃至约250℃的温度，以至少约10℃/秒的速率加热至该所需高温。例如，该低介电常数薄膜可以约10℃/秒至约300℃/秒的速率加热。优选地，该低介电常数薄膜以从约100℃/秒至约300℃/秒的速率(例如约250℃/秒)作加热。在该低介电常数薄膜达该所需高温后，关闭该用于加热该低介电常数薄膜的热源(群)，并以至少约10℃/秒(例如从约10℃/秒至约100℃/秒有速率)冷却该低介电常数薄膜。该低介电常数薄膜的冷却可以通过在该后处理工序室中设反射板的方式增强。优选地，该冷却速率可以通过该后处理工序室中的反射板、以及通过将该衬底(其上沉积有该低介电常数薄膜)背侧暴露在惰性气体(如氦气)流等两种方式来增强。例如，该衬底背侧可暴露在流率在约10sccm至约500sccm的氦气。由于对该低介电常数薄膜进行快速加热及快速冷却，该加热低介电常数薄膜的起始至冷却该低介电常数薄膜的终了的时间长度一般在约0.5分至约5分钟。
通常，该低介电常数薄膜在腔室氛围下进行加热及冷却，该氛围可能包括氩气(Ar)、氮气(N2)、氦气(He)、氧气(O2)、氢气(H2)、水蒸气(H2O)、一氧化二氮(N2O)或其组合。该腔室压力可在约100Torr至约760Torr之间。该腔室压力可经调整以改变该低介电常数薄膜的冷却速率。
在一实施方式中，该低介电常数薄膜在氩气环境下进行加热及冷却。在一实施方式中，氩气是以在约10sccm至约100sccm的速率引入该腔室中。
任何能够以约5秒或更少的时间(较佳为1秒或更少)将低介电常数薄膜快速加热至所需高温、并接着将其快速冷却的腔室均可用于后处理该低介电常数薄膜。下面将详细说明这里所述的可用于后处理低介电常数薄膜的示例性腔室。
一种可使用的腔室为RadianceTMRTP腔室，其可从加州圣塔克拉拉应用材料公司购得。图2所示为腔室200，其为该RadianceTMRTP腔室的一实施方式。图2所示的腔室200包括由侧壁214及底壁215围住的处理区213。该腔室200的侧壁214上部通过O形环216密封至窗口248。
衬底或晶片261在其边缘通过支撑环262(一般由碳化硅制成)支撑在处理区213内。支撑环262安装在一可转式石英柱263上。通过可转式石英柱263，支撑环262及衬底261可因而旋转。也可使用额外的碳化硅转接环以可以处理不同尺寸的晶片(例如150mm、200mm及300mm)。支撑环262外缘优选地由衬底261外径延伸不超过2英寸。对300mm系统而言，腔室200容积大约为9公升。
腔室200包括贯穿侧壁214形成的进气口269，用以将工艺气体注入处理区213内以使不同处理步骤可在处理区213内实施。位于进气口269对侧上(即侧壁214处)的为排气口268。排气口268耦接至真空源286(例如泵)，以将工艺气体排出腔室200并降低腔室200中的压力。在工序期间该真空源286维持所需的压力，同时将工艺气体送入该腔室中。
辐射能组件218位于该窗口248上方。该辐射能组件218包括数个卤钨灯灯组219(例如Sylvania EYT灯)，其各安装至光导管221中且光导管可为不锈钢、金、铜、铝或其它金属。灯组219包括缠绕成为线圈的灯丝，其轴平行于该灯套(lamp envelope)的轴。绝大多数的光线会垂直于该轴发散至周围光导管221的壁。该光导管长度经选择以至少与相关的灯组等长。该光导管221可较长以使触及衬底的能量不会因增加的反射而实质减弱。该灯组219以六角形阵列或蜂巢形方式设置。灯组219设置为足以覆盖衬底261及支撑环262的整个表面积。根据该工艺所需，灯组219(其可能在几百的数量级)聚集在一区中，以可独立地控制从而提供相当均匀或不均匀的衬底261加热。
该辐射能组件218至少包含数个光导管221及相关灯组219，以使薄窗口248可提供光端口，用于加热该排真空工序腔室内的衬底。该窗口248的主要目的是将工艺环境与灯组219隔绝，避免灯组过热而与工艺气体反应。光导管221通过在各种热导管间流动冷却剂(例如水)的方式进行冷却。
虽然前述的辐射能组件218包括数个卤钨灯灯组219，然于另一实施方式中，该辐射能组件218包括紫外光灯。
腔室200的底壁215包括上表面211，用于反射衬底261背侧上的能量。此外，腔室200包括数个光学温度探针270，贯穿腔室200底壁215设置以检测衬底261表面数个位置的温度。硅衬底261及反射表面211间的反射会形成黑体腔(blackbody cavity)，使温度检测不受晶片背侧发散影响，并提供正确温度测量能力。
在一实施方式中，该反射表面211呈吸收反射板形式，反射0.7至0.96nm的波长，并以反射该该辐射能组件218发散的另一波长。该反射板的吸收特性可提高低介电常数薄膜的冷却速率。该低介电常数薄膜的冷却速率通过将该衬底(其上沉积有该低介电薄膜)背侧暴露在惰气流的方式进一步提高，例如通过将惰性气体引至该反射板边缘周围或通过孔洞(设于反射板中)而至衬底背侧。
腔室200的各方面由控制系统(未示出)所操作。该控制系统可包括任何数量的控制器、处理器及输入/输出装置。在一实施例中，该控制系统为封闭回路反馈系统的组件，其可监控该工序腔室200内的各种参数，同时处理衬底，并接着送出一个或多个控制讯号以依据各种设定值作必要调整。一般而言，被监控的参数包括温度、压力及气流速率。
在又一实施方式中，后处理该低介电常数薄膜的步骤包括将该低介电常数薄膜快速加热至一所需高温，并将该低介电常数薄膜从该所需高温快速冷却，并用电子束处理对该低介电常数薄膜进行处理。该低介电常数薄膜可在该快速加热及快速冷却前或后用电子束处理进行处理。
该电子束(e-beam)处理一般剂量在约1至20千伏(KeV)下，在从每平方公分50至约2000微库伦(μc/cm2)之间。该电子束电流一般在约1mA至约40mA，且优选为约1至约20微米。该电子束电流一般在约1mA至约40mA，而优选在约1mA至约20mA。该电子束处理一般在约室温至约450℃之间的温度下实施约10秒至约15分钟。在一实施方案中，该电子束处理条件包括6kV、10-18mA及50μc/cm2以350℃处理约15至约30秒，以处理厚度约1微米的薄膜。在另一实施方案中，该电子束处理条件包括4.5kV、10-18mA及50μc/cm2以350℃处理约15至约30秒，以处理厚度约
Figure C200580012778D0014144512QIETU
的薄膜。在该电子束处理期间可使用氩气及氢气。虽然可使用任一种电子束装置，但示例性装置为EBK腔室，其可从应用材料公司商业购得。在低介电常数薄膜沉积后，用电子束处理该低介电常数薄膜会挥发该薄膜中至少一些有机基团，并因此在薄膜中形成孔洞。
图3所示为依据本发明的一实施方式的电子束处理器300。该电子束处理器300包括真空室320、大面积阴极322、位于无场区(field free)338中的靶材面330以及网状阳极326(设于该靶材面330及该大面积阴极322间)。该电子束腔室300还包括高压绝缘体324及加速场区336(其可将该网状阳极326由大面积阴极322隔绝出)、阴极覆盖绝缘体328(位于该真空室320内)、可变簧片阀332(用以控制该真空室320内的压力)、可变高压电源329(连接至该大面积阴极322)以及可变低压电源331(连接至该网状阳极326)。
在操作中，其上具有欲暴露在电子束的低介电常数薄膜的衬底(未示出)置于该靶材面330上。该真空室320从常压抽真空至范围约1mTorr至约200mTorr的压力。该确切压力由可变速率簧片阀332控制，其可将压力控制至约0.1mTorr。该电子束一般是在足够高压下产生，并且通过高压电源329施加至大面积阴极322。电压范围在约500伏特至约30000伏特或更高。该高压电源329可为纽约州Bertan of Hickville公司所制造的Bertan Model#105-30R电源、或纽约州Spellman High Voltage Electronics Corp.，of Hauppauge公司所制造的Spellman Model#SL30N-1200X258电源。该可变低压电源331可施加电压至该网状阳极326，其相对于施加至该大面积阴极322的电压为正值(positive)。此电压用于控制自该大面积阴极322的电子发射。该可变低压电源331可为Acopian of Easton，Pa公司所上市的Acopian Model#150PT12电源。
该电子束腔室300的其它细节则描述于授予William R.Livesay等人的美国专利案第5,003,178号，发明名称为“Large-Area Uniform Electron Source”，其受让给Electron Vision Corporation公司(目前由本发明的受让人所拥有)且在此将其全文与本发明相符部分结合进来以供参考。
在另一实施方式中，后处理该低介电常数薄膜的步骤包括将该低介电常数薄膜快速加热至所需高温、将该低介电常数薄膜从该所需高温快速冷却及以紫外线(UV)辐射处理该低介电常数薄膜。优选地，该低介电常数薄膜以UV辐射处理，同时对该低介电常数薄膜施予至少一部份快速加热和/或冷却处理。然而，该低介电常数薄膜也可在快速加热及冷却该低介电常数薄膜之前或之后以UV辐射作处理。优选地，在快速加热及冷却低介电常数薄膜之前或之后以UV辐射处理低介电常数薄膜的实施方式中，在UV辐射期间该低介电常数薄膜是以在约200℃至约600℃间的温度加热。例如，该低介电常数薄膜可暴露于腔室中的UV辐射下，例如具有UV源的高温炉中。在UV辐射处理期间，该腔室可为真空或常压氛围。
该低介电常数薄膜可暴露在一种或多种UV辐射波长中。腔室的实施例及可将该低介电常数薄膜暴露在UV辐射下的方法公开在美国专利第6,614,181号，共同转让给本申请受让人，并且在此引用全文以供参考。
在另一实施方式中，该低介电常数薄膜通过包括下述步骤的方法进行后处理：将该低介电常数薄膜快速加热及冷却、以UV辐射处理该低介电常数薄膜及用电子束处理该低介电常数。该后处理工序可以任何顺序进行。然而，优选地根据这里所述本发明的实施方式通过对该低介电常数薄膜进行快速加热及冷却并且同时UV辐射该低介电常数薄膜然后以电子束处理该低介电常数薄膜进行后处理。
包括快速加热及快速冷却低介电常数薄膜并UV辐射和/或用电子束处理该低介电常数薄膜的后处理可提高低介电常数薄膜的特性。例如，包括快速加热和冷却以及UV辐射的后处理能够降低沉积薄膜的介电常数。包括快速加热及快速冷却及任意的UV辐射的后处理能够降低该沉积薄膜的介电常数，并增加薄膜硬度及模数(modulus)。
在前述任一实施方式中，该低介电常数薄膜可在集成的处理系统(例如应用材料公司出售的
Figure C200580012778D00161
或
Figure C200580012778D00162
机台)内进行沉积及后处理。因此，该低介电常数薄膜可在无需暴露至大气下的方式进行沉积及后处理。在实施超过一种后处理工序的实施方式中，该低介电常数薄膜在不同后处理工序间可受保护免受大气影响。例如，在另一腔室中快速加热及冷却及选择性实施的UV辐射后，该低介电常数薄膜可送至电子束腔室，而无需在快速加热及快速冷却与电子束处理之间暴露在大气中。
下述的实施例将说明处理其上沉积有低介电常数薄膜沉积的衬底的方法。该薄膜利用应用材料公司出售的
Figure C200580012778D00163
CVD腔室沉积在300mm衬底上。
对照例1
包含硅、碳及氧的低介电常数薄膜是由包含八甲基环四硅氧烷(OMCTS)、三甲基硅烷以及乙烯的气体混合物沉积在衬底上。该OMCTS以约520sccm的流率引入腔室中，该三甲基硅氧烷是以300sccm引入该腔室中，且该乙烯以约2200sccm的流率引入该腔室。氦气以约1000sccm的流率引入腔室中，而氧气系以约1000sccm的流率引入腔室。该薄膜利用频率为13.56MHz、800瓦RF电源在400℃、5.7Torr的压力下沉积约20秒。当沉积时，该低介电常数薄膜厚度为
Figure C200580012778D0017144631QIETU
介电常数(k)为2.77，且硬度为0.59gPa。
对照例2
低介电常数薄膜以对照例1中所述方式沉积在衬底上。该低介电常数薄膜在800℃的温度下进行热退火处理1分钟的方式进行后处理。当沉积时，该低介电常数薄膜厚度为。在该后处理后，该低介电常数薄膜厚度为(收缩了12.2％)。在该后处理后，该低介电常数薄膜的介电常数(k)为3.35，且硬度为1.82gPa。
对照例3
低介电常数薄膜以对照例1所述沉积衬底上。该低介电常数薄膜通过3mA电流并且在温度400℃、电压4.5kV下且剂量为100μc/cm2的电子束处理进行后处理。当沉积时，该低介电常数薄膜厚度为
Figure C200580012778D0017144727QIETU
。在该后处理后，该低介电常数薄膜厚度为
Figure C200580012778D0017144749QIETU
(收缩了6.1％)。在该后处理后，该低介电常数薄膜的介电常数(k)为2.74，且硬度为1.14gPa。
实施例1
低介电常数薄膜以对照例1所述方式沉积在衬底上。该低介电常数薄膜在RadianceTM RTP腔室中由室温快速加热至800℃并立即快速冷却至120℃，从而以在30秒内加热及冷却该低介电常数薄膜的方式进行后处理。当沉积时，该低介电常数薄膜厚度为
Figure C200580012778D0017144809QIETU
。在该后处理后，该低介电常数薄膜厚度为
Figure C200580012778D0017144821QIETU
(收缩了0.3％)。在该后处理后，该低介电常数薄膜的介电常数(k)为2.53，且硬度为0.62gPa。
实施例2
低介电常数以对照例1所述方式沉积在衬底上。该低介电常数薄膜在RadianceTMRTP腔室中由室温快速加热至800℃并且立即快速冷却至120℃，从而以在30秒内加热及冷却该低介电常数薄膜的方式进行后处理。当沉积时，该低介电常数薄膜厚度为
Figure C200580012778D0018144844QIETU
。在该后处理后，该低介电常数薄膜厚度为
Figure C200580012778D0018144852QIETU
(收缩了0.3％)。在该后处理后，该低介电常数薄膜的介电常数(k)为2.44。
实施例1及实施例2均说明在依据此处所述实施方式以快速加热及快速冷却该低介电常数薄膜的方式后处理该低介电常数薄膜会使薄膜的介电常数较未作后处理的薄膜、或以电子束处理或传统退火处理进行后处理的薄膜者更低。以此处所述的后处理处置的薄膜通过对其进行后处理，使致孔剂(porogens，例如有机基团)由低介电常数薄膜中释出的方式达到低介电常数。
实施例1更证明依据此处所述实施方式快速加热及冷却该低介电常数薄膜并不会对沉积薄膜的硬度造成影响。该实施例还表明依据此处所述实施方式所进行的低介电常数薄膜后处理，其相较于其它后处理工序所导致的收缩更低。
因此，本发明的该实施方式提供一种低介电常数薄膜的后处理方法，以在不降低该薄膜硬度的情况下降低其介电常数，并使因后处理造成的收缩减至最小。本发明实施方式中快速加热及冷却后处理的其它优点包括可因快速的后处理工序而使衬底产量较高，并降低依据本发明实施方式处理的衬底的热平衡。
虽然前文所述是本发明的实施方式，然而在不脱离本发明基本范围的情况下还可以设计本发明的其它及进一步的实施方式，而本发明范围所附权利要求书确定。

Claims (19)

1.一种处理衬底的方法，包括：
在射频电源下在衬底上沉积包含硅及碳的低介电常数薄膜，其中该低介电常数薄膜的介电常数小于4；以及
通过下述工序对该沉积的低介电常数薄膜进行后处理，该工序包括：
将该低介电常数薄膜以至少10℃/秒的速率加热到至少600℃的所需温度，其中该低介电常数薄膜维持在该所需温度5秒或更少；以及
以至少10℃/秒的速率冷却该低介电常数薄膜。
2.根据权利要求1所述的方法，其特征在于，该低介电常数薄膜以在10℃/秒至300℃/秒之间的速率加热，并在10℃/秒至100℃/秒之间的速率冷却。
3.根据权利要求1所述的方法，其特征在于，所述后处理还包括用紫外光辐射处理该低介电常数薄膜。
4.根据权利要求3所述的方法，其特征在于，包含加热及冷却该低介电常数薄膜的所述工序与用紫外光辐射处理该低介电常数薄膜同时进行。
5.根据权利要求4所述的方法，其特征在于，该后处理还包括用电子束处理该低介电常数薄膜，其中该电子束处理在加热及冷却该低介电常数薄膜之前或之后实施。
6.根据权利要求5所述的方法，其特征在于，该低介电常数薄膜是在一集成处理系统中进行后处理，从而使该低介电常数薄膜在加热该低介电常数薄膜及用电子束处理该低介电常数薄膜之间不会暴露在大气中。
7.根据权利要求3所述的方法，其特征在于，用紫外光辐射处理该低介电常数薄膜在包括加热及冷却该低介电常数薄膜的所述工序之前或之后相继实施。
8.根据权利要求1所述的方法，其特征在于，该后处理还包括用电子束处理该低介电常数薄膜，其中该电子束处理在加热及冷却该低介电常数薄膜之前或之后实施。
9.根据权利要求8所述的方法，其特征在于，该低介电常数薄膜在一集成处理系统中进行后处理，从而使该低介电常数薄膜在加热该低介电常数薄膜及用电子束处理该低介电常数薄膜之间不会暴露在大气中。
10.根据权利要求1所述的方法，其特征在于，该低介电常数薄膜还包含氧。
11.一种处理衬底的方法，包括：
在射频电源下在衬底上沉积包含硅及碳的低介电常数薄膜，其中该低介电常数薄膜的介电常数小于4；以及
通过下述工序对该沉积的低介电常数薄膜进行后处理，该工序包含：
将该低介电常数薄膜从在25℃至250℃的温度加热至在600℃至1000℃的温度，其中该低介电常数薄膜在所述600℃至1000℃的温度下加热5秒或更少；以及
将该低介电常数薄膜从所述600℃至1000℃的温度冷却，其中加热该低介电常数薄膜的起始至冷却该低介电常数薄膜的终了的时间长度在0.5分钟至5分钟。
12.根据权利要求11所述的方法，其特征在于，该低介电常数薄膜以10℃/秒至300℃/秒的速率加热，并以10℃/秒至100℃/秒的速率冷却。
13.根据权利要求11所述的方法，其特征在于，该后处理还包括以紫外光辐射处理该低介电常数薄膜。
14.根据权利要求11所述的方法，其特征在于，该后处理还包括用电子束处理该低介电常数薄膜，其中该电子束处理在加热及冷却该低介电常数薄膜之前或之后实施。
15.根据权利要求11所述的方法，其特征在于，所述冷却该低介电常数薄膜的步骤包括将该衬底背侧暴露在气体流。
16.一种处理衬底的方法，包括：
在射频电源下在衬底上沉积包含硅及碳的低介电常数薄膜，其中该低介电常数薄膜的介电常数小于4；以及
通过下述工序对该沉积的低介电常数薄膜进行后处理，该工序包含：
将该低介电常数薄膜以至少10℃/秒的速率加热至至少600℃的所需温度，其中该低介电常数薄膜维持在该至少600℃的所需温度5秒或更少；以及
将该低介电常数薄膜以至少10℃/秒的速率冷却，其中加热低介电常数薄膜的起始至冷却该低介电常数薄膜的终了的时间长度在0.5分钟至5分钟的时间范围内。
17.根据权利要求16所述的方法，其特征在于，该低介电常数薄膜从25℃至250℃的温度进行加热，而所述的所需温度在800℃至900℃之间。
18.根据权利要求16所述的方法，其特征在于，该后处理还包括用紫外光辐射处理该低介电常数薄膜。
19.根据权利要求16所述的方法，其特征在于，该后处理还包括用电子束处理该低介电常数薄膜，其中该电子束处理在加热及冷却该低介电常数薄膜之前或之后实施。
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