CN100435240C - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN100435240C
CN100435240C CNB2004100696230A CN200410069623A CN100435240C CN 100435240 C CN100435240 C CN 100435240C CN B2004100696230 A CNB2004100696230 A CN B2004100696230A CN 200410069623 A CN200410069623 A CN 200410069623A CN 100435240 C CN100435240 C CN 100435240C
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CN
China
Prior art keywords
type
well
semiconductor device
trap
deep well
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2004100696230A
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English (en)
Chinese (zh)
Other versions
CN1581354A (zh
Inventor
安藤亮一
植本彰
垣内俊雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN1581354A publication Critical patent/CN1581354A/zh
Application granted granted Critical
Publication of CN100435240C publication Critical patent/CN100435240C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/854Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/859Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CNB2004100696230A 2003-08-06 2004-07-15 半导体器件 Expired - Fee Related CN100435240C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP288153/03 2003-08-06
JP288153/2003 2003-08-06
JP2003288153 2003-08-06

Publications (2)

Publication Number Publication Date
CN1581354A CN1581354A (zh) 2005-02-16
CN100435240C true CN100435240C (zh) 2008-11-19

Family

ID=34213282

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004100696230A Expired - Fee Related CN100435240C (zh) 2003-08-06 2004-07-15 半导体器件

Country Status (5)

Country Link
US (1) US7345345B2 (enExample)
JP (1) JP5079974B2 (enExample)
KR (1) KR100749231B1 (enExample)
CN (1) CN100435240C (enExample)
TW (1) TWI256724B (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4530823B2 (ja) * 2004-12-02 2010-08-25 三洋電機株式会社 半導体装置及びその製造方法
WO2006127751A2 (en) * 2005-05-23 2006-11-30 Amalfi Semiconductor, Inc. Electrically isolated cmos device
CN101238580B (zh) * 2005-08-18 2010-06-16 富士通微电子株式会社 半导体器件及其制造方法
KR100688588B1 (ko) 2006-02-27 2007-03-02 삼성전자주식회사 래치-업의 발생을 방지할 수 있는 cmos 반도체 장치
JP5036234B2 (ja) 2006-07-07 2012-09-26 三菱電機株式会社 半導体装置
US7847581B2 (en) * 2008-04-03 2010-12-07 Stmicroelectronics (Rousset) Sas Device for protecting an integrated circuit against a laser attack
JP5259246B2 (ja) * 2008-05-09 2013-08-07 ルネサスエレクトロニクス株式会社 半導体装置
DE102008047850B4 (de) * 2008-09-18 2015-08-20 Austriamicrosystems Ag Halbleiterkörper mit einer Schutzstruktur und Verfahren zum Herstellen derselben
JP5896682B2 (ja) 2011-10-18 2016-03-30 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US9287253B2 (en) * 2011-11-04 2016-03-15 Synopsys, Inc. Method and apparatus for floating or applying voltage to a well of an integrated circuit
JP5725230B2 (ja) * 2014-04-09 2015-05-27 株式会社デンソー 半導体装置
JP6118923B2 (ja) * 2016-01-26 2017-04-19 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US9633992B1 (en) * 2016-02-23 2017-04-25 Vanguard International Semiconductor Corporation Electrostatic discharge protection device
CN108878417B (zh) * 2018-07-05 2020-10-30 江南大学 一种高维持mos辅助触发scr结构的瞬态电压抑制器
KR102482194B1 (ko) * 2018-08-24 2022-12-27 삼성전기주식회사 삽입손실이 개선된 cmos 트랜지스터의 배치 구조
CN110534512B (zh) * 2019-09-07 2023-02-07 电子科技大学 一种抗闩锁版图结构
CN115394769A (zh) 2021-05-24 2022-11-25 恩智浦有限公司 集成电路中的导电性减少特征
JPWO2023189857A1 (enExample) * 2022-03-29 2023-10-05
CN118213372B (zh) * 2024-05-21 2024-08-23 天水天光半导体有限责任公司 16位透明锁存器

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1228611A (zh) * 1998-03-05 1999-09-15 日本电气株式会社 三重阱结构的半导体集成电路的制造方法
US20020117713A1 (en) * 2001-01-23 2002-08-29 Akio Kitamura Semiconductor integrated circuit device and manufacture method therefore

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JPS62155555A (ja) * 1985-09-18 1987-07-10 Sony Corp 相補型mosトランジスタ
US4761571A (en) * 1985-12-19 1988-08-02 Honeywell Inc. Memory circuit enchancement to stablize the signal lines with additional capacitance
JPH05326862A (ja) * 1992-05-14 1993-12-10 Fujitsu Ltd 半導体装置
KR940003026A (ko) * 1992-07-13 1994-02-19 김광호 트리플웰을 이용한 반도체장치
JPH06232355A (ja) * 1993-02-02 1994-08-19 Hitachi Ltd Mos半導体製造装置
JPH08149011A (ja) * 1994-11-18 1996-06-07 Mitsubishi Electric Corp 電流加算型ディジタル/アナログ変換器
JP3419672B2 (ja) 1997-12-19 2003-06-23 富士通株式会社 半導体装置及びその製造方法
JP2000101045A (ja) * 1998-07-23 2000-04-07 Mitsubishi Electric Corp 半導体装置
KR20000041323A (ko) * 1998-12-22 2000-07-15 윤종용 트리플 웰 구조를 갖는 반도체 장치의 제조 방법
US6432761B1 (en) * 1999-10-01 2002-08-13 Microchip Technology Incorporated Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-EEPROM
US6376870B1 (en) * 2000-09-08 2002-04-23 Texas Instruments Incorporated Low voltage transistors with increased breakdown voltage to substrate
US6791883B2 (en) * 2002-06-24 2004-09-14 Freescale Semiconductor, Inc. Program and erase in a thin film storage non-volatile memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1228611A (zh) * 1998-03-05 1999-09-15 日本电气株式会社 三重阱结构的半导体集成电路的制造方法
US20020117713A1 (en) * 2001-01-23 2002-08-29 Akio Kitamura Semiconductor integrated circuit device and manufacture method therefore

Also Published As

Publication number Publication date
TWI256724B (en) 2006-06-11
KR100749231B1 (ko) 2007-08-13
US7345345B2 (en) 2008-03-18
TW200507236A (en) 2005-02-16
JP2005072566A (ja) 2005-03-17
CN1581354A (zh) 2005-02-16
KR20050016107A (ko) 2005-02-21
JP5079974B2 (ja) 2012-11-21
US20050045953A1 (en) 2005-03-03

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20081119

Termination date: 20210715

CF01 Termination of patent right due to non-payment of annual fee