CH632870A5 - Boitier plat contenant un dispositif a circuits integres. - Google Patents

Boitier plat contenant un dispositif a circuits integres. Download PDF

Info

Publication number
CH632870A5
CH632870A5 CH740579A CH740579A CH632870A5 CH 632870 A5 CH632870 A5 CH 632870A5 CH 740579 A CH740579 A CH 740579A CH 740579 A CH740579 A CH 740579A CH 632870 A5 CH632870 A5 CH 632870A5
Authority
CH
Switzerland
Prior art keywords
conductors
housing
devices
wafer
network
Prior art date
Application number
CH740579A
Other languages
English (en)
French (fr)
Inventor
Michel Ugon
Original Assignee
Cii Honeywell Bull
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cii Honeywell Bull filed Critical Cii Honeywell Bull
Publication of CH632870A5 publication Critical patent/CH632870A5/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H10W70/611—
    • H10W70/635—
    • H10W70/695—
    • H10W74/114—
    • H10W76/47—
    • H10W72/07236—
    • H10W72/075—
    • H10W72/536—
    • H10W72/5363—
    • H10W72/5445—
    • H10W72/5449—
    • H10W72/884—
    • H10W74/00—
    • H10W90/734—
    • H10W90/736—
    • H10W90/754—
    • H10W90/756—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
  • Credit Cards Or The Like (AREA)
  • Packaging Frangible Articles (AREA)
CH740579A 1978-10-19 1979-08-13 Boitier plat contenant un dispositif a circuits integres. CH632870A5 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7829844A FR2439478A1 (fr) 1978-10-19 1978-10-19 Boitier plat pour dispositifs a circuits integres

Publications (1)

Publication Number Publication Date
CH632870A5 true CH632870A5 (fr) 1982-10-29

Family

ID=9213942

Family Applications (1)

Application Number Title Priority Date Filing Date
CH740579A CH632870A5 (fr) 1978-10-19 1979-08-13 Boitier plat contenant un dispositif a circuits integres.

Country Status (10)

Country Link
US (1) US4264917A (cg-RX-API-DMAC10.html)
JP (2) JPS5556647A (cg-RX-API-DMAC10.html)
CA (1) CA1148267A (cg-RX-API-DMAC10.html)
CH (1) CH632870A5 (cg-RX-API-DMAC10.html)
DE (1) DE2942422A1 (cg-RX-API-DMAC10.html)
FR (1) FR2439478A1 (cg-RX-API-DMAC10.html)
GB (1) GB2035701B (cg-RX-API-DMAC10.html)
IT (1) IT1123868B (cg-RX-API-DMAC10.html)
NL (1) NL190090C (cg-RX-API-DMAC10.html)
SE (1) SE440292B (cg-RX-API-DMAC10.html)

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US4549247A (en) * 1980-11-21 1985-10-22 Gao Gesellschaft Fur Automation Und Organisation Mbh Carrier element for IC-modules
FR2498814B1 (fr) * 1981-01-26 1985-12-20 Burroughs Corp Boitier pour circuit integre, moyen pour le montage et procede de fabrication
US4483067A (en) * 1981-09-11 1984-11-20 U.S. Philips Corporation Method of manufacturing an identification card and an identification manufactured, for example, by this method
FR2512990B1 (fr) * 1981-09-11 1987-06-19 Radiotechnique Compelec Procede pour fabriquer une carte de paiement electronique, et carte realisee selon ce procede
JPS5892597A (ja) * 1981-11-28 1983-06-01 大日本印刷株式会社 Ｉｃカ−ドの製造方法
JP2582013B2 (ja) * 1991-02-08 1997-02-19 株式会社東芝 樹脂封止型半導体装置及びその製造方法
JPS5948985A (ja) * 1982-09-13 1984-03-21 大日本印刷株式会社 Ｉｃカ−ドの製造方法
DE3235650A1 (de) * 1982-09-27 1984-03-29 Philips Patentverwaltung Gmbh, 2000 Hamburg Informationskarte und verfahren zu ihrer herstellung
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US4646129A (en) * 1983-09-06 1987-02-24 General Electric Company Hermetic power chip packages
US4630096A (en) * 1984-05-30 1986-12-16 Motorola, Inc. High density IC module assembly
DE3435506A1 (de) * 1984-09-27 1986-04-03 Siemens AG, 1000 Berlin und 8000 München An einem gegenstand zur markierung angebrachte anordnung mit einem informationsspeicher
JPS6189643A (ja) * 1984-10-09 1986-05-07 Toshiba Corp 半導体装置及びその製造方法
JPS61203695A (ja) * 1985-03-06 1986-09-09 シャープ株式会社 片面配線基板の部品実装方式
US5234866A (en) * 1985-03-25 1993-08-10 Hitachi, Ltd. Semiconductor device and process for producing the same, and lead frame used in said process
FR2584235B1 (fr) * 1985-06-26 1988-04-22 Bull Sa Procede de montage d'un circuit integre sur un support, dispositif en resultant et son application a une carte a microcircuits electroniques
US5082802A (en) * 1985-11-12 1992-01-21 Texas Instruments Incorporated Method of making a memory device by packaging two integrated circuit dies in one package
US5014112A (en) * 1985-11-12 1991-05-07 Texas Instruments Incorporated Semiconductor integrated circuit device having mirror image circuit bars bonded on opposite sides of a lead frame
US4914045A (en) * 1985-12-19 1990-04-03 Teccor Electronics, Inc. Method of fabricating packaged TRIAC and trigger switch
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US4695872A (en) * 1986-08-01 1987-09-22 Texas Instruments Incorporated High density micropackage for IC chips
US4740868A (en) * 1986-08-22 1988-04-26 Motorola Inc. Rail bonded multi-chip leadframe, method and package
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US5250470A (en) * 1989-12-22 1993-10-05 Oki Electric Industry Co., Ltd. Method for manufacturing a semiconductor device with corrosion resistant leads
US5173766A (en) * 1990-06-25 1992-12-22 Lsi Logic Corporation Semiconductor device package and method of making such a package
US5399903A (en) * 1990-08-15 1995-03-21 Lsi Logic Corporation Semiconductor device having an universal die size inner lead layout
US7198969B1 (en) * 1990-09-24 2007-04-03 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
DE9100665U1 (de) * 1991-01-21 1992-07-16 TELBUS Gesellschaft für elektronische Kommunikations-Systeme mbH, 85391 Allershausen Trägerelement für integrierte Halbleiter-Schaltkreise, insbesondere zum Einbau in Chip-Karten
JP2634351B2 (ja) * 1991-04-23 1997-07-23 三菱電機株式会社 半導体装置
US5262927A (en) * 1992-02-07 1993-11-16 Lsi Logic Corporation Partially-molded, PCB chip carrier package
US5434750A (en) * 1992-02-07 1995-07-18 Lsi Logic Corporation Partially-molded, PCB chip carrier package for certain non-square die shapes
JPH07164787A (ja) * 1992-03-26 1995-06-27 Dainippon Printing Co Ltd Ｉｃカードの製造方法
US5280413A (en) * 1992-09-17 1994-01-18 Ceridian Corporation Hermetically sealed circuit modules having conductive cap anchors
JP2774906B2 (ja) * 1992-09-17 1998-07-09 三菱電機株式会社 薄形半導体装置及びその製造方法
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JP3258764B2 (ja) * 1993-06-01 2002-02-18 三菱電機株式会社 樹脂封止型半導体装置の製造方法ならびに外部引出用電極およびその製造方法
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US5362679A (en) * 1993-07-26 1994-11-08 Vlsi Packaging Corporation Plastic package with solder grid array
US5438477A (en) * 1993-08-12 1995-08-01 Lsi Logic Corporation Die-attach technique for flip-chip style mounting of semiconductor dies
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JPH07169872A (ja) * 1993-12-13 1995-07-04 Fujitsu Ltd 半導体装置及びその製造方法
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US5581445A (en) * 1994-02-14 1996-12-03 Us3, Inc. Plastic integrated circuit card with reinforcement structure for protecting integrated circuit module
JP3383398B2 (ja) * 1994-03-22 2003-03-04 株式会社東芝 半導体パッケージ
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JP3388921B2 (ja) * 1994-11-29 2003-03-24 株式会社東芝 集積回路カードの製造方法
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Also Published As

Publication number Publication date
FR2439478B1 (cg-RX-API-DMAC10.html) 1981-04-17
NL7905082A (nl) 1980-04-22
SE440292B (sv) 1985-07-22
CA1148267A (fr) 1983-06-14
SE7906962L (sv) 1980-04-20
FR2439478A1 (fr) 1980-05-16
GB2035701A (en) 1980-06-18
JPS5936249U (ja) 1984-03-07
NL190090C (nl) 1993-10-18
DE2942422A1 (de) 1980-04-30
GB2035701B (en) 1983-06-29
JPS5556647A (en) 1980-04-25
IT1123868B (it) 1986-04-30
IT7926530A0 (it) 1979-10-16
US4264917A (en) 1981-04-28
NL190090B (nl) 1993-05-17

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