AU5923899A - Pseudomorphic high electron mobility transistors - Google Patents

Pseudomorphic high electron mobility transistors

Info

Publication number
AU5923899A
AU5923899A AU59238/99A AU5923899A AU5923899A AU 5923899 A AU5923899 A AU 5923899A AU 59238/99 A AU59238/99 A AU 59238/99A AU 5923899 A AU5923899 A AU 5923899A AU 5923899 A AU5923899 A AU 5923899A
Authority
AU
Australia
Prior art keywords
electron mobility
high electron
mobility transistors
pseudomorphic high
pseudomorphic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU59238/99A
Other languages
English (en)
Inventor
Elsa K. Tong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Publication of AU5923899A publication Critical patent/AU5923899A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
    • H10D30/4732—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT using Group III-V semiconductor material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
AU59238/99A 1998-09-29 1999-09-15 Pseudomorphic high electron mobility transistors Abandoned AU5923899A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/163,124 US6087207A (en) 1998-09-29 1998-09-29 Method of making pseudomorphic high electron mobility transistors
US09163124 1998-09-29
PCT/US1999/021135 WO2000019512A1 (en) 1998-09-29 1999-09-15 Pseudomorphic high electron mobility transistors

Publications (1)

Publication Number Publication Date
AU5923899A true AU5923899A (en) 2000-04-17

Family

ID=22588591

Family Applications (1)

Application Number Title Priority Date Filing Date
AU59238/99A Abandoned AU5923899A (en) 1998-09-29 1999-09-15 Pseudomorphic high electron mobility transistors

Country Status (6)

Country Link
US (1) US6087207A (enExample)
EP (2) EP1630860A3 (enExample)
JP (1) JP4874461B2 (enExample)
AU (1) AU5923899A (enExample)
DE (1) DE69930135T2 (enExample)
WO (1) WO2000019512A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170298170A1 (en) * 2014-09-26 2017-10-19 Sekisui Chemical Co., Ltd. Flame-retardant urethane resin composition

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US6703638B2 (en) * 2001-05-21 2004-03-09 Tyco Electronics Corporation Enhancement and depletion-mode phemt device having two ingap etch-stop layers
JP4371668B2 (ja) * 2003-02-13 2009-11-25 三菱電機株式会社 半導体装置
WO2005043695A2 (en) * 2003-10-20 2005-05-12 Binoptics Corporation Surface emitting and receiving photonic device
WO2006025006A1 (en) * 2004-08-31 2006-03-09 Koninklijke Philips Electronics N.V. Method for producing a multi-stage recess in a layer structure and a field effect transistor with a multi-recessed gate
US20060175631A1 (en) * 2005-02-04 2006-08-10 Raytheon Company Monolithic integrated circuit having enhanced breakdown voltage
JP2008060397A (ja) * 2006-08-31 2008-03-13 Nec Electronics Corp 電界効果トランジスタおよびその製造方法
KR100853166B1 (ko) * 2007-01-30 2008-08-20 포항공과대학교 산학협력단 전계효과형 화합물 반도체 소자의 제조 방법
JP2010135590A (ja) * 2008-12-05 2010-06-17 Renesas Electronics Corp 電界効果トランジスタ
GB201112330D0 (en) 2011-07-18 2011-08-31 Epigan Nv Method for growing III-V epitaxial layers and semiconductor structure
US8901606B2 (en) 2012-04-30 2014-12-02 Avago Technologies General Ip (Singapore) Pte. Ltd. Pseudomorphic high electron mobility transistor (pHEMT) comprising low temperature buffer layer
US8853743B2 (en) 2012-11-16 2014-10-07 Avago Technologies General Ip (Singapore) Pte. Ltd. Pseudomorphic high electron mobility transistor comprising doped low temperature buffer layer
US9461159B1 (en) 2016-01-14 2016-10-04 Northrop Grumman Systems Corporation Self-stop gate recess etching process for semiconductor field effect transistors
JP6222408B1 (ja) * 2017-02-27 2017-11-01 三菱電機株式会社 半導体装置及びその製造方法
US11145735B2 (en) * 2019-10-11 2021-10-12 Raytheon Company Ohmic alloy contact region sealing layer
CN113363255B (zh) * 2021-06-02 2024-02-27 厦门市三安集成电路有限公司 一种半导体器件及其制备方法
CN113363254B (zh) * 2021-06-02 2024-06-18 厦门市三安集成电路有限公司 一种半导体器件及其制备方法

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JPH023938A (ja) * 1988-06-20 1990-01-09 Mitsubishi Electric Corp 電界効果トランジスタ
JP2691619B2 (ja) * 1989-07-19 1997-12-17 富士通株式会社 化合物半導体装置及びその製造方法
JPH04167439A (ja) * 1990-10-30 1992-06-15 Mitsubishi Electric Corp 半導体装置の製造方法
JP2523985B2 (ja) * 1990-11-16 1996-08-14 三菱電機株式会社 半導体装置の製造方法
JPH0582560A (ja) * 1991-09-20 1993-04-02 Sony Corp 電界効果型トランジスタの製造方法
US5212704A (en) * 1991-11-27 1993-05-18 At&T Bell Laboratories Article comprising a strained layer quantum well laser
US5352909A (en) * 1991-12-19 1994-10-04 Nec Corporation Field effect transistor and method for manufacturing the same
US5508535A (en) * 1992-01-09 1996-04-16 Mitsubishi Denki Kabushiki Kaisha Compound semiconductor devices
JP2978972B2 (ja) * 1992-03-12 1999-11-15 富士通株式会社 半導体装置の製造方法
JP3129510B2 (ja) * 1992-03-19 2001-01-31 富士通株式会社 ＩｎＧａＰのエッチング方法及びそのエッチング方法を用いた半導体装置の製造方法
JPH06196504A (ja) * 1992-12-24 1994-07-15 Rohm Co Ltd 半導体装置およびその製造方法
US5364816A (en) * 1993-01-29 1994-11-15 The United States Of America As Represented By The Secretary Of The Navy Fabrication method for III-V heterostructure field-effect transistors
GB2275569B (en) * 1993-02-24 1996-08-07 Toshiba Cambridge Res Center Semiconductor device and method of making same
US5324682A (en) * 1993-04-29 1994-06-28 Texas Instruments Incorporated Method of making an integrated circuit capable of low-noise and high-power microwave operation
JPH07142685A (ja) * 1993-06-17 1995-06-02 Fujitsu Ltd 半導体集積回路装置とその製造方法
JP2500459B2 (ja) * 1993-06-24 1996-05-29 日本電気株式会社 ヘテロ接合電界効果トランジスタ
JPH0742685A (ja) * 1993-08-02 1995-02-10 Sanyo Electric Co Ltd 内部高圧型圧縮機
JPH07202173A (ja) * 1993-12-28 1995-08-04 Fujitsu Ltd 半導体装置及びその製造方法
JP3294411B2 (ja) * 1993-12-28 2002-06-24 富士通株式会社 半導体装置の製造方法
JP2581452B2 (ja) * 1994-06-06 1997-02-12 日本電気株式会社 電界効果トランジスタ
JPH0831844A (ja) * 1994-07-11 1996-02-02 Murata Mfg Co Ltd 半導体装置の製造方法
JP2685032B2 (ja) * 1995-06-09 1997-12-03 日本電気株式会社 電界効果トランジスタ及びその製造方法
JP2716015B2 (ja) * 1995-07-27 1998-02-18 日本電気株式会社 電界効果トランジスタの製造方法
JP3616447B2 (ja) * 1996-02-27 2005-02-02 富士通株式会社 半導体装置
JPH09246532A (ja) * 1996-03-14 1997-09-19 Fujitsu Ltd 化合物半導体装置の製造方法
JP2780704B2 (ja) * 1996-06-14 1998-07-30 日本電気株式会社 半導体装置の製造方法
JPH1050729A (ja) * 1996-07-29 1998-02-20 Mitsubishi Electric Corp 半導体装置，及びその製造方法
JPH1056168A (ja) * 1996-08-08 1998-02-24 Mitsubishi Electric Corp 電界効果トランジスタ
JP3377022B2 (ja) * 1997-01-23 2003-02-17 日本電信電話株式会社 ヘテロ接合型電界効果トランジスタの製造方法
CA2311564A1 (en) * 1997-11-26 1999-06-03 The Whitaker Corporation Inxga1-xp stop-etch layer for selective recess of gallium arsenide-based eptitaxial field effect transistors and process therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170298170A1 (en) * 2014-09-26 2017-10-19 Sekisui Chemical Co., Ltd. Flame-retardant urethane resin composition

Also Published As

Publication number Publication date
JP2002526922A (ja) 2002-08-20
WO2000019512A8 (en) 2000-09-28
EP1131849A4 (en) 2002-10-28
JP4874461B2 (ja) 2012-02-15
EP1131849B1 (en) 2006-03-01
WO2000019512A1 (en) 2000-04-06
EP1630860A2 (en) 2006-03-01
US6087207A (en) 2000-07-11
DE69930135D1 (de) 2006-04-27
EP1630860A3 (en) 2008-03-05
EP1131849A2 (en) 2001-09-12
DE69930135T2 (de) 2006-12-07

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase