JP6222408B1 - 半導体装置及びその製造方法 - Google Patents
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Abstract
Description
図1は、本発明の実施の形態1に係る半導体装置を示す断面図である。半導体基板1の上にGaAsなどの化合物半導体からなる半導体層2が形成されている。ソース電極3及びドレイン電極4が半導体層2の上に形成され、半導体層2にオーミック接合している。ソース電極3とドレイン電極4との間において半導体層2の表面にリセス構造5が形成されている。そのリセス構造5内において半導体層2の上にT字型のゲート電極6が形成されている。
図7は、本発明の実施の形態2に係る半導体装置を示す断面図である。最下層6aは、例えばGaAsの半導体層2に対して固相反応するPtなどの金属である。この場合、ゲート電極6の形成後の入熱により最下層6aの中央部は半導体層2と固相反応して合金化する。これにより、最下層6aの両端部が反り上がって半導体層2との接触面積が小さくなっても、十分な接着強度が得られる。この結果、後工程でのリフトオフ又はダイシングの際の水流によるゲート電極6の脱落を防ぐことができ、歩留まりの向上が見込める。その他の構成及び効果は実施の形態1と同様である。
図8は、本発明の実施の形態3に係る半導体装置を示す断面図である。保護膜9が、反り上がった最下層6aの両端部を被覆している。ただし、一般的な半導体装置製造プロセスで保護膜として使用されるSiO2又はSi3N4等のp−CVD膜ではゲート電極6の反り部分のカバレッジが難しい。これに対して、保護膜9は、十分にカバレッジ性に優れた絶縁膜であり、例えば原子層堆積 (ALD: Atomic layer deposition)法により形成されて、原子層が交互配列された原子層堆積膜である。
Claims (5)
- 半導体層と、
前記半導体層の上に形成され、前記半導体層に接する最下層と、前記最下層の上に形成された上層とを少なくとも有するゲート電極とを備え、
前記上層が前記最下層に熱応力を発生させて前記最下層の両端部が前記半導体層から反り上がり、
前記最下層はPt層であり、前記上層はTi層であり、
前記最下層の中央部は前記半導体層と固相反応していることを特徴とする半導体装置。 - 反り上がった前記最下層の前記両端部を被覆する保護膜を更に備えることを特徴とする請求項1に記載の半導体装置。
- 前記保護膜は、原子層が交互配列された原子層堆積膜であることを特徴とする請求項2に記載の半導体装置。
- 半導体層の上に、前記半導体層に接する最下層と、前記最下層の上に形成された上層とを少なくとも有するゲート電極を形成する工程と、
熱処理を行うことで前記上層から前記最下層に熱応力を発生させて前記最下層の両端部を前記半導体層から反り上がらせる工程とを備え、
前記最下層はPt層であり、前記上層はTi層であり、
前記熱処理により前記最下層の中央部を前記半導体層と固相反応させることを特徴とする半導体装置の製造方法。 - 反り上がった前記最下層の前記両端部を被覆する保護膜を原子層堆積法により形成する工程を更に備えることを特徴とする請求項4に記載の半導体装置の製造方法。
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PCT/JP2017/007350 WO2018154754A1 (ja) | 2017-02-27 | 2017-02-27 | 半導体装置及びその製造方法 |
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US (1) | US10790397B2 (ja) |
JP (1) | JP6222408B1 (ja) |
KR (1) | KR102150850B1 (ja) |
CN (1) | CN110326090A (ja) |
DE (1) | DE112017007134T5 (ja) |
WO (1) | WO2018154754A1 (ja) |
Citations (4)
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JPS57106080A (en) * | 1980-12-23 | 1982-07-01 | Toshiba Corp | Manufacture of gaas field effect transistor |
JPH04245444A (ja) * | 1991-01-30 | 1992-09-02 | Fujitsu Ltd | 電界効果トランジスタおよびその製造方法 |
JPH10177967A (ja) * | 1996-12-16 | 1998-06-30 | Murata Mfg Co Ltd | 電界効果トランジスタ |
JP2003007726A (ja) * | 2001-06-18 | 2003-01-10 | New Japan Radio Co Ltd | ヘテロ接合電界効果トランジスタ |
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JPS60254666A (ja) * | 1984-05-31 | 1985-12-16 | Fujitsu Ltd | Fetの製造方法 |
JPS6216574A (ja) * | 1985-07-15 | 1987-01-24 | Matsushita Electric Ind Co Ltd | 電界効果トランジスタの製造方法 |
JPH10173166A (ja) * | 1996-12-05 | 1998-06-26 | Murata Mfg Co Ltd | 電界効果トランジスタ及びその製造方法 |
US6087207A (en) * | 1998-09-29 | 2000-07-11 | Raytheon Company | Method of making pseudomorphic high electron mobility transistors |
JP2001265011A (ja) | 2000-03-17 | 2001-09-28 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP2003133333A (ja) | 2001-10-25 | 2003-05-09 | Murata Mfg Co Ltd | ヘテロ接合電界効果トランジスタ |
JP2007027232A (ja) * | 2005-07-13 | 2007-02-01 | Seiko Epson Corp | 半導体装置及びその製造方法 |
DE102006012369A1 (de) * | 2006-03-17 | 2007-09-20 | United Monolithic Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements mit einer metallischen Steuerelektrode und Halbleiterbauelement |
JP5358893B2 (ja) * | 2007-04-03 | 2013-12-04 | 三菱電機株式会社 | トランジスタ |
JP5417700B2 (ja) | 2007-10-22 | 2014-02-19 | 富士通株式会社 | 半導体装置及びその製造方法 |
JP2013229486A (ja) | 2012-04-26 | 2013-11-07 | Mitsubishi Electric Corp | ヘテロ接合電界効果トランジスタ及びその製造方法 |
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JPS57106080A (en) * | 1980-12-23 | 1982-07-01 | Toshiba Corp | Manufacture of gaas field effect transistor |
JPH04245444A (ja) * | 1991-01-30 | 1992-09-02 | Fujitsu Ltd | 電界効果トランジスタおよびその製造方法 |
JPH10177967A (ja) * | 1996-12-16 | 1998-06-30 | Murata Mfg Co Ltd | 電界効果トランジスタ |
JP2003007726A (ja) * | 2001-06-18 | 2003-01-10 | New Japan Radio Co Ltd | ヘテロ接合電界効果トランジスタ |
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WO2018154754A1 (ja) | 2018-08-30 |
KR102150850B1 (ko) | 2020-09-02 |
DE112017007134T5 (de) | 2019-11-21 |
US10790397B2 (en) | 2020-09-29 |
JPWO2018154754A1 (ja) | 2019-02-28 |
US20190378935A1 (en) | 2019-12-12 |
KR20190105641A (ko) | 2019-09-17 |
CN110326090A (zh) | 2019-10-11 |
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