WO2023098517A1 - Sip封装组件及其封装方法、制作方法 - Google Patents

Sip封装组件及其封装方法、制作方法 Download PDF

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Publication number
WO2023098517A1
WO2023098517A1 PCT/CN2022/133455 CN2022133455W WO2023098517A1 WO 2023098517 A1 WO2023098517 A1 WO 2023098517A1 CN 2022133455 W CN2022133455 W CN 2022133455W WO 2023098517 A1 WO2023098517 A1 WO 2023098517A1
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area
substrate
shielding layer
devices
package assembly
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PCT/CN2022/133455
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English (en)
French (fr)
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姚力
尹红成
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展讯通信（上海）有限公司
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Publication of WO2023098517A1 publication Critical patent/WO2023098517A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation

Definitions

  • the embodiments of the present application relate to the technical field of system-in-package, and in particular, to a SIP package component, a package method, and a manufacturing method thereof.
  • EMI Coating In traditional packaging or module products, the form of EMI Coating is used to shield electromagnetic interference, but it is feasible in the case of low frequency and low power.
  • PA unit power amplifier unit
  • the purpose of shielding electromagnetic interference can be achieved through the form of Metal CAN (metal cover technology), but because it adopts the whole coverage method, with the increase of the stack structure, the size of the entire package component will be reduced due to the shielding cover. The change is bigger, which does not meet the needs of future packaging development, and it also has the problem that the shield cannot be electrically independent.
  • Metal CAN metal cover technology
  • a cutting line is generated on the route between the two, and the overall plastic package is processed based on the cutting line.
  • the technical problem to be solved by the present invention is to provide a SIP packaging component and its packaging method and manufacturing method in order to overcome the above-mentioned defects in the prior art.
  • a SIP package assembly the integral outer surface of the plastic package of the package assembly includes at least two shielding layer regions;
  • an interval area is between any two shielding layer areas.
  • the package assembly includes a substrate, and at least two devices are disposed on the substrate;
  • the position of the spacer area corresponds to the first area on the substrate
  • the first area includes an area between any two mounting positions of devices on the substrate.
  • the package assembly includes a substrate, on which at least one interference source device and at least one interfered device corresponding to the interference source device are arranged;
  • the position of the spacer area corresponds to the second area on the substrate
  • the second area includes an area between installation positions of an interference source device and a corresponding interfered device on the substrate.
  • a packaging method of a SIP packaging component comprising:
  • At least two shielding layer regions are formed on the integral outer surface of the plastic package of the packaging component; wherein, there is a spacer region between any two shielding layer regions.
  • the packaging component includes a substrate on which at least two devices are provided, and before the step of generating at least two shielding layer regions on the outer surface of the packaging component, the packaging method includes:
  • the substrate determining a first area on the substrate, the first area including an area between any two installation positions of devices on the substrate;
  • the location of the separation area is determined based on the first area.
  • the package assembly includes a substrate, on which at least one interference source device and at least one interfered device corresponding to the interference source device are arranged, and at least two devices are formed on the outer surface of the package assembly.
  • described encapsulation method comprises:
  • the second area includes an area between installation positions of an interference source device and a corresponding interfered device on the substrate
  • the location of the separation area is determined based on the second area.
  • a manufacturing method of a SIP package assembly comprising:
  • a shielding layer is generated on the outer surface of the plastic package of the package assembly comprising the mould;
  • the mold is removed to obtain a spacer area and at least two shielding layer areas, and the mold is placed at the position of the spacer area.
  • it also includes:
  • the mold based on the location of a first region on the substrate, the first region including a region between any two device mounting locations on the substrate, or, based on a second region on the substrate
  • the mold is made at a location where the mold is made, and the second area includes an area between installation positions of the interference source device and the corresponding interfered device on the substrate among the at least two devices.
  • a manufacturing method of a SIP package assembly comprising:
  • a shielding layer is generated on the outer surface of the plastic package of the packaging component; based on the laser etching process, a spacer area is etched on the shielding layer, and at least two shielding layer regions are obtained, and any two shielding layer regions are obtained. is the interval area.
  • it also includes:
  • the position of the interval area is determined based on the position of the first area on the substrate, and the first area includes an area between the installation positions of any two devices on the substrate, or, the interval area
  • the position of is determined based on the position of the second area on the substrate, and the second area includes the area between the installation positions of the interference source device and the corresponding interfered device of the at least two devices on the substrate .
  • the positive progress effect of the present invention is: through the division of the shielding layer on the outer surface of the plastic package, the shielding body is prevented from becoming a medium of high-frequency and high-power noise, which affects the normal operation of peripheral devices, that is, the noise signal in each shielding area is realized. Do not interfere with each other, so as to achieve the effect of protecting specific devices and circuits.
  • Fig. 1 is the schematic diagram of the outer surface shielding layer area of the SIP package assembly of embodiment 1 of the present invention
  • FIG. 2 is a schematic cross-sectional structure diagram of a SIP package assembly according to Embodiment 2 of the present invention.
  • FIG. 3 is a schematic diagram of the outer surface shielding layer area of the SIP package assembly according to Embodiment 2 of the present invention.
  • FIG. 4 is a schematic cross-sectional structure diagram of a SIP package assembly according to Embodiment 3 of the present invention.
  • FIG. 5 is a schematic diagram of the outer surface shielding layer area of the SIP package assembly according to Embodiment 3 of the present invention.
  • FIG. 6 is a flow chart of a packaging method of a SIP packaging component according to Embodiment 4 of the present invention.
  • FIG. 7 is a flow chart of a packaging method of a SIP packaging component according to Embodiment 5 of the present invention.
  • FIG. 8 is a flowchart of a method for manufacturing a SIP package assembly according to Embodiment 6 of the present invention.
  • FIG. 9 is a flow chart of a manufacturing method of a SIP package component according to Embodiment 7 of the present invention.
  • the outer surface of the plastic package of the package component includes at least two shielding layer areas 2; it should be noted that the plastic package of the package component in this embodiment is a whole, The shielding layer area is generated on the integral outer surface of the plastic package, and does not involve slotting the plastic package to obtain the spacer area.
  • the outer surface of the packaged component is its shielding layer as a whole.
  • the implementation of this example does not require additional hardware structures. Only by dividing the outer surface shielding layer itself, the shielding body can be prevented from becoming a high-frequency and high-frequency shielding layer. The medium of power noise, thereby avoiding mutual interference between devices.
  • the shielding body is prevented from becoming a medium for high-frequency and high-power noise, which affects the normal operation of peripheral devices on the package assembly, that is, the noise in each shielding area is realized.
  • the signals do not interfere with each other, so as to achieve the effect of protecting specific devices and circuits.
  • the SIP package assembly of this embodiment is further improved on the basis of Embodiment 1, as shown in Figure 2-3, the package assembly includes a substrate 3, and at least two devices are arranged on the substrate 3;
  • the position of the spacer area 1 corresponds to the first area on the substrate 3;
  • the first area includes an area between the installation positions of any two devices on the substrate 3 .
  • the interval area 1 can be set in the corresponding positions between all or specific devices according to the needs, or, referring to Figure 2, based on the consideration of the influence of high-frequency and high-power noise, select the A space area 1 is set in a corresponding position between the device 41 with high frequency power noise (such as the PA power amplification unit) and other adjacent devices 42 .
  • high frequency power noise such as the PA power amplification unit
  • the position of the separation area is further determined based on the installation positions of the devices on the package assembly.
  • the shielding body is prevented from becoming a medium for high-frequency and high-power noise, which affects the normal operation of peripheral devices on the package component, that is, the noise signals in each shielding area do not interfere with each other. So as to achieve the effect of protecting specific devices and circuits.
  • the SIP package assembly of this embodiment is further improved on the basis of Embodiment 1.
  • the package assembly includes a substrate 3 on which at least one interference source device 43 and at least one The interfered device 44 corresponding to the interference source device 43;
  • the position of the spacer region 1 corresponds to the second region on the substrate 3;
  • the second area includes the area between the installation positions of the interference source device 43 and the corresponding interfered device 44 on the substrate 3 .
  • the interference source device and the corresponding interfered device further set a separation area at a position corresponding to the area between the interferer device and the corresponding interfered device.
  • the function of the shielding layer is to perform electromagnetic shielding, it is necessary to ensure that effective electromagnetic shielding can be achieved after the separation area is formed, which can be further combined with experimental detection parameters, such as determining based on the radiation interference range of the interference source device The width of the spacing region.
  • interference may involve between multiple devices or between regions, so when setting the position of the interval region, it can be done in units of regions or in multiples
  • the range of the area defined by the device is the unit, the interference area and the interfered area are obtained, and then the interval area is set at the position corresponding to the area between the two areas.
  • the position of the separation area is further determined based on the installation position of the interference source device on the corresponding interfered device.
  • a packaging method of a SIP packaging assembly includes a substrate, the substrate is provided with at least two devices, as shown in Figure 6, the packaging method includes:
  • Step 11 determining a first area on the substrate, where the first area includes the area between the installation positions of any two devices on the substrate;
  • the interval area can be set in the corresponding positions between all or specific several devices, or, based on the consideration of the impact of high-frequency and high-power noise, select the area where high-frequency and high-power noise is generated
  • a spacer area is set at a corresponding position between the device (such as a PA power amplification unit) and other adjacent devices.
  • Step 12 Determine the position of the separation area based on the first area.
  • Step 13 generating a spacer area and at least two shielding layer areas on the integral outer surface of the plastic package of the packaging component;
  • an interval area is between any two shielding layer areas.
  • the plastic package of the packaging component in this embodiment is a whole, and the shielding layer area is formed on the integral outer surface of the plastic package, which does not involve slotting the plastic package to obtain the interval area.
  • the outer surface of the packaged component is its shielding layer as a whole.
  • the implementation of this example does not require additional hardware structures. Only by dividing the outer surface shielding layer itself, the shielding body can be prevented from becoming a high-frequency and high-frequency shielding layer. The medium of power noise, thereby avoiding mutual interference between devices.
  • the position of the separation area is further determined based on the installation positions of the devices on the package assembly.
  • the shielding body is prevented from becoming a medium for high-frequency and high-power noise, which affects the normal operation of peripheral devices on the package component, that is, the noise signals in each shielding area do not interfere with each other. So as to achieve the effect of protecting specific devices and circuits.
  • a packaging method for a SIP packaging component includes a substrate, and at least one interference source device and at least one interfered device corresponding to the interference source device are arranged on the substrate, as shown in Figure 7, the packaging method includes:
  • Step 21 Determine a second area on the substrate, where the second area includes the area between the installation positions of the interference source device and the corresponding interfered device on the substrate;
  • the interference source device and the corresponding interfered device further set a separation area at a position corresponding to the area between the interferer device and the corresponding interfered device.
  • interference may involve between multiple devices or between regions, so when setting the position of the interval region, it can be done in units of regions or in multiples
  • the range of the area defined by the device is the unit, the interference area and the interfered area are obtained, and the second area is set at a position corresponding to the area between the two areas.
  • Step 22 Determine the position of the separation area based on the second area.
  • the role of the shielding layer is to perform electromagnetic shielding, therefore, after forming the interval area, it is also necessary to ensure that effective electromagnetic shielding can be achieved, which can be further combined with experimental detection parameters, such as determining based on the radiation interference range of the interference source device The width of the spacing region.
  • Step 23 generating a spacer area and at least two shielding layer areas on the integral outer surface of the plastic package of the packaging component;
  • an interval area is between any two shielding layer areas.
  • the plastic package of the packaging component in this embodiment is a whole, and the shielding layer area is formed on the integral outer surface of the plastic package, which does not involve slotting the plastic package to obtain the interval area.
  • the position of the separation area is further determined based on the installation position of the interference source device on the corresponding interfered device.
  • a method for making a SIP package component specifically includes:
  • Step 31 providing a substrate
  • Step 32 installing at least two devices on the surface of the substrate
  • Step 33 performing a plastic sealing operation on the substrate to obtain a packaged component
  • packaging components may also include but not limited to substrate baking, solder paste printing, surface inspection, surface mount, optical inspection, reflow soldering, flux removal, X-ray inspection, mechanical slotting, plasma Operation processes such as cleaning, wire bonding, etc., are specifically implemented as required, which is not limited in this application.
  • Step 34 making a mold based on the position of the first region on the substrate, or making a mold based on the position of the second region on the substrate;
  • the first area includes the area between the installation positions of any two devices on the substrate
  • the second area includes the area between the installation positions of the interference source device and the corresponding interfered device on the substrate among at least two devices
  • experimental detection parameters may also be further combined, the width of the spaced area, for example, is determined based on the radiation interference range of the interference source device to determine the width of the mold. It should be noted that the fabrication of the template can be completed before the fabrication of the packaging component.
  • interference may involve between multiple devices or between regions, so when setting the position of the interval region, it can be done in units of regions or in multiples
  • the range of the area defined by the device is the unit, the interference area and the interfered area are obtained, and the second area is set at a position corresponding to the area between the two areas.
  • Step 35 placing a mold on the integral outer surface of the plastic package of the packaging component
  • Step 36 based on EMI Coating, generate a shielding layer on the outer surface of the packaging component including the mold; wherein, the EMI Coating method is mainly divided into two types: Sputtering (sputtering) and Spray Coating (spraying), and the Coating (coating) material is integrally grounded.
  • the generation of the shielding layer can also be realized in other ways.
  • the plastic package of the packaging component in this embodiment is a whole, and the shielding layer area is formed on the integral outer surface of the plastic package, which does not involve slotting the plastic package to obtain the interval area.
  • Step 37 removing the mold to obtain a spacer area and at least two shielding layer areas; the position where the mold is placed is the position of the spacer area.
  • the mold is used to assist the generation of the shielding layer, and then the shielding layer of the divided area is automatically obtained.
  • the shielding body is prevented from becoming a medium of high-frequency and high-power noise, which affects the package.
  • the normal operation of the disturbed device on the component means that the noise signals in each shielded area do not interfere with each other, thereby achieving the effect of protecting specific devices and circuits.
  • a method for making a SIP package component specifically includes:
  • Step 41 providing a substrate
  • Step 42 installing at least two devices on the surface of the substrate
  • Step 43 performing a plastic sealing operation on the substrate to obtain a packaged component
  • packaging components may also include but not limited to substrate baking, solder paste printing, surface inspection, surface mount, optical inspection, reflow soldering, flux removal, X-ray inspection, mechanical slotting, plasma Operation processes such as cleaning, wire bonding, etc., are specifically implemented as required, which is not limited in this application.
  • Step 44 generate a shielding layer on the outer surface of the plastic package of the packaging component based on EMI Coating
  • the EMI Coating method is mainly divided into Sputtering (sputtering) and Spray Coating (spraying).
  • the Coating (coating) material is grounded as a whole to complete the role of electromagnetic shielding.
  • the shielding layer can also be generated by other methods. It should be noted that the plastic package of the packaging component in this embodiment is a whole, and the shielding layer area is formed on the integral outer surface of the plastic package, which does not involve slotting the plastic package to obtain the interval area.
  • Step 45 etching the shielding layer based on a laser etching process to obtain a spacer region, and obtaining at least two shielding layer regions; a spacer region is between any two shielding layer regions.
  • the position of the interval area is determined based on the position of the first area on the substrate, and the first area includes an area between the installation positions of any two devices on the substrate, or, the interval area
  • the position of is determined based on the position of the second area on the substrate, and the second area includes the area between the installation positions of the interference source device and the corresponding interfered device of the at least two devices on the substrate
  • the experimental detection parameters may be further combined, such as determining the width of the interval region based on the radiation interference range of the interference source device.
  • interference may involve between multiple devices or between regions, so when setting the position of the interval region, it can be done in units of regions or in multiples
  • the range of the area defined by the device is the unit, the interference area and the interfered area are obtained, and the second area is set at a position corresponding to the area between the two areas.
  • the complete shielding layer is time-divided by laser etching or other etching processing methods to obtain interval areas, and then the shielding body is prevented from becoming a source of high-frequency and high-power noise through the division of the shielding layer on the outer surface of the plastic package.
  • the medium affects the normal operation of the devices on the package assembly, that is, the noise signals in each shielding area do not interfere with each other, thereby achieving the effect of protecting specific devices and circuits.

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Abstract

本发明公开了一种SIP封装组件及其封装方法、制作方法，所述封装组件的塑封体的一体外表面包括至少两个屏蔽层区域；其中，任意两个屏蔽层区域之间为间隔区域。本申请通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响周边器件正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。

Description

SIP封装组件及其封装方法、制作方法
本申请要求于2021年11月30日提交中国专利局、申请号为202111444181.3、申请名称为“SIP封装组件及其封装方法、制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及系统级封装技术领域，尤其涉及一种SIP封装组件及其封装方法、制作方法。
背景技术
在传统的封装或模组产品中，采用EMI Coating的形式达到屏蔽电磁干扰的目的，但是其在低频低功率情况下是可行的，当封装体内存在PA单元(功率放大单元)的情况下，由于EMI Coating表面连续，不能在电性上独立，屏蔽体反而成为了高频高功率噪声的介质，影响周边器件正常工作。
亦或者，通过Metal CAN(金属盖工艺)的形式达到屏蔽电磁干扰的目的，但是由于其采用的是整个覆盖的方式，随着堆叠结构的增多，整个封装组件的尺寸会因为屏蔽盖的原因而变的更大，不符合未来封装发展的需求，且其同样还是存在屏蔽体不能在电性上独立的问题。
亦或者，对贴装后的电路板进行塑封后形成一个整体塑封体，对于电路基板上相互干扰的电子元器件，在二者之间的路线上生成切割道，基于切割道对整体塑封体进行贯穿切割，以得到2个及以上的分离塑封体，然后再进行屏蔽层喷涂，利用分离塑封体之间的间隔实现屏蔽体的中断。上述方法中，一方面，对于小型芯片来说，由于需要在基板的对应位置留有余地以用于形成切割道，那么相应的会占用基板的空间，并不适用小型化的需求，另一方面，对于大型芯片来说，在确定芯片之间或者区域之间的干扰时，间隔路径很有可能落在某一个元件或某一 个完整的区域上，那么不可能对元件或完整区域进行切割。
发明内容
本发明要解决的技术问题是为了克服现有技术中的上述缺陷，提供一种SIP封装组件及其封装方法、制作方法。
本发明是通过下述技术方案来解决上述技术问题：
一种SIP封装组件，所述封装组件的塑封体的一体外表面包括至少两个屏蔽层区域；
其中，任意两个屏蔽层区域之间为间隔区域。
较佳地，所述封装组件包括基板，所述基板上设有至少两个器件；
所述间隔区域的位置与所述基板上的第一区域相对应；
所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域。
较佳地，所述封装组件包括基板，所述基板上设有至少一个干扰源器件和至少一个与所述干扰源器件对应的被干扰器件；
所述间隔区域的位置与所述基板上的第二区域相对应；
所述第二区域包括干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域。
一种SIP封装组件的封装方法，所述封装方法包括：
在所述封装组件的塑封体的一体外表面生成至少两个屏蔽层区域；其中，任意两个屏蔽层区域之间为间隔区域。
较佳地，所述封装组件包括基板，所述基板上设有至少两个器件，所述在所述封装组件的外表面生成至少两个屏蔽层区域的步骤之前，所述封装方法包括：
确定所述基板上的第一区域，所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域；
基于所述第一区域确定所述间隔区域的位置。
较佳地，所述封装组件包括基板，所述基板上设有至少一个干扰源器件和至 少一个与所述干扰源器件对应的被干扰器件，所述在所述封装组件的外表面生成至少两个屏蔽层区域的步骤之前，所述封装方法包括：
确定所述基板上的第二区域，所述第二区域包括干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域；
基于所述第二区域确定所述间隔区域的位置。
一种SIP封装组件的制作方法，所述制作方法包括：
在所述封装组件的外表面放置一模具；
基于EMI Coating在包含所述模具的封装组件的塑封体的一体外表面生成屏蔽层；
移除所述模具，以得到间隔区域和至少两个屏蔽层区域，所述模具放置的位置为所述间隔区域的位置。
较佳地，还包括：
提供一基板；
在所述基板的表面安装至少两个器件；
对所述基板进行塑封操作得到所述封装组件；
基于所述基板上的第一区域的位置制作所述模具，所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域，或，基于所述基板上的第二区域的位置制作所述模具，所述第二区域包括所述至少两个器件中干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域。
一种SIP封装组件的制作方法，所述制作方法包括：
基于EMI Coating在所述封装组件的塑封体的一体外表面生成屏蔽层；基于激光蚀刻工艺在所述屏蔽层上蚀刻得到间隔区域，并得到至少两个屏蔽层区域，任意两个屏蔽层区域之间为间隔区域。
较佳地，还包括：
提供一基板；
在所述基板的表面安装至少两个器件；
对所述基板进行塑封操作得到所述封装组件；
其中，所述间隔区域的位置基于所述基板上的第一区域的位置确定，所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域，或，所述间隔区域的位置基于基于所述基板上的第二区域的位置确定，所述第二区域包括所述至少两个器件中干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域。
本发明的积极进步效果在于：通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响周边器件正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1为本发明实施例1的SIP封装组件的外表面屏蔽层区域的示意图；
图2为本发明实施例2的SIP封装组件的剖面结构示意图；
图3为本发明实施例2的SIP封装组件的外表面屏蔽层区域的示意图；
图4为本发明实施例3的SIP封装组件的剖面结构示意图；
图5为本发明实施例3的SIP封装组件的外表面屏蔽层区域的示意图；
图6为本发明实施例4的SIP封装组件的封装方法的流程图；
图7为本发明实施例5的SIP封装组件的封装方法的流程图；
图8为本发明实施例6的SIP封装组件的制作方法的流程图；
图9为本发明实施例7的SIP封装组件的制作方法的流程图。
具体实施方式
下面通过实施例的方式进一步说明本发明，但并不因此将本发明限制在所述的实施例范围之中。
实施例1
一种SIP封装组件，如图1所述，所述封装组件的塑封体的一体外表面包括至少两个屏蔽层区域2；需要说明的是，本实施例的封装组件的塑封体为一个整体，屏蔽层区域生成在塑封体的一体外表面，并不涉及对塑封体的开槽等来得到间隔区域。
其中，任意两个屏蔽层区域2之间为间隔区域1。
需要说明的是，封装组件的外表面整体为其屏蔽层，本示例的实现方式不需要额外增加其他硬件结构，仅仅通过外表面屏蔽层自身的间隔划分，即可实现避免屏蔽体成为高频高功率噪声的介质，进而避免器件间的相互干扰。
本实施例中，通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响封装组件上的周边器件正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。
实施例2
本实施例的SIP封装组件是在实施例1的基础上进一步改进，如图2-3所示，所述封装组件包括基板3，所述基板3上设有至少两个器件；
所述间隔区域1的位置与所述基板3上的第一区域相对应；
所述第一区域包括任意两个器件在所述基板3上的安装位置之间的区域。
需要说明的是，可以根据需要在全部或者特定几个器件两两之间的区域对应位置设置间隔区域1，亦或者，参见图2，基于高频高功率噪声的影响的考虑，选择在产生高频高功率噪声的器件41(比如PA功率放大单元)与其他相邻器件42之间的区域对应位置设置间隔区域1。
本实施例中，为了避免部分器件生成的高频高功率噪声对其他器件的影响，基于封装组件上各器件的安装位置进一步确定间隔区域的位置。通过塑封体的一 体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响封装组件上的周边器件正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。
实施例3
本实施例的SIP封装组件是在实施例1的基础上进一步改进，如图4-5所示，所述封装组件包括基板3，所述基板3上设有至少一个干扰源器件43和至少一个与所述干扰源器件43对应的被干扰器件44；
所述间隔区域1的位置与所述基板3上的第二区域相对应；
所述第二区域包括干扰源器件43和对应的被干扰器件44在所述基板3上的安装位置之间的区域。
需要说明的是，实际应用中，可以切实结合封装组件内器件之间的干扰事实，在互相干扰的器件二者之间实现干扰抑制即可，因此，在明确封装组件内部安装的器件之后，明确干扰源器件和对应的被干扰器件，进一步在干扰源器件和对应的被干扰器件之间的区域对应的位置设置间隔区域。
另外，考虑到屏蔽层的作用是进行电磁屏蔽，因此，在形成间隔区域后，还需要确保能够实现有效的电磁屏蔽，可以进一步结合实验检测参数，比如基于所述干扰源器件的辐射干扰范围确定所述间隔区域的宽度。
需要说明的是，针对大型集成芯片，干扰可能涉及多个器件与多个器件之间，或者涉及区域与区域之间，那么，在设置间隔区域的位置时，可以以区域为单位或者以多个器件所限定的区域范围为单位，获取干扰区域和被干扰区域，进而在两个区域之间的区域对应的位置设置间隔区域。
本实施例中，为了避免干扰源器件对对应的被干扰器件的影响，基于干扰源器件对对应的被干扰器件的安装位置进一步确定间隔区域的位置。通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响封装组件上的被干扰器件的正常工作，也即实现了各个屏蔽区域内的噪声信号不互相 干扰，从而达到保护特定器件和电路的效果。
实施例4
一种SIP封装组件的封装方法，所述封装组件包括基板，所述基板上设有至少两个器件，如图6所示，所述封装方法包括：
步骤11、确定基板上的第一区域，第一区域包括任意两个器件在基板上的安装位置之间的区域；
需要说明的是，可以根据需要在全部或者特定几个器件两两之间的区域对应位置设置间隔区域，亦或者，基于高频高功率噪声的影响的考虑，选择在产生高频高功率噪声的器件(比如PA功率放大单元)与其他相邻器件之间的区域对应位置设置间隔区域。
步骤12、基于第一区域确定间隔区域的位置。
步骤13、在封装组件的塑封体的一体外表面生成间隔区域和至少两个屏蔽层区域；
其中，任意两个屏蔽层区域之间为间隔区域。需要说明的是，本实施例的封装组件的塑封体为一个整体，屏蔽层区域生成在塑封体的一体外表面，并不涉及对塑封体的开槽等来得到间隔区域。
需要说明的是，封装组件的外表面整体为其屏蔽层，本示例的实现方式不需要额外增加其他硬件结构，仅仅通过外表面屏蔽层自身的间隔划分，即可实现避免屏蔽体成为高频高功率噪声的介质，进而避免器件间的相互干扰。
本实施例中，为了避免部分器件生成的高频高功率噪声对其他器件的影响，基于封装组件上各器件的安装位置进一步确定间隔区域的位置。通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响封装组件上的周边器件正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。
实施例5
一种SIP封装组件的封装方法，封装组件包括基板，基板上设有至少一个干扰源器件和至少一个与干扰源器件对应的被干扰器件，如图7所示，封装方法包括：
步骤21、确定基板上的第二区域，第二区域包括干扰源器件和对应的被干扰器件在基板上的安装位置之间的区域；
需要说明的是，实际应用中，可以切实结合封装组件内器件之间的干扰事实，在互相干扰的器件二者之间实现干扰抑制即可，因此，在明确封装组件内部安装的器件之后，明确干扰源器件和对应的被干扰器件，进一步在干扰源器件和对应的被干扰器件之间的区域对应的位置设置间隔区域。
需要说明的是，针对大型集成芯片，干扰可能涉及多个器件与多个器件之间，或者涉及区域与区域之间，那么，在设置间隔区域的位置时，可以以区域为单位或者以多个器件所限定的区域范围为单位，获取干扰区域和被干扰区域，进而在两个区域之间的区域对应的位置设置第二区域。
步骤22、基于第二区域确定间隔区域的位置。
其中，考虑到屏蔽层的作用是进行电磁屏蔽，因此，在形成间隔区域后，还需要确保能够实现有效的电磁屏蔽，可以进一步结合实验检测参数，比如基于所述干扰源器件的辐射干扰范围确定所述间隔区域的宽度。
步骤23、在封装组件的塑封体的一体外表面生成间隔区域和至少两个屏蔽层区域；
其中，任意两个屏蔽层区域之间为间隔区域。需要说明的是，本实施例的封装组件的塑封体为一个整体，屏蔽层区域生成在塑封体的一体外表面，并不涉及对塑封体的开槽等来得到间隔区域。
本实施例中，为了避免干扰源器件对对应的被干扰器件的影响，基于干扰源器件对对应的被干扰器件的安装位置进一步确定间隔区域的位置。通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响封装 组件上的被干扰器件的正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。
实施例6
一种SIP封装组件的制作方法，如图8所示，具体包括：
步骤31、提供一基板；
步骤32、在基板的表面安装至少两个器件；
步骤33、对基板进行塑封操作得到封装组件；
需要说明的是，封装组件的工艺流程还可能包括但不限于基板烘烤、印锡膏、表面检查、表面贴装、光学检测、回流焊、去助焊剂、X光检测、机械开槽、等离子清洗、打线键合等操作流程，根据需要具体进行执行，本申请不作限定。
步骤34、基于基板上的第一区域的位置制作模具，或，基于基板上的第二区域的位置制作模具；
其中，第一区域包括任意两个器件在基板上的安装位置之间的区域，第二区域包括至少两个器件中干扰源器件和对应的被干扰器件在基板上的安装位置之间的区域，另外，还可以进一步结合实验检测参数，所述间隔区域的宽度比如基于所述干扰源器件的辐射干扰范围确定所述模具的宽度。需要说明的是，模板制作可以在封装组件的制作之前制作好。需要说明的是，针对大型集成芯片，干扰可能涉及多个器件与多个器件之间，或者涉及区域与区域之间，那么，在设置间隔区域的位置时，可以以区域为单位或者以多个器件所限定的区域范围为单位，获取干扰区域和被干扰区域，进而在两个区域之间的区域对应的位置设置第二区域。
步骤35、在封装组件的塑封体的一体外表面放置模具；
步骤36、基于EMI Coating在包含模具的封装组件的外表面生成屏蔽层；其中，EMI Coating方式主要分为Sputtering(溅射)和Spray Coating(喷涂)两种，Coating(涂层)材料整体接地，以完成电磁屏蔽的作用，也可以通过其他 方式实现屏蔽层的生成。需要说明的是，本实施例的封装组件的塑封体为一个整体，屏蔽层区域生成在塑封体的一体外表面，并不涉及对塑封体的开槽等来得到间隔区域。
步骤37、移除模具，以得到间隔区域和至少两个屏蔽层区域；模具放置的位置为间隔区域的位置。
本实施例中，利用模具来辅助屏蔽层的生成进而自动得到划分好区域的屏蔽层，通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响封装组件上的被干扰器件的正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。
实施例7
一种SIP封装组件的制作方法，如图9所示，具体包括：
步骤41、提供一基板；
步骤42、在基板的表面安装至少两个器件；
步骤43、对基板进行塑封操作得到封装组件；
需要说明的是，封装组件的工艺流程还可能包括但不限于基板烘烤、印锡膏、表面检查、表面贴装、光学检测、回流焊、去助焊剂、X光检测、机械开槽、等离子清洗、打线键合等操作流程，根据需要具体进行执行，本申请不作限定。
步骤44、基于EMI Coating在封装组件的塑封体的一体外表面生成屏蔽层；
其中，EMI Coating方式主要分为Sputtering(溅射)和Spray Coating(喷涂)两种，Coating(涂层)材料整体接地，以完成电磁屏蔽的作用，也可以通过其他方式实现屏蔽层的生成。需要说明的是，本实施例的封装组件的塑封体为一个整体，屏蔽层区域生成在塑封体的一体外表面，并不涉及对塑封体的开槽等来得到间隔区域。
步骤45、基于激光蚀刻工艺在屏蔽层上蚀刻得到间隔区域，并得到至少两个屏蔽层区域；任意两个屏蔽层区域之间为间隔区域。
其中，所述间隔区域的位置基于所述基板上的第一区域的位置确定，所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域，或，所述间隔区域的位置基于基于所述基板上的第二区域的位置确定，所述第二区域包括所述至少两个器件中干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域，另外，还可以进一步结合实验检测参数，比如基于所述干扰源器件的辐射干扰范围确定所述间隔区域的宽度。需要说明的是，针对大型集成芯片，干扰可能涉及多个器件与多个器件之间，或者涉及区域与区域之间，那么，在设置间隔区域的位置时，可以以区域为单位或者以多个器件所限定的区域范围为单位，获取干扰区域和被干扰区域，进而在两个区域之间的区域对应的位置设置第二区域。
本实施例中，利用激光蚀刻或其他蚀刻加工手段对完整的屏蔽层进行时刻划分以得到间隔区域，进而通过塑封体的一体外表面的屏蔽层的划分，避免屏蔽体成为高频高功率噪声的介质，影响封装组件上的器件的正常工作，也即实现了各个屏蔽区域内的噪声信号不互相干扰，从而达到保护特定器件和电路的效果。
虽然以上描述了本发明的具体实施方式，但是本领域的技术人员应当理解，这仅是举例说明，本发明的保护范围是由所附权利要求书限定的。本领域的技术人员在不背离本发明的原理和实质的前提下，可以对这些实施方式做出多种变更或修改，但这些变更和修改均落入本发明的保护范围。

Claims (10)

  1. 一种SIP封装组件，其特征在于，所述封装组件的塑封体的一体外表面形成有至少两个屏蔽层区域；
    其中，任意两个屏蔽层区域之间为间隔区域。
  2. 如权利要求1所述的SIP封装组件，其特征在于，所述封装组件包括基板，所述基板上设有至少两个器件；
    所述间隔区域的位置与所述基板上的第一区域相对应；
    所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域。
  3. 如权利要求1所述的SIP封装组件，其特征在于，所述封装组件包括基板，所述基板上设有至少一个干扰源器件和至少一个与所述干扰源器件对应的被干扰器件；
    所述间隔区域的位置与所述基板上的第二区域相对应；
    所述第二区域包括干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域。
  4. 一种SIP封装组件的封装方法，其特征在于，所述封装方法包括：
    在所述封装组件的塑封体的一体外表面生成至少两个屏蔽层区域；
    其中，任意两个屏蔽层区域之间为间隔区域。
  5. 如权利要求4所述的SIP组件的封装方法，其特征在于，所述封装组件包括基板，所述基板上设有至少两个器件，所述在所述封装组件的外表面生成至少两个屏蔽层区域的步骤之前，所述封装方法包括：
    确定所述基板上的第一区域，所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域；
    基于所述第一区域确定所述间隔区域的位置。
  6. 如权利要求4所述的SIP组件的封装方法，其特征在于，所述封装组件包括基板，所述基板上设有至少一个干扰源器件和至少一个与所述干 扰源器件对应的被干扰器件，所述在所述封装组件的外表面生成至少两个屏蔽层区域的步骤之前，所述封装方法包括：
    确定所述基板上的第二区域，所述第二区域包括干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域；
    基于所述第二区域确定所述间隔区域的位置。
  7. 一种SIP封装组件的制作方法，其特征在于，所述制作方法包括：
    在所述封装组件的外表面放置一模具；
    基于EMI Coating在包含所述模具的封装组件的塑封体的一体外表面生成屏蔽层；
    移除所述模具，以得到间隔区域和至少两个屏蔽层区域，所述模具放置的位置为所述间隔区域的位置。
  8. 如权利要求7所述的SIP封装组件的制作方法，其特征在于，还包括：
    提供一基板；
    在所述基板的表面安装至少两个器件；
    对所述基板进行塑封操作得到所述封装组件；
    基于所述基板上的第一区域的位置制作所述模具，所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域，或，基于所述基板上的第二区域的位置制作所述模具，所述第二区域包括所述至少两个器件中干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域。
  9. 一种SIP封装组件的制作方法，其特征在于，所述制作方法包括：
    基于EMI Coating在所述封装组件的塑封体的一体外表面生成屏蔽层；
    基于激光蚀刻工艺在所述屏蔽层上蚀刻得到间隔区域，并得到至少两个屏蔽层区域，任意两个屏蔽层区域之间为间隔区域。
  10. 如权利要求9所述的SIP封装组件的制作方法，其特征在于，还包括：
    提供一基板；
    在所述基板的表面安装至少两个器件；
    对所述基板进行塑封操作得到所述封装组件；
    其中，所述间隔区域的位置基于所述基板上的第一区域的位置确定，所述第一区域包括任意两个器件在所述基板上的安装位置之间的区域，或，所述间隔区域的位置基于基于所述基板上的第二区域的位置确定，所述第二区域包括所述至少两个器件中干扰源器件和对应的被干扰器件在所述基板上的安装位置之间的区域。
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