WO2020024830A1 - 线路板组件、感光组件、摄像模组及感光组件制作方法 - Google Patents

线路板组件、感光组件、摄像模组及感光组件制作方法 Download PDF

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Publication number
WO2020024830A1
WO2020024830A1 PCT/CN2019/097055 CN2019097055W WO2020024830A1 WO 2020024830 A1 WO2020024830 A1 WO 2020024830A1 CN 2019097055 W CN2019097055 W CN 2019097055W WO 2020024830 A1 WO2020024830 A1 WO 2020024830A1
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Prior art keywords
layer
photosensitive
flexible board
electrodes
filling
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PCT/CN2019/097055
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English (en)
French (fr)
Inventor
黄桢
王明珠
赵波杰
田中武彦
陈振宇
郭楠
Original Assignee
宁波舜宇光电信息有限公司
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Publication of WO2020024830A1 publication Critical patent/WO2020024830A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50Constructional details
    • H04N23/54Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/57Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices

Definitions

  • the present application relates to the field of optical technology, and in particular, the present application relates to a circuit board component, a photosensitive component, a camera module, and a manufacturing method thereof.
  • the camera module usually includes an optical lens component and a photosensitive component.
  • the photosensitive component usually includes a circuit board and a photosensitive chip installed on the circuit board.
  • the photosensitive chip is usually connected to the circuit layer through a "gold wire” (ie, wire bonding or wire bonding) process or a flip chip (ie, flip chip) process.
  • the gold wire has a certain arc height. Therefore, in order to avoid the gold wire in the module, an extra height is usually added. Therefore, the existence of the gold wire may hinder the miniaturization of the module.
  • the flip chip process uses the flip chip process to solve a series of problems brought about by gold wires.
  • the flip chip process since the chip is directly attached to the bottom side of the circuit board, and then the chip and the circuit board are connected by a gold ball, the conduction length of the circuit board and the photosensitive chip is greatly shortened in this process. Reduced delay and effectively improved electrical performance.
  • the Flip Chip process has high requirements for conduction accuracy and flatness, and it is necessary to use a ceramic substrate with high structural strength and not easy to bend as a circuit board (ie, a circuit board), and its price is very expensive.
  • this process solution requires that the pad size and pad density of the circuit board be the same or substantially the same as the pad size and pad density of the photosensitive chip.
  • the minimum size of the pads of the circuit board is limited, and the gold ball bump line width is large, such as about 100um.
  • the number of pads that can be arranged on the photosensitive chip is reduced, or increasing the number of pads will increase the size of the photosensitive chip, which is not conducive to reducing the size of the camera module.
  • the higher the number of pixels of the photosensitive chip the larger the amount of image data that needs to be output, and more I / O ports are required to output data.
  • the smaller number of pads results in fewer I / O ports for output data. Therefore, the existing flip chip process is not conducive to increasing the number of pixels of the photosensitive chip.
  • the present application provides a solution capable of overcoming at least one drawback of the prior art.
  • a photosensitive component including: a photosensitive chip having a photosensitive region and a non-photosensitive region surrounding the photosensitive region, wherein the non-photosensitive region is provided with a plurality of chip electrodes; A board having a through hole corresponding to the photosensitive region, the soft board having a plurality of soft board electrodes, and a rewiring layer including: a filling layer formed on a surface of the soft board; and a metal pillar, which Formed on the surface of the flexible board electrode and covered by the filling layer; a rewiring layer trace that is covered by the filling layer; and a plurality of redistribution layer electrodes that are exposed outside the filling layer, and The redistribution layer is routed through the redistribution layer and the metal pillar is electrically connected to the flexible board electrode; wherein the photosensitive chip is attached to the redistribution layer, and the plurality of redistribution layer electrodes are respectively connected to the redistribution layer electrode.
  • the rewiring layer electrode is closer to the through hole than the flexible board electrode; the area of the rewiring layer electrode is smaller than the area of the flexible board electrode.
  • the thickness of the rewiring layer trace is greater than 20 ⁇ m.
  • the density of the plurality of redistribution layer electrodes is higher than the density of the plurality of flexible board electrodes; the width of the traces of the redistribution layer is smaller than the width of the traces of the flexible board.
  • the metal pillar is a copper pillar.
  • the photosensitive component further includes a metal sheet having a groove, the metal sheet is attached to a surface of the rewiring layer, and the photosensitive chip is located in the groove.
  • the rewiring layer has a groove, and the photosensitive chip is located in the groove; the photosensitive component further includes a metal sheet attached to a surface of the rewiring layer and covering the rewiring layer. Photosensitive chip.
  • the photosensitive chip is not in contact with the metal sheet.
  • the photosensitive component further includes a molding layer, and the molding layer is formed on the redistribution layer and the back surface of the photosensitive chip.
  • the flexible board and the photosensitive chip are located on the upper and lower sides of the rewiring layer, respectively; or the flexible board and the photosensitive chip are located on the same side of the rewiring layer.
  • the redistribution layer has a plurality of redistribution layer traces, wherein the thickness of each redistribution layer trace is greater than 20 ⁇ m; and the redistribution layer traces in different layers are guided by metal pillars. through.
  • a circuit board assembly includes: a flexible board having a plurality of flexible board electrodes on a surface thereof; and a rewiring layer including: a filling layer formed on the flexible board A metal pillar formed on the surface of the flexible board electrode and covered by the filling layer; a rewiring layer trace that is covered by the filling layer; and a plurality of rewiring layer electrodes that are exposed on
  • the filling layer is externally connected to the flexible board electrode through the rewiring layer traces and the metal pillars; wherein the size and layout of the plurality of rewiring layer electrodes are suitable for attaching based on a flip-chip process.
  • the photosensitive chip is connected, so that the plurality of rewiring layer electrodes are in one-to-one correspondence with the plurality of chip electrodes of the photosensitive chip and are turned on.
  • the rewiring layer electrode is closer to the through hole than the flexible board electrode.
  • the area of the rewiring layer electrode is smaller than the area of the flexible board electrode.
  • the density of the plurality of redistribution layer electrodes is higher than the density of the plurality of flexible board electrodes.
  • a camera module comprising: any one of the photosensitive components described above; and an optical lens mounted on the photosensitive component.
  • a method for manufacturing a photosensitive component comprising: 1) planting a metal post on a flexible board electrode on a flexible board surface; 2) filling an insulating material on the flexible board surface to form a flat filling layer, And expose the metal pillars planted in step 1); 3) make a rewiring layer trace on the surface of the filling layer, and the rewiring layer trace is in conduction with the metal pillar; 4) the rewiring layer traces Part of the area is planted with metal pillars; 5) The surface of the filling layer is filled with insulating material again so that the filling layer covers the rewiring layer traces and exposes the metal pillars planted in step 4); repeat step 3) ⁇ 5) Until a predetermined number of redistribution layer traces are completed, a complete redistribution layer is obtained, and a plurality of redistribution layer electrodes are formed on the metal pillars that are finally exposed; 6) a photosensitive chip is
  • the filling layer is made by a molding process.
  • the manufacturing of the filling layer includes: 21) forming a molding layer on the surface of the flexible board by a molding process; 22) grinding the molding layer to make the surface flat and exposing the surface in step 1) Plant metal columns.
  • step 22 the surface of the filling layer is made flush with the surface of the metal pillar planted in step 1).
  • the manufacturing of the filling layer includes: 51) forming a molding layer on a surface of an existing filling layer by a molding process; 52) grinding the molding layer to make the surface flat and exposed Step 4) The planted metal column.
  • the surface of the filling layer is made flush with the surface of the metal pillar planted in step 4).
  • the area of the metal-planted column is determined through alignment calibration.
  • the method further includes the surface of the flexible board.
  • a through hole is made in the center of the center and the center of the rewiring layer formed on the flexible board, and the through hole corresponds to the photosensitive area of the photosensitive chip.
  • step 6 perform step: 7) attach a metal sheet with a groove on the surface of the rewiring layer, so that the photosensitive chip is accommodated in the groove, and the metal sheet and the The photosensitive chip is not in contact.
  • the step 3) includes: 31) forming a seed layer on the surface of the existing filling layer; 32) arranging a photoresist on the surface of the seed layer and exposing it; 33) developing to produce a wiring groove; 34) A metal material is arranged in the wire groove to form a redistribution layer trace; 35) The seed layer and the photoresist that are not attached to the redistribution layer trace are removed.
  • another method for manufacturing a photosensitive component including: 1) arranging metal pillars on the surface of the carrier board; 2) filling the surface of the carrier board with an insulating material to form a flat filling layer, and exposing steps 1) the arranged metal pillars; 3) making a redistribution layer trace on the surface of the filling layer, and the redistribution layer trace is electrically connected to the metal pillar; 4) a portion of the redistribution layer trace Area plant metal pillars; 5) Fill the surface of the filling layer with insulating material again, so that the filling layer covers the rewiring layer traces and exposes the metal pillars implanted in step 4); repeat steps 3) to 5) Until a predetermined number of rewiring layers are produced, a complete rewiring layer is obtained, and a plurality of rewiring layer electrodes are formed on the metal pillars that are finally exposed; 6) the carrier board to which the rewiring layer is attached
  • the present application can realize the connection of the circuit board pads / circuits with larger line widths to the light-sensitive chips with smaller contacts, and realize the high-density packaging of the light-sensitive chips of the camera module.
  • the present application can realize that the circuit board pads relatively close to the outside of the light window are conducted to the chip pads closer to the light window.
  • the present application can realize that the camera module uses a conventional printed circuit board to implement a flip chip process, so as to achieve a high I / O number package.
  • FIG. 1 is a schematic cross-sectional view of a photosensitive component according to an embodiment of the present application
  • FIG. 2 shows a schematic diagram of a copper pillar 1023a on a flexible board electrode 1033 of a flexible board 101 in step S100;
  • FIG. 3 shows a schematic diagram of filling the surface of the flexible board 101 with an insulating material to form a flat filling layer 1021 in step S200;
  • FIG. 4 shows a schematic diagram of grinding and filling the layer in step S300
  • FIG. 5 shows a schematic diagram of forming a seed copper layer 1029 on the surface of the ground filling layer 1021 after grinding in step S400;
  • FIG. 6 shows a schematic diagram of making a rewiring layer trace 1024 based on the seed copper layer in step S500;
  • FIG. 7 shows a schematic diagram of copper implantation in a part of the routing area of the redistribution layer in step S600;
  • FIG. 8 shows a schematic diagram of removing the seed copper layer 1029 in step S700
  • FIG. 9 shows a schematic diagram of refilling an insulating material on the surface of an existing filling layer in step S800;
  • FIG. 10 shows a schematic diagram of grinding and filling the filling layer to make its surface flat and exposing the copper pillars planted in step S600 in step S900;
  • FIG. 11 shows a schematic diagram of a completed rewiring layer
  • FIG. 12 is a schematic diagram of solder resist printing on the surface of the rewiring layer in step S1600; FIG.
  • FIG. 13 shows a schematic diagram of forming a through hole 1013 in the center of the flexible board and the redistribution layer in step S1700;
  • FIG. 14 shows a schematic diagram of attaching the photosensitive chip 103 to the surface of the redistribution layer in step S1800;
  • FIG. 15 shows a schematic diagram of a photosensitive assembly in which a redistribution layer electrode is implemented as a gold ball
  • FIG. 16 shows a schematic diagram of attaching a steel sheet to the surface of the redistribution layer in step S1900;
  • FIG. 17 shows a schematic diagram of forming a mold layer on the redistribution layer and the back surface of the photosensitive chip in step S1900;
  • FIG. 18 shows a schematic diagram of grinding the molding layer 105 to thin the molding layer
  • FIG. 19 is a schematic diagram of a photosensitive component in another embodiment of the present application.
  • the expressions of the first, second, etc. are only used to distinguish one feature from another feature, and do not indicate any limitation on the feature. Therefore, without departing from the teachings of this application, the first subject discussed below may also be referred to as the second subject.
  • FIG. 1 is a schematic cross-sectional view of a photosensitive component according to an embodiment of the present application.
  • the photosensitive assembly includes a photosensitive chip 103, a flexible board 101, and a rewiring layer 102.
  • the photosensitive chip 103 has a photosensitive region 1031 and a non-photosensitive region 1032 surrounding the photosensitive region 1031.
  • the non-photosensitive region 1032 is provided with a plurality of chip electrodes 1033.
  • the plurality of chip electrodes 1033 (or may be referred to as chip pads) may surround the photosensitive region 1031.
  • the flexible board 101 in this embodiment may also be referred to as a flexible circuit board (ie, an FPC board).
  • the flexible board has a through hole 1013 corresponding to the photosensitive area, and the flexible board has a plurality of flexible board electrodes.
  • the redistribution layer 102 includes a filling layer 1021, a metal pillar 1023, a redistribution layer trace 1024, and a plurality of redistribution layer electrodes 1022.
  • the filling layer 1021 is formed on the surface of the flexible board 101 (the lower surface in FIG. 1).
  • the metal pillar 1023 is formed on the surface of the flexible board electrode 1014 and is covered with the filling layer 1021.
  • the redistribution layer trace 1024 is covered by the filling layer 1021, and a plurality of redistribution layer electrodes 1022 are exposed to the outside of the filling layer 1021, and are connected to the corresponding flexible board electrode 1014 through the redistribution layer trace 1024 and the metal pillar 1023.
  • the photosensitive chip 103 is attached to the redistribution layer 102, and the plurality of redistribution layer electrodes 1022 are in contact with the plurality of chip electrodes 1033 in a one-to-one correspondence and are turned on.
  • the through-hole 1013 may be a light-through hole, and the position and size of the through-hole are adapted to the photosensitive region 1031 of the photosensitive chip 103.
  • the area of the flexible board electrode 1014 may be larger than that of the redistribution layer electrode 1022.
  • the area of the redistribution layer electrode 1022 matches the area of the chip electrode 1033 (for example, is equal or substantially equal).
  • the flexible board electrode 1014 is located outside the redistribution layer electrode 1022 (that is, the redistribution layer electrode 1022 is closer to the light-through hole than the flexible board electrode 1014).
  • the electrodes may be all metal electrodes.
  • the thickness of its copper layer needs to be less than 20 ⁇ m, and in order to ensure the electrical performance of the circuit of the circuit board (for example, the impedance cannot be too large, The smaller the cross-sectional area, the greater the impedance), and the trace width of the circuit board (referring to the width of the trace itself in plan view) is at least 80 ⁇ m.
  • the copper layer of the wiring layer is formed layer by layer, and its thickness is not limited. Therefore, the thickness of the copper layer can be increased by the wiring layer to reduce the trace width.
  • the wiring layer of the present application forms a wiring by an addition method, which has higher process accuracy, so the wiring width of the wiring layer can be 30 ⁇ m.
  • the circuit board assembly composed of the flexible board 101 and the redistribution layer 102 can have a small area and densely arranged metal electrodes (that is, pads). ), So that the electrodes (that is, the pads) of the circuit board assembly can be in one-to-one contact and conductive with the densely arranged chip electrodes 1033, thereby helping to increase the number of pixels of the photosensitive component of the filp chip process solution, while avoiding It has solved various defects brought about by the existing wire bond technology.
  • connection belt of the photosensitive component in the above embodiment is formed by using a flexible board, which can avoid attaching the connection belt after attaching the photosensitive chip through a process that requires high temperature hot pressing such as ACF.
  • the connecting strip can electrically connect the hard board area to the connector so as to be electrically connected to the main board of the terminal device (such as a mobile phone).
  • the flexible board can be directly used as a connection belt of the photosensitive component.
  • the flexible board itself may not have the functional circuit of the photosensitive component.
  • the functional circuit of the photosensitive component may be integrated into the rewiring layer and the photosensitive chip.
  • the electrical function of the circuit board, so the redistribution layer can also be called a wiring layer or a substrate-like substrate.
  • the thickness of the redistribution layer trace is greater than 20 ⁇ m, so as to increase the cross-sectional area of the trace, thereby reducing the redistribution layer trace without increasing the impedance of the trace.
  • the width is greater than 20 ⁇ m, so as to increase the cross-sectional area of the trace, thereby reducing the redistribution layer trace without increasing the impedance of the trace.
  • the circuit board assembly composed of the flexible board 101 and the redistribution layer 102 can have small areas and densely arranged metal electrodes (that is, pads), which can make the electrodes of the circuit board assembly ( That is, the pads) can be in contact with and turned on in a one-to-one correspondence with the densely arranged chip electrodes 1033, thereby helping to increase the number of pixels of the photosensitive component of the filp chip process solution, while avoiding the current wire bonding process.
  • Various defects are possible.
  • FIG. 2-14 shows a manufacturing process of a photosensitive component according to an embodiment of the present application ( Figure 15-17 shows some optional steps of the manufacturing process of a photosensitive component), and the process includes the following steps.
  • a copper pillar is planted on a flexible board electrode (that is, a flexible board pad) of the flexible board. It should be noted that this step should be performed before the lamination of the flexible board cover film. After the copper is implanted, the cover film is laminated on a portion of the flexible board that does not correspond to the wiring layer.
  • the copper pillar may also be a metal pillar formed of other metal materials, which will not be described in detail hereinafter.
  • FIG. 2 shows a schematic diagram of the copper pillar 1023a on the flexible board electrode 1033 of the flexible board 101 in step S100.
  • the process of copper implantation can include seed copper plating, photoresist layout (can be a photoresist dry film, or spin coating), exposure, development, copper plating, photoresist removal, and photoresist removal. Seed copper and other process steps.
  • a layer of seed copper (such as a titanium copper seed copper layer) is sputtered on the surface of the substrate, which can improve the bonding force between the substrate and the metal wiring material.
  • FIG. 3 shows a schematic diagram of filling the surface of the flexible board 101 with an insulating material to form a flat surface filling layer 1021 in step S200.
  • the filling material may cover the copper pillars.
  • the filling material may be fabricated on the surface of the flexible board by a molding process.
  • the molding process can be compression molding or insert molding (transfer molding is sometimes referred to as injection molding).
  • step S300 the filling layer is ground to make the surface flat and the copper pillars implanted in step S100 are exposed.
  • FIG. 4 shows a schematic diagram of grinding and filling the layer in step S300. Referring to FIG. 4, in one embodiment, the surface of the filling layer 1021 can be made flush with the surface of the copper pillar 1023 a implanted in step S100.
  • FIG. 5 shows a schematic diagram of forming a seed copper layer 1029 on the surface of the packed layer 1021 after grinding in step S400.
  • the seed copper layer is sputtered on the surface of the filling layer to improve the bonding force between the filling layer and the metal wiring material.
  • FIG. 6 shows a schematic diagram of making a rewiring layer trace 1024 based on the seed copper layer in step S500.
  • the method of making the redistribution trace 1024 can be realized based on a process of pressing a film (that is, a process of attaching a photoresist dry film, which is not described in detail below), exposure, development, and copper plating.
  • the wiring of the rewiring layer is conductive with the metal pillar.
  • the redistribution layer wiring can also form a circuit according to a predetermined design, and this circuit can be used as a functional circuit of the photosensitive component.
  • FIG. 7 shows a schematic diagram of copper implantation in a part of the routing area of the redistribution layer in step S600. Copper implantation can be achieved by pressing, exposing, developing, and electroplating copper pillars. In one embodiment, the area of the copper implanted column can be determined by alignment calibration. Referring to FIG. 7, a copper pillar 1024 a is formed on a part of the surface of the redistribution layer trace 1024.
  • FIG. 8 shows a schematic diagram of removing the seed copper layer 1029 in step S700.
  • the seed copper layer not covered by the wiring layer traces can be removed by an etching process. Please note that the execution order of steps S700 and S600 can be interchanged. After the seed copper layer is removed, the surface of the filling layer is exposed.
  • FIG. 9 shows a schematic diagram of refilling an insulating material on the surface of an existing filling layer in step S800.
  • the filling material covers the copper pillar 1024a implanted in step S600 to form a new filling layer 1021.
  • FIG. 10 shows a schematic diagram of grinding and filling the filling layer to make the surface flat in step S900 and exposing the copper pillars implanted in step S600.
  • the surface of the filling layer 1021 may be flush with the surface of the copper pillar 1024a implanted in step S600.
  • a seed copper layer is formed on the surface of a currently existing filling layer.
  • the rewiring layer traces can be fabricated and formed into a circuit through a film pressing, exposure, development, and copper plating process.
  • the insulating material is filled again after the seed copper layer is removed, so that the filled layer covers the copper pillars planted in step S1200.
  • S1500 Grind the current filling layer to make the surface flat and expose the copper pillars implanted in step S1200.
  • step S1500 After step S1500 is completed, the above steps S1000-S1500 are repeated continuously to form a multilayered redistribution layer trace that is conductive with each other. Different layers of redistribution layer traces can be conducted through copper pillars. After making a predetermined number of re-routing layer traces, a completed re-routing layer is obtained.
  • FIG. 11 shows a schematic diagram of a completed rewiring layer.
  • FIG. 12 shows a schematic diagram of solder resist printing on the surface of the rewiring layer in step S1600.
  • the protective layer 1028 formed by solder mask printing is a thin film covering copper wires (or other material traces), which plays a role of insulation and also protects the wiring layer to a certain extent.
  • the protective layer can also prevent the solder from adhering to better prevent accidental attachment of the solder to copper wires that do not need to be soldered.
  • the material of the protective layer 1028 may be the same as that of the filling layer, so that the two are integrated into a whole.
  • the protective layer can be considered as part of the redistribution layer.
  • FIG. 13 shows a schematic diagram of forming a through hole 1013 in the center of the flexible board and the redistribution layer in step S1700.
  • FIG. 14 shows a schematic diagram of attaching the photosensitive chip 103 to the surface of the rewiring layer in step S1800.
  • the plurality of chip electrodes of the photosensitive chip may be in one-to-one correspondence with the plurality of rewiring layer electrodes.
  • the connection between the chip electrode of the photosensitive chip and the electrode of the redistribution layer can be achieved by means of anisotropic conductive adhesive, ultrasonic welding, thermal compression welding or reflow soldering.
  • attaching the photosensitive chip on the surface of the rewiring layer can be implemented based on a flip chip process.
  • the redistribution layer electrode may be implemented as a copper pillar (as shown in FIG. 14) or a gold ball.
  • FIG. 15 shows a schematic view of a photosensitive member in which a redistribution layer electrode is implemented as a gold ball.
  • FIG. 16 is a schematic diagram of attaching a steel sheet to the surface of the redistribution layer in step S1900.
  • the steel sheet 104 has a groove 104a, and the photosensitive chip is received in the groove 104a.
  • the steel sheet is not in contact with the photosensitive chip and the insulating buffer layer may be filled between the steel sheet and the photosensitive chip based on an underfill process. After attaching the steel sheet, you can get a complete photosensitive assembly.
  • the steel sheet 104 is attached to the back of the redistribution layer 102, which can isolate the photosensitive chip 103 from the external environment and prevent the photosensitive chip 103 from being damaged by external force.
  • a reserved gap can be maintained between the steel sheet 104 and the photosensitive chip 103, so as to prevent collision between the steel sheet 104 and the photosensitive chip 103 and cause damage to the photosensitive chip 103 or electrical connection failure.
  • the gap can be filled with air, glue, molding, insulation, etc. to better protect the chip.
  • the steel sheet in step S1900, may be replaced by a molding layer.
  • a molding process may be used to form a molding layer on the redistribution layer and the back surface of the photosensitive chip.
  • FIG. 17 shows a schematic view of forming a molding layer on the redistribution layer and the back surface of the photosensitive chip in step S1900.
  • the back surfaces of the redistribution layer 102 and the photosensitive chip 103 may be filled based on an underfill process, and then the molding layer 105 may be formed based on the molding process.
  • step S1900 the surface of the molding layer 105 is further polished to thin the molding layer 105.
  • FIG. 18 shows a schematic diagram of grinding the molding layer 105 to thin the molding layer.
  • the rewiring layer can be understood as a substrate-like.
  • This type of substrate has different manufacturing processes from conventional substrates (such as rigid boards and flexible boards, where rigid boards are PCB boards and flexible boards are FPC boards).
  • the substrate-like substrate is formed into circuit layers by laminating, exposing, developing, copper plating, filling, and polishing. Because the substrate-like filling material is used with high strength and good heat resistance (not easily deformed by heat) ), So the substrate has a higher flatness, and each layer of the circuit layer will be polished (that is, to provide a forming plane for the next layer), and each layer is conducted through a copper pillar, Instead of blind holes and through holes in the hard board, each layer is conducted.
  • Blind holes and through-holes are formed by drilling and hole-filling processes. Insufficient filling of blind holes and through-holes may cause disconnection, and excessive holes may cause short circuits. Therefore, this application can avoid many problems caused by the drilling and hole-filling processes. Compared with the traditional rigid board or rigid-flex board, it can have higher accuracy and better electrical performance.
  • the conduction between the flexible board and the substrate-like substrate is formed directly on the flexible board, that is, the flexible board and the substrate-like substrate are realized by copper-plated pillars on the flexible board. It can replace the conduction mode of the hot-press conductive silver glue, which has higher reliability.
  • another method for manufacturing a photosensitive component including:
  • a metal pillar is arranged on the surface of the carrier board.
  • a seed copper layer is sputtered on the surface of the carrier board before the metal pillars are arranged.
  • the carrier board is a copper substrate.
  • step S20 Fill the surface of the carrier board with an insulating material to form a flat filling layer, and expose the metal pillars arranged in step S10;
  • step S50 Fill the surface of the filling layer with an insulating material again so that the filling layer covers the wiring of the redistribution layer and exposes the metal pillars implanted in step S40.
  • the plurality of redistribution layer electrodes are in one-to-one correspondence with the plurality of chip electrodes of the photosensitive chip and are electrically connected (for example, they can be electrically conducted by ultrasonic welding, thermocompression welding, or the like).
  • a conductive material such as nickel, palladium, gold, or tin can be further plated on a metal pillar (referring to a metal pillar that attaches a flexible board to a redistribution layer, and the metal pillar can be implemented as a copper pillar), thereby improving conductivity. effectiveness.
  • FIG. 19 shows a schematic diagram of a photosensitive component in another embodiment of the present application.
  • another photosensitive component is provided, and the rewiring layer 102 of the photosensitive component may have a groove 102a.
  • the center of the groove 102a is a through hole 1013, which is a light through hole corresponding to the photosensitive region 1031.
  • a photosensitive chip 103 is attached to the rewiring layer 102, and the photosensitive chip 103 is received in the groove 102a.
  • a step surrounding the through hole 1013 is formed on the back surface of the redistribution layer 102 (or its filling layer 1021), thereby forming a groove 102a.
  • the photosensitive component further includes a steel sheet 104 attached to the back surface of the redistribution layer and covering the photosensitive chip 103.
  • the steel sheet 104 isolates the photosensitive chip 103 from the external environment and prevents the photosensitive chip 103 from being damaged by an external force.
  • a reserved gap can be maintained between the steel sheet 104 and the photosensitive chip 103, so as to prevent collision between the steel sheet 104 and the photosensitive chip 103 and cause damage to the photosensitive chip 103 or electrical connection failure.
  • the gap can be filled with air, glue, molding, insulation, etc. to better protect the chip.
  • the steel sheet 104 may be replaced by other metal sheets.
  • the flexible board and the photosensitive chip are located on the upper and lower sides of the redistribution layer, respectively.
  • the present application is not limited to this.
  • the flexible board and the photosensitive chip may be located on the same side of the rewiring layer (for example, both are located on the lower side of the rewiring layer).

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Abstract

本申请提供了一种感光组件,包括:感光芯片;软板,其具有与所述感光区域对应的通孔,所述软板具有多个软板电极;以及再布线层,其包括:填充层,其形成于所述软板表面;金属柱,其形成于所述软板电极表面,并被所述填充层覆盖;再布线层走线,其被所述填充层覆盖;以及多个再布线层电极,其暴露在所述填充层外部,并通过所述再布线层走线以及所述金属柱与所述软板电极导通;其中,所述感光芯片附接于所述再布线层,并且所述多个再布线层电极分别与感光芯片的多个芯片电极一一对应地接触并导通。本申请还提供了相应的线路板组件、摄像模组和感光组件制作方法。本申请可以实现摄像模组感光芯片的高密度封装;可以实现高I/O数的封装。

Description

线路板组件、感光组件、摄像模组及感光组件制作方法
相关申请的交叉引用
本申请要求于2018年8月1日递交于中国国家知识产权局(CNIPA)的、申请号为201810864992.0、发明名称为“线路板组件、感光组件、摄像模组及感光组件制作方法”的中国发明专利申请的优先权和权益,该申请通过引用整体并入本文。
技术领域
本申请涉及光学技术领域,具体地说,本申请涉及线路板组件、感光组件、摄像模组及其制作方法。
背景技术
随着智能手机及其他电子设备的飞速发展,由于手机屏幕越来越趋向于全面屏化、轻薄化,因此对摄像模组的小型化需求越来越强烈。
摄像模组通常包括光学镜头组件和感光组件。其中感光组件通常包括线路板和安装于线路板的感光芯片。在现有的摄像模组中,感光芯片通常是通过“打金线”(即wire bond或wire bonding)工艺或倒贴芯片(即flip chip)工艺实现与电路层的导通。
传统印刷电路板,受限于电流要求、线路板材质导致的线路发热,以及印刷电路板制程能力等因素,导致常见的印刷电路板线宽线距在70μm左右。与之对应的,受限于传统线路板的线宽线距,芯片导通时也会顾及线路板的因素,焊盘间距无法再进一步减小,而其与芯片不断小型化的发展趋势相背离。另外,由于芯片的焊盘越来越密集,间距也在逐渐逼近极限,在wire bond工艺下,在这种金线十分密集的情况下,容易发生金线间干涉,从而导致电路故障。另一方面,在整个制造流程中,wire bond工艺之后还将进行一系列的例如模塑、镜座安装等步骤,都将对金线连接的可靠性造成影响。再者,金线具有一 定的弧高,因此在模组中为了避让金线通常要增加一段额外的高度,因此,金线的存在可能阻碍模组的小型化发展。
如今,部分厂商采用flip chip工艺来解决金线带来的一系列问题。例如flip chip工艺中,由于其是将芯片直接贴附于电路板底侧,而后芯片与电路板之间通过金球实现导通,这种工艺下线路板与感光芯片导通的长度大大缩短,减小了延迟,有效地提高了电性能。另一方面,Flip Chip工艺对于导通精度和平整度要求高,需要采用具有高结构强度不易弯曲的陶瓷基板来做线路板(即电路板),而其价格十分昂贵。此外,这种工艺方案要求线路板的焊盘尺寸及焊盘密集度与感光芯片的焊盘尺寸和焊盘密集度一致或基本一致。通常来说,由于工艺限制,线路板的焊盘的最小尺寸是受限的,同时金球凸点线宽较大,比如100um左右。为了适应flip chip工艺,感光芯片焊盘的尺寸难以进一步缩小,以使其与线路板的焊盘尺寸适配。这样感光芯片上能够布置的焊盘数量就减少了,或者增加焊盘数量会导致感光芯片尺寸增大,不利于摄像模组的尺寸减小。这是由于感光芯片的像素越高,所需要输出的图像数据量就越大,也就需要更多的I/O端口来输出数据。而较少的焊盘数目导致输出数据的I/O端口减少。因此,现有的flip chip工艺不利于感光芯片像素数目的提高。
发明内容
本申请提供一种能够克服现有技术的至少一个缺陷的解决方案。
根据本申请的一个方面,提供了一种感光组件,包括:感光芯片,其具有感光区域和围绕在所述感光区域周围的非感光区域,其中所述非感光区域设置有多个芯片电极;软板,其具有与所述感光区域对应的通孔,所述软板具有多个软板电极;以及再布线层,其包括:填充层,其形成于所述软板的表面;金属柱,其形成于所述软板电极的表面,并被所述填充层覆盖;再布线层走线,其被所述填充层覆盖;以及多个再布线层电极,其暴露在所述填充层外部,并通过所述再布线层走线以及所述金属柱与所述软板电极导通;其中,所述感光芯片附接于所述再布线层,并且所述多个再布线层电极分别与所述多个芯片 电极一一对应地接触并导通。
其中,所述再布线层电极比所述软板电极靠近所述通孔;所述再布线层电极的面积小于所述软板电极的面积。
其中,所述再布线层走线的厚度大于20μm。
其中,所述多个再布线层电极的密集度高于所述多个软板电极的密集度;所述再布线层的走线的宽度小于所述软板的走线的宽度。
其中,所述金属柱为铜柱。
其中,所述感光组件还包括具有凹槽的金属片,所述金属片附接于所述再布线层的表面,并且所述感光芯片位于所述凹槽中。
其中,所述再布线层具有凹槽,所述感光芯片位于所述凹槽中;所述感光组件还包括金属片,所述金属片附接于所述再布线层的表面并盖住所述感光芯片。
其中,所述感光芯片与所述金属片不接触。
其中,所述感光组件还包括模塑层,所述模塑层形成在所述再布线层和所述感光芯片的背面。
其中,所述软板和所述感光芯片分别位于所述再布线层的上下两侧;或者所述软板和所述感光芯片位于所述再布线层的同一侧。
其中,所述再布线层具有多层所述再布线层走线,其中每层所述再布线层走线的厚度均大于20μm;且位于不同层的所述再布线层走线通过金属柱导通。
根据本申请的另一方面,一种线路板组件,包括:软板,所述软板的表面具有多个软板电极;以及再布线层,其包括:填充层,其形成于所述软板的表面;金属柱,其形成于所述软板电极的表面,并被所述填充层覆盖;再布线层走线,其被所述填充层覆盖;以及多个再布线层电极,其暴露在所述填充层的外部,并通过所述再布线层走线以及所述金属柱与所述软板电极导通;其中,所述多个再布线层电极的尺寸和布局适于基于倒贴工艺附接感光芯片,使得所述多个再布线层电极分别与所述感光芯片的多个芯片电极一一对应地接触并导通。
其中,所述再布线层电极比所述软板电极靠近所述通孔。
其中,所述再布线层电极的面积小于所述软板电极的面积。
其中,所述多个再布线层电极的密集度高于所述多个软板电极的密集度。
根据本申请的另一方面,还提供了一种摄像模组,包括:前文所 述的任一感光组件;以及安装于所述感光组件的光学镜头。
根据本申请的另一方面,还提供了一种感光组件制作方法,包括:1)在软板表面的软板电极植金属柱;2)在软板表面填充绝缘材料形成表面平坦的填充层,并露出步骤1)所植金属柱;3)在所述填充层表面制作再布线层走线,所述再布线层走线与所述金属柱导通;4)在所述再布线层走线的部分区域植金属柱;5)在所述填充层表面再次填充绝缘材料,使得所述填充层覆盖所述再布线层走线,并露出步骤4)所植金属柱;重复执行步骤3)~5)直至制作完预定层数的再布线层走线,得到完整的再布线层,并在最后露出的金属柱形成多个再布线层电极;6)将感光芯片附接于所述再布线层,并且所述多个再布线层电极分别与所述感光芯片的多个芯片电极一一对应地接触并导通。
其中,所述步骤2)和所述步骤4)中,所述填充层采用模制工艺制作。
其中,所述步骤2)中,所述填充层的制作包括:21)通过模制工艺在软板表面形成模制层;22)研磨所述模制层使其表面平坦并露出步骤1)所植金属柱。
其中,所述步骤22)中,使所述填充层表面与步骤1)所植金属柱的表面齐平。
其中,所述步骤5)中,所述填充层的制作包括:51)在通过模制工艺在已有的填充层表面形成模制层;52)研磨所述模制层使其表面平坦并露出步骤4)所植金属柱。
其中,所述步骤52)中,使所述填充层表面与步骤4)所植金属柱的表面齐平。
其中,所述步骤4)中,通过对位校准来确定植金属柱的区域。
其中,所述步骤1)中,所述软板表面的中央无通孔;在制作完预定层数的再布线层走线后,执行所述步骤6)之前,还包括在所述软板表面的中央及所述软板上形成的所述再布线层的中央制作通孔,所述通孔对应于所述感光芯片的感光区域。
其中,所述步骤6)之后,再执行步骤:7)在所述再布线层的表面附接具有凹槽的金属片,使所述感光芯片容纳于所述凹槽,并且所 述金属片与所述感光芯片不接触。
其中,所述步骤6)之后,再执行步骤:7)通过模塑工艺,在所述再布线层和所述感光芯片的背面形成模塑层。
其中,所述步骤3)包括:31)在已有的填充层表面形成种子层;32)对种子层的表面布置光刻胶并曝光;33)进行显影,制作出走线槽;34)在走线槽中布置金属材料,形成再布线层走线;35)去除未附着再布线层走线的种子层和光刻胶。
根据本申请的另一方面,还提供了另一种感光组件制作方法,包括:1)在载板表面布置金属柱;2)在载板表面填充绝缘材料形成表面平坦的填充层,并露出步骤1)所布置的金属柱;3)在所述填充层表面制作再布线层走线,所述再布线层走线与所述金属柱导通;4)在所述再布线层走线的部分区域植金属柱;5)在所述填充层表面再次填充绝缘材料,使得所述填充层覆盖所述再布线层走线,并露出步骤4)所植金属柱;重复执行步骤3)~5)直至制作完预定层数的再布线层走线,得到完整的再布线层,并在最后露出的金属柱形成多个再布线层电极;6)去除所述再布线层所附着的载板,并将软板附接于所述再布线层,使所述软板的电极与所述再布线层的金属柱导通;以及将感光芯片附接于所述再布线层,并且所述多个再布线层电极分别与所述感光芯片的多个芯片电极一一对应地接触并导通。
与现有技术相比,本申请具有下列至少一个技术效果:
1、本申请可以实现将线宽较大的线路板焊盘/线路导通至更小触点的感光芯片,实现摄像模组感光芯片的高密度封装。
2、本申请可以实现相对靠近光窗外侧的线路板焊盘导通至更靠近光窗的芯片焊盘。
本申请可以实现摄像模组采用常规印刷线路板实现倒贴芯片工艺,以实现高I/O数的封装。
附图说明
在参考附图中示出示例性实施例。本文中公开的实施例和附图应被视作说明性的,而非限制性的。
图1示出了本申请一个实施例的感光组件的剖面示意图;
图2示出了步骤S100中在软板101的软板电极1033上值铜柱1023a的示意图;
图3示出了步骤S200中在软板101表面填充绝缘材料形成表面平坦的填充层1021的示意图;
图4示出了步骤S300中研磨填充层的示意图;
图5示出了步骤S400中在研磨后的填充层1021表面形成种子铜层1029的示意图;
图6示出了步骤S500中基于种子铜层制作再布线层走线1024的示意图;
图7示出了步骤S600中在再布线层走线的部分区域植铜的示意图;
图8示出了步骤S700中去除种子铜层1029的示意图;
图9示出了步骤S800中在已有的填充层表面再次填充绝缘材料的示意图;
图10示出了步骤S900中研磨填充层使其表面平坦并露出步骤S600所植铜柱的示意图;
图11示出了形成完成的再布线层的示意图;
图12示出了步骤S1600中在再布线层的表面进行阻焊印刷的示意图;
图13示出了步骤S1700中在软板和再布线层的中央制作通孔1013的示意图;
图14示出了步骤S1800中在再布线层的表面贴附感光芯片103的示意图;
图15示出了再布线层电极实施为金球的感光组件的示意图;
图16示出了步骤S1900中在再布线层表面贴附钢片的示意图;
图17示出了步骤S1900中在再布线层和感光芯片的背面形成模塑层的示意图;
图18示出了对模塑层105进行研磨以减薄所述模塑层的示意图;
图19示出了本申请另一实施例中的感光组件的示意图。
具体实施方式
为了更好地理解本申请,将参考附图对本申请的各个方面做出更详细的说明。应理解,这些详细说明只是对本申请的示例性实施方式的描述,而非以任何方式限制本申请的范围。在说明书全文中,相同的附图标号指代相同的元件。表述“和/或”包括相关联的所列项目中的一个或多个的任何和全部组合。
应注意,在本说明书中,第一、第二等的表述仅用于将一个特征与另一个特征区分开来,而不表示对特征的任何限制。因此,在不背离本申请的教导的情况下,下文中讨论的第一主体也可被称作第二主体。
在附图中,为了便于说明,已稍微夸大了物体的厚度、尺寸和形状。附图仅为示例而并非严格按比例绘制。
还应理解的是,用语“包括”、“包括有”、“具有”、“包含”和/或“包含有”,当在本说明书中使用时表示存在所陈述的特征、整体、步骤、操作、元件和/或部件,但不排除存在或附加有一个或多个其它特征、整体、步骤、操作、元件、部件和/或它们的组合。此外,当诸如“...中的至少一个”的表述出现在所列特征的列表之后时,修饰整个所列特征,而不是修饰列表中的单独元件。此外,当描述本申请的实施方式时,使用“可以”表示“本申请的一个或多个实施方式”。并且,用语“示例性的”指代示例或举例说明。
如在本文中使用的,用语“基本上”、“大约”以及类似的用语用作表近似的用语,而不用作表程度的用语,并且说明将由本领域普通技术人员认识到的、测量值或计算值中的固有偏差。
除非另外限定,否则本文中使用的所有用语(包括技术用语和科学用语)均具有与本申请所属领域普通技术人员的通常理解相同的含义。还应理解的是,用语(例如在常用词典中定义的用语)应被解释为具有与它们在相关技术的上下文中的含义一致的含义,并且将不被以理想化或过度正式意义解释,除非本文中明确如此限定。
需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。下面将参考附图并结合实施例来详细说明本 申请。
图1示出了本申请一个实施例的感光组件的剖面示意图。参考图1,该感光组件包括:感光芯片103、软板101和再布线层102。其中感光芯片103具有感光区域1031和围绕在感光区域1031周围的非感光区域1032,非感光区域1032设置有多个芯片电极1033。这多个芯片电极1033(或者可以称为芯片焊盘)可以围绕在感光区域1031周围。本实施例中的软板101也可以称为柔性线路板(即FPC板)。软板具有与感光区域对应的通孔1013,软板具有多个软板电极。再布线层102包括:填充层1021,金属柱1023,再布线层走线1024和多个再布线层电极1022。其中,填充层1021形成于软板101表面(图1中为下表面)。金属柱1023形成于软板电极1014表面,并被填充层1021覆盖。再布线层走线1024被填充层1021覆盖,多个再布线层电极1022均暴露在填充层1021外部,并通过再布线层走线1024以及金属柱1023与对应的软板电极1014导通。其中,感光芯片103附接于再布线层102,并且多个再布线层电极1022分别与多个芯片电极1033一一对应地接触并导通。通孔1013可以是通光孔,该通光孔的位置和尺寸与感光芯片103的感光区域1031适配。软板电极1014的面积可以大于再布线层电极1022的面积。再布线层电极1022的面积与芯片电极1033的面积适配(例如相等或基本相等)。本实施例中,软板电极1014位于再布线层电极1022的外侧(即再布线层电极1022比软板电极1014靠近通光孔)。本实施例中,电极可以均为金属电极。
在现有技术中,由于印刷线路板为层压而成,受限于工艺限制,其铜层的厚度需小于20μm,而为了保证线路板线路的电气性能(例如阻抗不能过大,走线的横截面积越小,阻抗越大),线路板的走线宽度(指走线本身的在俯视图中的宽度)至少为80μm。而布线层的铜层为逐层形成,其厚度不受限制,因此布线层可以通过增加铜层的厚度,以减小走线宽度。另一方面,本申请的布线层通过加成法形成线路,其具有更高的工艺精度,因此布线层的走线宽度可以做到30μm。
因此,上述实施例中,通过在软板101上形成再布线层102,可 以使得软板101和再布线层102共同构成的线路板组件可以具有小面积且密集排布的金属电极(即焊盘),从而使得线路板组件的电极(即焊盘)可以与密集排布的芯片电极1033一一对应地接触并导通,从而有助于提高filp chip工艺方案的感光组件的像素数目,同时避免了现有wire bond工艺所带来的各种缺陷。另一方面,上述实施例的感光组件的连接带利用软板形成,可以避免附接感光芯片后再通过ACF等需要高温热压的工艺来贴附连接带。其中,连接带可以将硬板区电连接至连接器,以便与终端设备(例如手机)的主板电连接。软板可直接作为感光组件的连接带。需注意,上述实施例中,软板本身可以不具有感光组件的功能电路,换句话说,感光组件的功能电路可以均集成在再布线层和感光芯片中,此时再布线层可单独实现传统线路板的电气功能,因此再布线层也可以称为布线层或者类基板。
基于上述分析,在本申请的一个实施例中,再布线层走线的厚度大于20μm,以便增大走线的横截面积,从而在不增加走线阻抗的前提下减小再布线层走线的宽度。由于再布线层走线的宽度减小,软板101和再布线层102共同构成的线路板组件可以具有小面积且密集排布的金属电极(即焊盘),可以使得线路板组件的电极(即焊盘)可以与密集排布的芯片电极1033一一对应地接触并导通,从而有助于提高filp chip工艺方案的感光组件的像素数目,同时避免了现有wire bond工艺所带来的各种缺陷。
图2-14示出了本申请一个实施例的感光组件制作流程(图15-17示出了感光组件制作流程的一些可选步骤),该流程包括下列步骤。
S100,在软板的软板电极(即软板焊盘)上植铜柱。需注意,该步骤应进行于软板覆盖膜压合前。植铜后,于软板未对应于布线层的部分压合覆盖膜。该铜柱也可以是其它金属材料形成的金属柱,下文中将不再赘述。图2示出了步骤S100中在软板101的软板电极1033上值铜柱1023a的示意图。在一个实施例中,植铜柱的工艺可以包括镀种子铜、布置光刻胶(可以是贴光刻胶干膜,也可是旋涂)、曝光、显影、镀铜、去光刻胶和退种子铜等工艺步骤。在电路板的制造过程中,在基板的表面溅射一层种子铜(例如钛铜种子铜层),可以提高基 板与金属布线材料的结合力。
S200,在软板表面填充绝缘材料形成填充层。图3示出了步骤S200中在软板101表面填充绝缘材料形成表面平坦的填充层1021的示意图,参考图3,本步骤中,填充材料可以覆盖铜柱。在另一实施例中,填充材料可以采用模制工艺(molding)制作在软板表面。模制工艺可以是压塑(compress molding),也可以是传递模塑(insert molding,传递模塑有时也被称为注塑)。
S300,研磨填充层使其表面平坦并露出步骤S100所植铜柱。图4示出了步骤S300中研磨填充层的示意图。参考图4,在一个实施例中,可以使填充层1021表面与步骤S100所植铜柱1023a的表面齐平。
S400,在研磨后的填充层表面形成种子铜层。图5示出了步骤S400中在研磨后的填充层1021表面形成种子铜层1029的示意图。其中在填充层表面溅射种子铜层是可以提高填充层与金属布线材料的结合力。
S500,基于种子铜层制作再布线走线。图6示出了步骤S500中基于种子铜层制作再布线层走线1024的示意图。制作再布线走线1024的方式可以基于压膜(即贴光刻胶干膜的工艺,下文中不再赘述)、曝光、显影和镀铜等工艺实现。其中,再布线层走线与金属柱导通。再布线层走线还可以根据预定的设计形成电路,该电路可以作为感光组件的功能电路。
S600,在再布线层走线的部分区域植铜柱。图7示出了步骤S600中在再布线层走线的部分区域植铜的示意图。植铜柱可以通过压膜、曝光、显影、电镀铜柱的方式实现。在一个实施例中,可以通过对位校准来确定植铜柱的区域。参考图7,铜柱1024a制作于再布线层走线1024的表面的部分区域。
S700,去除种子铜层。图8示出了步骤S700中去除种子铜层1029的示意图。在一个实施例中,可以通过刻蚀工艺来去除未被布线层走线覆盖的种子铜层。需注意,步骤S700与S600的执行顺序可以互换。去除种子铜层后,填充层表面露出。
S800,在已有的填充层表面再次填充绝缘材料。图9示出了步骤 S800中在已有的填充层表面再次填充绝缘材料的示意图。本步骤中,在已有的填充层表面再次填充绝缘材料后,填充材料覆盖步骤S600所植铜柱1024a,形成新的填充层1021。
S900,研磨填充层使其表面平坦并露出步骤S600所植铜柱。图10示出了步骤S900中研磨填充层使其表面平坦并露出步骤S600所植铜柱的示意图。在一个实施例中,可以使填充层1021表面与步骤S600所植铜柱1024a的表面齐平。
S1000,在当前已有的填充层表面形成种子铜层。
S1100,基于种子铜层制作新一层的再布线层走线。该再布线层走线可以通过压膜、曝光、显影及镀铜工艺制作并形成电路。
S1200,在再布线层走线的部分区域植铜柱。
S1300,通过刻蚀去除种子铜层。
S1400,在去除种子铜层后再次填充绝缘材料,使填充层覆盖步骤S1200所植铜柱。
S1500,研磨当前的填充层使其表面平坦并露出步骤S1200所植铜柱。
完成步骤S1500后,不断重复上述步骤S1000-S1500,形成互相导通的多层再布线层走线。不同层的再布线层走线可以通过铜柱导通。制作完预设层数的再布线层走线后,得到完成的再布线层。图11示出了形成完成的再布线层的示意图。
S1600,在再布线层的表面进行阻焊印刷形成保护层,同时引出多个再布线层电极。图12示出了步骤S1600中在再布线层的表面进行阻焊印刷的示意图。阻焊印刷形成的保护层1028是覆盖在布有铜线(或其它材质的走线)上面的一层薄膜,起绝缘作用,也在一定程度上保护布线层。该保护层还可以起到防止焊锡附着的作用,以更好地避免焊接意外附着于不需要焊接的铜线上。保护层1028的材料可以与填充层的填充材料一致,从而使二者融合为一个整体。保护层可以视为再布线层的一部分。
S1700,在软板和再布线层的中央制作通孔。该通孔对应于感光芯片的感光区域,以便形成通光孔。图13示出了步骤S1700中在软板和 再布线层的中央制作通孔1013的示意图。
S1800,在再布线层的表面贴附感光芯片。图14示出了步骤S1800中在再布线层的表面贴附感光芯片103的示意图。感光芯片的多个芯片电极可以与多个再布线层电极一一对应地接触。感光芯片的芯片电极与再布线层电极之间可以通过异向导电胶、超声波焊接、热压焊接或回流焊等方式实现导通。本步骤中,在再布线层的表面贴附感光芯片可以基于倒贴(Flip chip)工艺实现。再布线层电极可以实施为铜柱(如图14所示)或者金球。图15示出了再布线层电极实施为金球的感光组件的示意图。
S1900,在再布线层表面贴附钢片(也可以是其它金属片)。图16示出了步骤S1900中在再布线层表面贴附钢片的示意图。参考图16,该钢片104具有凹槽104a,感光芯片容纳于凹槽104a。在一个实施例中,钢片与感光芯片不接触且钢片与感光芯片之间可以基于underfill工艺填充绝缘缓冲层。贴附钢片后,即可得到完整的感光组件。钢片104贴附再布线层102的背面,可以使感光芯片103隔离于外界环境,防止感光芯片103受到外力冲击而导致损坏。钢片104与感光芯片103间可以保持预留间隙,从而防止钢片104与感光芯片103间发生碰撞而导致感光芯片103损坏或电连接失效。间隙可以被空气、胶水、模塑、绝缘层等材料填充,以更好地保护芯片。
在另一个实施例中,步骤S1900中,钢片可以被模塑层代替。例如可以通过模塑工艺,在再布线层和感光芯片的背面形成模塑层。图17示出了步骤S1900中在再布线层和感光芯片的背面形成模塑层的示意图。优选地,为防止模塑材料渗透到感光区,可以基于underfill工艺对再布线层102和感光芯片103的背面进行填充,然后再基于模塑工艺形成模塑层105。
在本申请另一个实施例中,步骤S1900之后,进一步地对模塑层105的表面进行研磨以减薄模塑层105。图18示出了对模塑层105进行研磨以减薄模塑层的示意图。
上述实施例中,再布线层可以理解为类基板。这种类基板与传统的基板(例如硬板和软板,其中硬板即PCB板,软板即FPC板)具 有不同的制作工艺。类基板通过压膜、曝光、显影、镀铜、填充、研磨,形成一层一层的电路层,由于类基板的填充材料使用的是具有较高强度,以及耐热性较好(受热不易变形),因此类基板具有更高的平整度,并且每形成一层电路层,都将对其进行研磨(也就是为下一层提供成形平面),并且每一层之间通过铜柱导通,而非硬板中的盲孔、通孔进行每一层的导通。盲孔、通孔是通过钻孔、填孔工艺形成的,盲孔、通孔填充不足可能导致断路,过量则可能导致短路,因此本申请可以避免钻孔、填孔工艺带来的诸多问题,相对于传统的硬板或软硬结合板可以具有更高的精度,以及更好的电性能。
另一方面,本上述实施例中,的软板与类基板之间的导通,是通过在软板直接形成类基板,也就是说在软板上通过镀铜柱实现软板和类基板之间的导通,从而取代热压导电银胶的导通方式,由此具有更高的可靠性。
根据本申请的另一实施例,还提供了另一种感光组件制作方法,包括:
S10,在载板表面布置金属柱。在一个实施例中,在载板表面溅射种子铜层,然后再布置金属柱。优选地,载板为铜基板。
S20,在载板表面填充绝缘材料形成表面平坦的填充层,并露出步骤S10所布置的金属柱;
S30,在填充层表面制作再布线层走线,再布线层走线与金属柱导通;
S40,在再布线层走线的部分区域植金属柱;
S50,在填充层表面再次填充绝缘材料,使得填充层覆盖再布线层走线,并露出步骤S40所植金属柱;
重复执行步骤S30~S50直至制作完预定层数的再布线层走线,得到完整的再布线层,并在最后露出的金属柱形成多个再布线层电极;
S60,去除再布线层所附着的载板,并将软板附接于再布线层,使软板的电极与再布线层的金属柱导通;以及将感光芯片附接于再布线层,并且多个再布线层电极分别与感光芯片的多个芯片电极一一对应地接触并导通(例如可以超声焊接、热压焊接等方式导通)。在一个实 施例中,还可以进一步地在金属柱(指将软板附接于再布线层的金属柱,该金属柱可以实施为铜柱)上镀镍钯金锡等导电材料,从而提高导电效率。
进一步地,图19示出了本申请另一实施例中的感光组件的示意图。参考图19,根据本申请的另一个实施例,还提供了另一种感光组件,该感光组件的再布线层102可以具有凹槽102a。凹槽102a的中央为通孔1013,该通孔1013是对应于感光区域1031的通光孔。感光芯片103附接于再布线层102,并且,该感光芯片103容纳在凹槽102a中。换句话说,再布线层102(或其填充层1021)的背面形成环绕通孔1013的台阶,从而形成凹槽102a,感光芯片103被置于台阶,并在该台阶处(例如该台阶的顶面102b)与再布线层接触并导通。本实施例中,感光组件还包括钢片104,该钢片104附接于再布线层的背面并盖住感光芯片103。该钢片104使感光芯片103隔离于外界环境,防止感光芯片103受到外力冲击而导致损坏。钢片104与感光芯片103间可以保持预留间隙,从而防止钢片104与感光芯片103间发生碰撞而导致感光芯片103损坏或电连接失效。间隙可以被空气、胶水、模塑、绝缘层等材料填充,以更好地保护芯片。需注意,本申请中,钢片104可以被其它金属片代替。
上述实施例中,软板和感光芯片均分别位于再布线层的上下两侧。但需要注意,本申请并不限于此,例如,在一个变型的实施例中,软板和感光芯片可以位于再布线层的同一侧(例如均位于再布线层的下侧)。
以上描述仅为本申请的较佳实施方式以及对所运用技术原理的说明。本领域技术人员应当理解,本申请中所涉及的发明范围,并不限于上述技术特征的特定组合而成的技术方案,同时也应涵盖在不脱离所述发明构思的情况下,由上述技术特征或其等同特征进行任意组合而形成的其它技术方案。例如上述特征与本申请中公开的(但不限于)具有类似功能的技术特征进行互相替换而形成的技术方案。

Claims (28)

  1. 一种感光组件,其特征在于,包括:
    感光芯片,其具有感光区域和围绕在所述感光区域周围的非感光区域,其中所述非感光区域设置有多个芯片电极;
    软板,其具有与所述感光区域对应的通孔,所述软板具有多个软板电极;以及
    再布线层,其包括:
    填充层,其形成于所述软板的表面;
    金属柱,其形成于所述软板电极的表面,并被所述填充层覆盖;
    再布线层走线,其被所述填充层覆盖;以及
    多个再布线层电极,其暴露在所述填充层外部,并通过所述再布线层走线以及所述金属柱与所述软板电极导通;
    其中,所述感光芯片附接于所述再布线层,并且所述多个再布线层电极分别与所述多个芯片电极一一对应地接触并导通。
  2. 根据权利要求1所述的感光组件,其特征在于,所述再布线层电极比所述软板电极靠近所述通孔;所述再布线层电极的面积小于所述软板电极的面积。
  3. 根据权利要求1所述的感光组件,其特征在于,所述再布线层走线的厚度大于20μm。
  4. 根据权利要求1所述的感光组件,其特征在于,所述多个再布线层电极的密集度高于所述多个软板电极的密集度;所述再布线层的走线的宽度小于所述软板的走线的宽度。
  5. 根据权利要求1所述的感光组件,其特征在于,所述金属柱为铜柱。
  6. 根据权利要求1所述的感光组件,其特征在于,还包括具有凹槽的金属片,所述金属片附接于所述再布线层的表面,并且所述感 光芯片位于所述凹槽中。
  7. 根据权利要求1所述的感光组件,其特征在于,所述再布线层具有凹槽,所述感光芯片位于所述凹槽中;所述感光组件还包括金属片,所述金属片附接于所述再布线层的表面并盖住所述感光芯片。
  8. 根据权利要求6或7所述的感光组件,其特征在于,所述感光芯片与所述金属片不接触。
  9. 根据权利要求1所述的感光组件,其特征在于,还包括模塑层,所述模塑层形成在所述再布线层和所述感光芯片的背面。
  10. 根据权利要求1所述的感光组件,其特征在于,所述软板和所述感光芯片分别位于所述再布线层的上下两侧;或者所述软板和所述感光芯片位于所述再布线层的同一侧。
  11. 根据权利要求1所述的感光组件,其特征在于,所述再布线层具有多层所述再布线层走线,其中每层所述再布线层走线的厚度均大于20μm;且位于不同层的所述再布线层走线通过金属柱导通。
  12. 一种线路板组件,其特征在于,包括:
    软板,所述软板的表面具有多个软板电极;以及
    再布线层,其包括:
    填充层,其形成于所述软板的表面;
    金属柱,其形成于所述软板电极的表面,并被所述填充层覆盖;
    再布线层走线,其被所述填充层覆盖;以及
    多个再布线层电极,其暴露在所述填充层的外部,并通过所述再布线层走线以及所述金属柱与所述软板电极导通;
    其中,所述多个再布线层电极的尺寸和布局适于基于倒贴工艺附接感光芯片,使得所述多个再布线层电极分别与所述感光芯片的多个芯片电极一一对应地接触并导通。
  13. 根据权利要求12所述的线路板组件,其特征在于,所述再 布线层电极比所述软板电极靠近所述通孔。
  14. 根据权利要求12所述的线路板组件,其特征在于,所述再布线层电极的面积小于所述软板电极的面积。
  15. 根据权利要求12所述的线路板组件,其特征在于,所述多个再布线层电极的密集度高于所述多个软板电极的密集度。
  16. 一种摄像模组,其特征在于,包括:
    权利要求1~11中任一项所述的感光组件;以及
    安装于所述感光组件的光学镜头。
  17. 一种感光组件制作方法,其特征在于,包括:
    1)在软板表面的软板电极植金属柱;
    2)在软板表面填充绝缘材料形成表面平坦的填充层,并露出步骤1)所植金属柱;
    3)在所述填充层表面制作再布线层走线,所述再布线层走线与所述金属柱导通;
    4)在所述再布线层走线的部分区域植金属柱;
    5)在所述填充层表面再次填充绝缘材料,使得所述填充层覆盖所述再布线层走线,并露出步骤4)所植金属柱;
    重复执行步骤3)~5)直至制作完预定层数的再布线层走线,得到完整的再布线层,并在最后露出的金属柱形成多个再布线层电极;
    6)将感光芯片附接于所述再布线层,并且所述多个再布线层电极分别与所述感光芯片的多个芯片电极一一对应地接触并导通。
  18. 根据权利要求17所述的感光组件制作方法,其特征在于,所述步骤2)和所述步骤4)中,所述填充层采用模制工艺制作。
  19. 根据权利要求17所述的感光组件制作方法,其特征在于, 所述步骤2)中,所述填充层的制作包括:
    21)通过模制工艺在软板表面形成模制层;
    22)研磨所述模制层使其表面平坦并露出步骤1)所植金属柱。
  20. 根据权利要求19所述的感光组件制作方法,其特征在于,所述步骤22)中,使所述填充层表面与步骤1)所植金属柱的表面齐平。
  21. 根据权利要求17所述的感光组件制作方法,其特征在于,所述步骤5)中,所述填充层的制作包括:
    51)通过模制工艺在已有的填充层表面形成模制层;
    52)研磨所述模制层使其表面平坦并露出步骤4)所植金属柱。
  22. 根据权利要求21所述的感光组件制作方法,其特征在于,所述步骤52)中,使所述填充层的表面与步骤4)所植金属柱的表面齐平。
  23. 根据权利要求17所述的感光组件制作方法,其特征在于,所述步骤4)中,通过对位校准来确定植所述金属柱的区域。
  24. 根据权利要求17所述的感光组件制作方法,其特征在于,所述步骤1)中,所述软板表面的中央无通孔;
    在制作完预定层数的再布线层走线后,执行所述步骤6)之前,还包括:
    在所述软板表面的中央及所述软板上形成的所述再布线层的中央制作通孔,所述通孔对应于所述感光芯片的感光区域。
  25. 根据权利要求17所述的感光组件制作方法,其特征在于,所述步骤6)之后,再执行步骤:
    7)在所述再布线层的表面附接具有凹槽的金属片,使所述感光芯 片容纳于所述凹槽,并且所述金属片与所述感光芯片不接触。
  26. 根据权利要求17所述的感光组件制作方法,其特征在于,所述步骤6)之后,再执行步骤:
    7)通过模塑工艺,在所述再布线层和所述感光芯片的背面形成模塑层。
  27. 根据权利要求17所述的感光组件制作方法,其特征在于,所述步骤3)包括:
    31)在已有的填充层表面形成种子层;
    32)对种子层的表面布置光刻胶并曝光;
    33)进行显影,制作出走线槽;
    34)在走线槽中布置金属材料,形成再布线层走线;
    35)去除未附着再布线层走线的种子层和光刻胶。
  28. 一种感光组件制作方法,其特征在于,包括:
    1)在载板表面布置金属柱;
    2)在载板表面填充绝缘材料形成表面平坦的填充层,并露出步骤1)所布置的金属柱;
    3)在所述填充层表面制作再布线层走线,所述再布线层走线与所述金属柱导通;
    4)在所述再布线层走线的部分区域植金属柱;
    5)在所述填充层表面再次填充绝缘材料,使得所述填充层覆盖所述再布线层走线,并露出步骤4)所植金属柱;
    重复执行步骤3)~5)直至制作完预定层数的再布线层走线,得到完整的再布线层,并在最后露出的金属柱形成多个再布线层电极;
    6)去除所述再布线层所附着的载板,并将软板附接于所述再布线层,使所述软板的电极与所述再布线层的金属柱导通;以及将感光芯片附接于所述再布线层,并且所述多个再布线层电极分别与所述感光芯片的多个芯片电极一一对应地接触并导通。
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Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020001583A1 (zh) * 2018-06-29 2020-01-02 宁波舜宇光电信息有限公司 线路板组件、感光组件、摄像模组及其制作方法
CN208768159U (zh) * 2018-06-29 2019-04-19 宁波舜宇光电信息有限公司 线路板组件、感光组件及摄像模组
CN111866321B (zh) * 2019-04-30 2022-03-29 宁波舜宇光电信息有限公司 摄像模组及其感光组件、电子设备和减少杂散光的方法
CN111866326B (zh) * 2019-04-30 2022-03-29 宁波舜宇光电信息有限公司 摄像模组及其电子元器件模块、感光组件、制备方法和电子元器件模块制备方法
CN111866324B (zh) * 2019-04-30 2022-03-29 宁波舜宇光电信息有限公司 摄像模组及其感光组件、电子设备和制备方法
CN110164839B (zh) * 2019-05-27 2020-01-31 广东工业大学 一种高密度线路嵌入转移的扇出型封装结构与方法
CN112770476A (zh) * 2019-10-21 2021-05-07 宁波舜宇光电信息有限公司 线路板组件、感光组件、摄像模组和线路板组件制备方法
WO2021139510A1 (zh) * 2020-01-10 2021-07-15 宁波舜宇光电信息有限公司 感光芯片组件、摄像模组及终端设备
CN112257602B (zh) * 2020-06-12 2024-04-26 深圳市汇顶科技股份有限公司 超声传感器、指纹识别模组及电子设备
CN114173024A (zh) * 2020-09-11 2022-03-11 宁波舜宇光电信息有限公司 感光组件及其制造方法、摄像模组
CN112217982A (zh) * 2020-12-08 2021-01-12 武汉仟目激光有限公司 用于3d感应的紧凑型tof摄像头模组
CN112992956B (zh) * 2021-05-17 2022-02-01 甬矽电子(宁波)股份有限公司 芯片封装结构、芯片封装方法和电子设备
CN113241352B (zh) * 2021-05-19 2024-03-15 中国科学院长春光学精密机械与物理研究所 图像传感器封装用可打线的柔性电路板及其制备工艺
CN115811642A (zh) * 2021-09-10 2023-03-17 宁波舜宇光电信息有限公司 摄像模组
CN114388545A (zh) * 2021-12-31 2022-04-22 上海天马微电子有限公司 成像模组及电子设备
CN115473988B (zh) * 2022-08-04 2023-12-05 荣耀终端有限公司 摄像模组以及电子设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101266990A (zh) * 2007-03-15 2008-09-17 育霈科技股份有限公司 具有内建封装腔室之影像传感器模块及其方法
JP2009283738A (ja) * 2008-05-23 2009-12-03 Kyushu Institute Of Technology 配線用電子部品及びその製造方法
CN204424252U (zh) * 2015-03-27 2015-06-24 蔡亲佳 半导体芯片的包埋式板级封装结构
CN107068625A (zh) * 2015-11-04 2017-08-18 台湾积体电路制造股份有限公司 具有空腔的聚合物系半导体结构
CN208768159U (zh) * 2018-06-29 2019-04-19 宁波舜宇光电信息有限公司 线路板组件、感光组件及摄像模组

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3629178B2 (ja) * 2000-02-21 2005-03-16 Necエレクトロニクス株式会社 フリップチップ型半導体装置及びその製造方法
KR100354114B1 (ko) * 2000-11-15 2002-10-05 삼성테크윈 주식회사 씨모스 이미지 센서용 패키지와 그 제조 방법
KR100494023B1 (ko) * 2001-11-21 2005-06-16 주식회사 네패스 반도체 촬상소자 패키지 및 그 제조방법
KR100609121B1 (ko) * 2005-05-17 2006-08-08 삼성전기주식회사 이미지센서의 웨이퍼 레벨 칩 스케일 패키지 및 그제조방법
US8723332B2 (en) * 2007-06-11 2014-05-13 Invensas Corporation Electrically interconnected stacked die assemblies
US8466997B2 (en) * 2009-12-31 2013-06-18 Stmicroelectronics Pte Ltd. Fan-out wafer level package for an optical sensor and method of manufacture thereof
US8884431B2 (en) * 2011-09-09 2014-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging methods and structures for semiconductor devices
US8642385B2 (en) * 2011-08-09 2014-02-04 Alpha & Omega Semiconductor, Inc. Wafer level package structure and the fabrication method thereof
KR101963809B1 (ko) * 2012-04-25 2019-03-29 삼성전자주식회사 이미지 센서 패키지
CN203481209U (zh) * 2013-08-23 2014-03-12 苏州晶方半导体科技股份有限公司 影像传感器的晶圆级封装结构
CN103943645B (zh) * 2014-05-20 2019-04-23 苏州晶方半导体科技股份有限公司 影像传感器模组及其形成方法
CN110071129B (zh) * 2014-10-11 2023-12-29 意法半导体有限公司 具有柔性互连层的图像传感器装置及相关方法
CN104580856A (zh) * 2014-12-25 2015-04-29 南昌欧菲光电技术有限公司 摄像头模组及具有所述摄像头模组的摄像设备
KR102055412B1 (ko) * 2015-10-10 2019-12-12 차이나 와퍼 레벨 씨에스피 씨오., 엘티디. 이미지 감지 칩에 대한 패키징 방법 및 패키지 구조
CN105226036B (zh) * 2015-10-10 2018-09-28 苏州晶方半导体科技股份有限公司 影像传感芯片的封装方法以及封装结构
CN105611135B (zh) * 2015-11-13 2019-03-19 宁波舜宇光电信息有限公司 系统级摄像模组及其电气支架和制造方法
CN106057685A (zh) * 2016-07-28 2016-10-26 合肥矽迈微电子科技有限公司 封装方法及倒装芯片封装结构
KR102051373B1 (ko) * 2016-09-23 2019-12-04 삼성전자주식회사 팬-아웃 센서 패키지 및 이를 포함하는 카메라 모듈
CN106961808B (zh) * 2017-02-20 2019-09-10 宁波华远电子科技有限公司 下沉式高密度互连板的制作方法
CN107071252A (zh) * 2017-05-16 2017-08-18 昆山丘钛微电子科技有限公司 滤光片直接贴合式小型化摄像头装置及其制作方法
CN107910345B (zh) * 2017-12-19 2024-04-09 宁波舜宇光电信息有限公司 感光组件、摄像模组、感光组件拼板及相应制作方法
CN108010931B (zh) * 2017-12-28 2021-03-30 苏州晶方半导体科技股份有限公司 一种光学指纹芯片的封装结构以及封装方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101266990A (zh) * 2007-03-15 2008-09-17 育霈科技股份有限公司 具有内建封装腔室之影像传感器模块及其方法
JP2009283738A (ja) * 2008-05-23 2009-12-03 Kyushu Institute Of Technology 配線用電子部品及びその製造方法
CN204424252U (zh) * 2015-03-27 2015-06-24 蔡亲佳 半导体芯片的包埋式板级封装结构
CN107068625A (zh) * 2015-11-04 2017-08-18 台湾积体电路制造股份有限公司 具有空腔的聚合物系半导体结构
CN208768159U (zh) * 2018-06-29 2019-04-19 宁波舜宇光电信息有限公司 线路板组件、感光组件及摄像模组

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