WO2016086769A1 - Pièce d'encapsulation de mems de type csp basée sur une grille de connexion personnalisée et procédé pour sa production - Google Patents

Pièce d'encapsulation de mems de type csp basée sur une grille de connexion personnalisée et procédé pour sa production Download PDF

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WO2016086769A1
WO2016086769A1 PCT/CN2015/095026 CN2015095026W WO2016086769A1 WO 2016086769 A1 WO2016086769 A1 WO 2016086769A1 CN 2015095026 W CN2015095026 W CN 2015095026W WO 2016086769 A1 WO2016086769 A1 WO 2016086769A1
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mems
chip
pin
lead frame
csp
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PCT/CN2015/095026
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English (en)
Chinese (zh)
Inventor
慕蔚
邵荣昌
李习周
张易勒
胡魁
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天水华天科技股份有限公司
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Publication of WO2016086769A1 publication Critical patent/WO2016086769A1/fr

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the invention belongs to the technical field of semiconductor manufacturing, and relates to a CSP type MEMS package based on a customized lead frame, and to a method for producing the package.
  • CSP Chip Scale Package, the same below
  • chip-scale package this package is a thin, micro package developed on the basis of TSOP and BGA.
  • CSP can realize a package with a ratio of chip area to package area exceeding 1..1.14, and its package area is about 1/3 of that of ordinary BGA, which is only 1/6 of the package area of TSOP memory chip.
  • CSP is not only small in size, but also thinner.
  • the most effective heat dissipation path from the substrate to the heating element is only 0.2mm, which greatly improves the reliability of the memory chip for a long time running, the line impedance is significantly reduced, and the chip speed is also greatly increased. The range is increased.
  • MEMS packages such as DIP and SOP
  • the main problem is how to eliminate interference and ensure the detection accuracy and gain of the MEMS chip.
  • the MEMS chip has a strong signal detection function, in actual use, it is affected by the additional inductance, capacitance, resistance and environmental dry deflection signal of the package itself, causing the output signal to be cut off or distorted.
  • the object of the present invention is to provide a CSP type MEMS package based on a custom lead frame, which is not affected by the additional inductance, capacitance, resistance and environmental dry deflection signals of the package itself, and avoids the output signal being cut off or distorted.
  • Another object of the present invention is to provide a method of producing the above MEMS package.
  • the technical solution adopted by the present invention is: a CSP type MEMS package based on a custom lead frame, including a lead frame, wherein the inner pin of the lead frame is connected to the bottom surface pin, and the upper surface of the inner pin is inverted.
  • the bump on the MEMS chip is connected to the back pad of the inner pin through the second bonding wire;
  • the first VGA amplifier chip is pasted on the MEMS chip, and the first VGA amplifier chip passes the first
  • the bonding wire is connected to the upper surface of the inner pin;
  • the first groove and the second groove are arranged in parallel along a direction perpendicular to the line connecting the bottom rows of the two rows, and the bottom pin is away from the opposite ends of the upper surface of the inner pin.
  • the bottom surface of the bottom surface of the bottom pin is provided with a metal layer of the bottom surface; the first plastic body is molded on the lead frame, and all the components are molded in the first plastic body, and only the metal layer of the bottom surface is exposed to the first plastic body.
  • Another technical solution adopted by the present invention is: a production method of the above-mentioned custom lead frame-based CSP type MEMS package, which is specifically carried out according to the following steps:
  • Step 1 Make a multi-row matrix carrierless wing gull-type internal CSP lead frame with the front and back sides of the inner leads in addition to electroplated copper, silver or nickel-plated palladium-plated pads, or flip-chip according to plating
  • the package needs to be plated with a UBM metal layer;
  • the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, the bumped wafer is thinned to 150-200 ⁇ m, and the wafer without bumps is thinned to 130-180 ⁇ m; the thinning process is thick The grinding speed is 6 ⁇ m/s, the finishing speed is 0.15 ⁇ m/s, and the polishing speed is 0.05 ⁇ m/s.
  • the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ⁇ 10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • Step 2 On the adhesive sheet bonding machine, first place the first adhesive sheet on the front end surface of the lead pin on the lead frame, and then place the MEMS chip in reverse on the multi-row matrix of the first adhesive sheet.
  • the front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking
  • the lead frame is reversely fed, and the back pad of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type is reversed to the second radiant wire of the pad on the MEMS chip; the film is stuck in the film
  • the semi-assembled multi-row matrix CSP lead frame with the second bonding wire is fed, and the second adhesive sheet is drawn on the back of the MEMS chip, and the first VGA amplifier chip automatically picked up by the device is accurately placed in the film.
  • the first bonding wire is drawn from the pad on the first VGA amplifier chip to the front pad of the multi-row matrix CSP lead frame wing gull type upturned inner lead; after the bonding wire, the expansion coefficient is selected ⁇ 1 ⁇ 1, water absorption rate ⁇ 0.30%, plastic packaging material plastic seal, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 °C for 5 hours; if the bottom pin is not plated in the frame production Nickel palladium gold or pure gold, plating blunt tin, blunt tin layer thickness 7.62 ⁇ 15.24 ⁇ m, and baking at 175 ° C, 1 hour to prevent whisker growth; after laser marking, cutting separation, testing, tape, A CSP type MEMS package based on a custom lead frame is prepared; if the bottom surface of the bottom pin is plated with nickel palladium gold or pure gold, no pure tin plating, direct laser marking, shear separation, testing, tape making, A CSP type MEMS package based on a custom lead frame;
  • the MEMS package of the invention can eliminate the dry deflection, ensure the detection precision of the MEMS chip signal, reduce the additional and parasitic inductance of the package itself, the influence of the capacitance, the resistance and the dry deflection of the environment on the signal, and prevent the output signal from being cut off and distorted. Or gain.
  • this package incorporates a wide-band, low-noise, low-distortion, high-gain-precision voltage-controlled VGA amplifier (Variable Gain Amplifire, VGA amplifier) chip with a variable attenuation.
  • VGA amplifier Very Gain Amplifire, VGA amplifier
  • the device, the gain control interface and a fixed gain amplifier are three parts, which can automatically adjust the frequency and attenuate and amplify the signal detected by the MEMS device, but without distortion. It is often used in RF automatic gain amplifier, video gain control, A/D. Converter range extension and signal detection system.
  • Figure 1 is a cross-sectional view showing a first embodiment of a MEMS package of the present invention.
  • FIG. 2 is a cross-sectional view showing a second embodiment of the MEMS package of the present invention.
  • FIG 3 is a cross-sectional view showing a third embodiment of the MEMS package of the present invention.
  • FIG. 4 is a cross-sectional view showing a fourth embodiment of the MEMS package of the present invention.
  • Figure 5 is a cross-sectional view showing a fifth embodiment of the MEMS package of the present invention.
  • MEMS chip 2. first adhesive sheet, 3. inner pin lower surface, 4. first groove, 5. inner pin, 6. inner pin upper surface, 7. first key Alignment, 8. First VGA amplifier chip, 9. Second adhesive sheet, 10. First plastic package, 11. Front pad, 12. Back surface pin, 13. Second groove, 14. Bottom pin Metal layer, 15. back pad, 16. second bond wire, 17. MEMS cover, 18. second plastic body, 19. MEMS cover opening, 20. first film, 21. second VGA amplifier chip, 22. chip bump, 23. first UBM, 24. MEMS partition, 25. second film, 26. second UBM, 27. third VGA amplifier chip.
  • the structure of all embodiments of the MEMS package of the present invention adopts the same multi-row matrix leadless CSP custom lead frame suitable for CSP package, and the custom lead frame has an external dimension of 259.00 mm ⁇ 79.00 mm, and according to the package
  • the optimal size of the design frame (8 to 12 rows) and the number of package units (120 to 240) the inner leads in the custom lead frame are lifted up into a gull-wing shape, and the upper lead surface of the inner pin And the lower surface of the pin are parallel to the horizontal plane, and the front and back surfaces of the upper lead surface are plated with a metal layer for the bonding wire; the bottom surface of the lower pin in the custom lead frame is provided with a groove for the plastic sealing
  • the material is embedded so that the plastic body is firmly bonded to the lead frame, and a tin layer or a copper layer or a gold layer is plated on the bottom surface of the lower pin as the lead-in end of the signal and power source.
  • a first embodiment of the MEMS package of the present invention is a MEMS package structure without a cap plate, including a custom lead frame, and an inner pin 5 and a bottom pin 12 in the custom lead frame. Connected, the upper surface 6 of the inner pin is bonded to the MEMS chip 1 through the first adhesive sheet 2, and the MEMS chip 1 is a bumped chip. The MEMS chip 1 is flipped on the upper surface 6 of the inner lead, on the MEMS chip 1.
  • the bump is connected to the back pad 15 of the inner lead through the second bonding wire 16; the first VGA amplifier chip 8 is pasted on the MEMS chip 1 through the second adhesive sheet 9, and the soldering on the first VGA amplifier chip 8
  • the disk is connected to the front pad 11 on the upper surface 6 of the inner lead through the first bonding wire 7; in the direction perpendicular to the line connecting the pins 12 of the bottom row of the two rows, the bottom pin 12 is away from the upper surface 6 of the inner pin.
  • the sides are arranged in parallel
  • First VGA amplifier chip 8 second adhesive sheet 9, second bonding wire 16, front pad 11, inner pin upper surface 6, MEMS chip 1, first adhesive sheet 2, inner pin lower surface 3
  • the first bonding wire 7, the back surface pad 15, the first recess 4, the second recess 13, the inner lead 5, the upper surface of the bottom surface pin 12, and the bottom surface pin metal layer 14 constitute the entire circuit.
  • the MEMS chip 1, the first bonding wire 7, the first VGA amplifier chip 8, the second bonding wire 16, the inner lead 5, the front pad 11, the back surface pad 15, and the bottom pin metal layer 14 constitute a power supply for the circuit. And signal channels.
  • the lead frame is molded with a first molding body 10, a bottom surface pin 12, an inner lead 5, a first bonding wire 7, a second bonding wire 16, a MEMS chip 1, a first VGA amplifier chip 8, and a first groove. 4 and the second recess 13 are both located in the first molding body 10, and only the bottom surface pin metal layer 14 is exposed outside the first molding body 10.
  • a second embodiment of the MEMS package of the present invention is a MEMS chip and VGA amplifier chip stacked package structure with a bottom cover plate, and the structure and the MEMS package in the first embodiment.
  • the structure of the components is basically the same, and the difference between the two is that in the second embodiment, the MEMS cover plate 17 is disposed between the two rows of the bottom surface pins 12, and one side of the MEMS cover plate 17 and one row of the bottom surface pins 12 are provided.
  • the first recess 4 is fixed, and the MEMS cover 17 is provided with a MEMS cover opening 19; the MEMS cover 17, the inner lead 5 and the MEMS chip 1 are integrally molded with a transparent second plastic body 18 ;
  • the MEMS cover plate 17 and the MEMS cover opening 19 constitute the entire circuit.
  • the MEMS chip 1, the first VGA amplifier chip 8, the second bonding wire 16, the inner lead 5, the front pad 11, the back pad 15 and the bottom pin metal layer 14 constitute a power supply and signal path of the circuit.
  • a third embodiment of the MEMS package of the present invention includes a custom lead frame in which the inner lead 5 is connected to the bottom surface pin 12, and the inner lead upper surface 6 passes through the first adhesive.
  • the diaphragm 20 is pasted with the MEMS chip 1.
  • the pads on the MEMS chip 1 are connected to the front pads 11 on the upper surface 6 of the inner leads through the first bonding wires 7, and the upper surface 6 of the inner leads is provided with a MEMS partition.
  • the top end of the MEMS partition wall 24 of the two rows of inner pins 5 are connected by the MEMS cover plate 17, and the MEMS cover plate 17 is provided with the MEMS cover opening 19, the MEMS partition wall 24, the MEMS cover plate 17, and the inner lead pins.
  • the upper surface 6 and the MEMS chip 1 enclose a cavity.
  • the first bonding wire 7 and the front surface pad 11 are both located in the cavity, and the cavity is molded with a transparent second molding body 18; the inner pin lower surface 3 passes through
  • the first UBM 23 is bonded to the second VGA amplifier chip 21, and the first UBM 23 is bonded to the chip bump 22 on the second VGA amplifier chip 21, that is, the chip bump 22 on the second VGA amplifier chip 21 faces upward.
  • a first groove 4 is disposed in parallel along a direction perpendicular to the line connecting the two rows of the bottom surface pins 12, and a side of the bottom surface pin 12 away from the end of the upper surface 6 of the inner lead
  • the second recess 13 has a first recess 4 on the bottom surface of the row of pins 12 facing the other row of bottom pins 12, and a bottom surface of the bottom surface of the bottom pin 12 is provided with a bottom metal layer 14; the custom lead frame is molded with a plastic
  • the first molding body 10, except for the cavity, the MEMS cover plate 17, and the bottom pin metal layer 14, is molded in the first molding body 10.
  • First molding body 10 MEMS cover plate 17, cover opening 19, MEMS partition wall 24, lead upper surface 6, second VGA amplifier chip 21, chip bump 22, first UBM 23, front pad 11,
  • the upper surfaces of the inner lead lower surface 3, the inner lead 5, the first recess 4, the second recess 13, and the bottom surface lead 12 constitute the package circuit as a whole.
  • the MEMS chip 1, the first bonding wire 7, the front pad 11, the second VGA amplifier chip 21, the chip bump 22, the first UBM 23, the inner lead 5, and the bottom pin metal layer 14 constitute a power supply and signal of the circuit.
  • the channel and the output end are firmly connected, and the high frequency performance is good.
  • a fourth embodiment of the MEMS package of the present invention is a bottom cover with a MEMS chip and a VGA amplifier chip package on both sides of the inner lead, and the structure and the second
  • the structure of the embodiment is basically the same, and the difference between the two is: in the fourth embodiment, the MEMS chip 1 is pasted on the inner pin lower surface 3 through the first adhesive film 20, and the pad on the MEMS chip 1 passes. The second bonding wire 16 and the back on the lower surface 3 of the inner pin
  • the surface pads 15 are connected; the first VGA amplifier chip 8 is pasted on the upper surface 6 of the inner lead via the second adhesive film 25, and the pads on the first VGA amplifier chip 8 are soldered to the front surface through the first bonding wires 7.
  • the disks 11 are connected; the custom lead frame uses a multi-row matrix CSP nickel-palladium gold plating frame.
  • the MEMS chip 1, the back surface pad 15, the first bonding wire 7, the upper surface of the bottom surface pin 12, the second molding body 18, the first recess 4, and the second recess 13 constitute the entire circuit.
  • the MEMS chip 1, the first bonding wire 7, the first VGA amplifier chip 8, the front surface pad 11, the back surface pad 15, the inner lead 5, and the bottom metal layer 14 constitute a power supply and signal path of the circuit, and the output end is firmly contacted. .
  • a fifth embodiment of the CSP package of the present invention is a package of a two-sided flip-chip VGA amplifier chip and a front-side stacked MEMS chip, including a custom lead frame, and the custom lead frame is adopted.
  • a multi-row matrix CSP nickel-palladium gold electroplating frame in which the inner lead 5 is tilted up to form a gull-wing type, and the upper surface 6 of the inner lead is mounted with a third VGA amplifier chip 27, that is, a third VGA amplifier chip 27
  • the chip bump is bonded to the inner lead upper surface 6 through the second UBM 26, and the upper surface of the third VGA amplifier chip 27 is bonded to the MEMS chip 1 through the second adhesive film 25, and the pad on the MEMS chip 1 passes.
  • the first bonding wire 7 is connected to the front surface pad 11 on the upper surface 6 of the inner lead; the second VGA amplifier chip 21 is mounted on the lower surface 3 of the inner pin, that is, the chip bump on the second VGA amplifier chip 21.
  • Point 22 is bonded to the lower surface 3 of the inner lead by the first UBM 23; parallel to the sides perpendicular to the line connecting the pins 12 of the bottom row, and the sides of the bottom pin 12 away from the end of the upper surface 6 of the inner lead are arranged in parallel
  • the first groove 4 and the second groove 13 are oriented toward the first groove 4 on the bottom surface of the pin 12
  • a row of bottom surface pins 12, a bottom surface pin layer 12 is provided on the bottom surface of the bottom surface pins 12; a MEMS chip 1, a first bonding wire 7, a second VGA amplifier chip 21, an inner pin 5, and a front pad 11
  • the back pad 15 and the bottom pin metal layer 14 form the power and signal path of the circuit.
  • the lead frame is molded with a first molding body 10, a bottom surface pin 12, an inner lead 5, a first bonding wire 7, a MEMS chip 1, a second VGA amplifier chip 21, a third VGA amplifier chip 27, and a first groove. 4 and the second recess 13 are both located in the first molding body 10, and only the bottom surface pin metal layer 14 is exposed outside the first molding body 10.
  • First molding body 10 First bonding wire 7, MEMS chip 1, second film 25, second VGA amplifier chip 21, chip bump 22, inner pin upper surface 6, inner pin lower surface 3,
  • the inner lead 5, the third VGA amplifier chip 27, the first UBM 23, the second UBM 26, the bottom surface lead upper surface 6, the first recess 4, the second recess 13, and the bottom lead metal layer 14 constitute the entire circuit.
  • Metal coating by MEMS chip 1, first bonding wire 7, first VGA amplifier chip 8, first UBM 23, chip bump 22, second VGA amplifier chip 21, second UBM 26, inner pin 5, and bottom pin 14 constitutes the power supply and signal channel of the circuit, the output end is firmly contacted, and the high frequency performance is good.
  • the second VGA amplifier chip 21 and the third VGA amplifier chip 27 are bumped chips.
  • the main problems to be solved include how to eliminate the dry deflection, ensure the detection precision of the MEMS chip signal, and reduce the body inductance, bulk capacitance, body resistance of the package and The effects of parasitic inductance, capacitance, resistance, and environmental strain on the signal prevent the output signal from being cut off, distorted, or gained.
  • this package incorporates a wide-band, low-noise, low-distortion, high-gain-precision voltage-controlled VGA amplifier (Variable Gain Amplifire, VGA amplifier) chip with a variable attenuation.
  • the device, the gain control interface and a fixed gain amplifier are three parts, which can automatically adjust the frequency and attenuate and amplify the signal detected by the MEMS device, but without distortion. It is often used in RF automatic gain amplifier, video gain control, A/D. Converter range extension and signal detection system.
  • the voltage-controlled VGA chip is internally composed of a variable attenuator composed of a seven-stage R-2R ladder network and a fixed gain amplifier, and the attenuation of each stage is 6.02dB, which provides 0 ⁇ -42.14dB attenuation to the input signal, eliminating the effects of distributed capacitance, inductance, resistance and parasitic capacitance, inductance, and resistance on frequency and signal.
  • An important advantage of this architecture is its superior noise characteristics, with an output signal-to-noise ratio of 86.6dB at 1MHz wideband and a maximum undistorted output of 1Vrms.
  • the MEMS chip and the wide-band, low-noise, low-distortion, high-gain precision voltage-controlled VGA amplifier chip are stacked or flip-down, so the package thickness is less than 1mm. It is much smaller than the TO-263 and SOP packages of the same chip.
  • the manufacturing method of the above MEMS package provided by the present invention is specifically carried out according to the following steps:
  • Step 1 According to the needs of the chip and the customer, design a multi-row matrix CSP lead frame drawing with different structures and specifications, and make a multi-row (8-16 rows) matrix type carrierless wing-gull type internal lead CSP custom lead frame.
  • the front and back sides of the inner leads are plated with silver or nickel-plated palladium-plated pads, or the UBM metal layer is plated according to the plated flip-chip package. And the back is generally only plated with copper, and the lead frame when grinding is required to be plated with a layer of gold to increase the reliability and wear resistance of the bottom pin contact;
  • the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, the bumped wafer is thinned to 150-200 ⁇ m, and the wafer without bumps is thinned to 130-180 ⁇ m; the thinning process is thick The grinding speed is 6 ⁇ m/s, the finishing speed is 0.15 ⁇ m/s, and the polishing speed is 0.05 ⁇ m/s.
  • the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ⁇ 10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • Step 2 For packages without a cover and cavity (as in the first embodiment shown in Figure 1):
  • the first adhesive sheet 2 is first placed on the front end surface of the lead pin on the lead frame, and then the MEMS chip 1 is reversely placed on the multi-row matrix of the first adhesive sheet 2
  • the front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking
  • the lead frame is reversely fed, and the second bonding wire 16 is reversed from the back pad 15 of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type to the pad on the MEMS chip 1;
  • the half-packed multi-row matrix CSP lead frame of the second bonding wire 16 is fed, and the second adhesive sheet 9 is marked on the back of the MEMS chip 1, and the first VGA automatically sucked by the device
  • the amplifier chip 8 is accurately placed on the back side of the diced MEMS chip 1, and after bonding the entire first VGA amplifier chip 8
  • the same stepwise baking is adopted, and the anti-separation layer process is adopted in the segment baking process; on the ball bonding machine, the semi-finished multi-row matrix
  • the first bonding wire 7 is driven from the pad on the first VGA amplifier chip 8 to the front pad 11 of the multi-row matrix CSP lead frame wing gull type upturned inner lead; after the bonding wire, the expansion is selected
  • a CSP type MEMS package based on a custom lead frame is prepared; if the bottom surface of the bottom pin is plated with nickel palladium gold or pure gold, no pure tin plating, direct laser marking, shear separation, testing, tape, Making a CSP type MEMS package based on
  • the first adhesive sheet 2 is first placed on the front end surface of the lead pin on the lead frame, and then the MEMS chip 1 is reversely placed on the multi-row matrix of the first adhesive sheet 2
  • the front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking
  • the lead frame is reversely fed, and the second bonding wire 16 is reversed from the back pad 15 of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type to the pad on the MEMS chip 1;
  • the half-packed multi-row matrix CSP lead frame of the second bonding wire 16 is fed, and the second adhesive sheet 9 is marked on the back of the MEMS chip 1, and the first VGA automatically sucked by the device
  • the amplifier chip 8 is accurately placed on the back side of the diced MEMS chip 1, and after bonding the entire first VGA amplifier chip 8
  • the stepwise baking of the anti-separation layer process is performed; on the ball welder, the semi-finished multi-row matrix CSP lead frame to which the first V
  • the first voltage-controlled VGA amplifier chip 8 for bonding broadband, low noise, low distortion, and high gain precision is baked at a temperature of 150 ° C to 175 ° C for 3 hours using an anti-off layer process, and then the first VGA amplifier chip 8 is performed.
  • the MEMS partition wall 24 is first disposed in parallel on the inner surface 6 of the inner pins 5 of the two rows of oppositely disposed inner pins 5.
  • the two MEMS partition walls 24 and the inner leads 5 form a cavity, that is, a plastic sealing system and a MEMS cavity are used.
  • Mold using fast curing liquid epoxy molding compound, DOE optimized MEMS cavity process parameters, mold temperature 180 ° C, clamping pressure 90kgf / cm 2 , injection pressure 35Kg f / cm 2 , injection time 3s, curing time 120s; Then, the MEMS chip with the membrane is pasted in the cavity and subjected to segment baking, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and the temperature is raised to 150 ° C for 5 minutes.
  • the punching rate is controlled at 5%, no void and separation layer, and post-curing at 175°C for 4 hours; if the bottom surface is on the bottom surface When nickel-palladium gold or pure gold has been plated, it is not necessary to electroplating pure tin, direct laser marking, cutting and separating, testing, braiding, and making a CSP type MEMS package based on a custom lead frame; If there is no electroplated nickel, palladium or pure gold, pure tin is electroplated on the bottom surface of the bottom surface pin, and then laser marking, cutting and separating, testing and braiding are performed to obtain a CSP type MEMS package based on a custom lead frame;
  • the lead frame is reversely fed, and the MEMS chip with the adhesive film is pasted using a film-bonding machine.
  • segmental baking that is, in an oven, heat up for 15 minutes, raise the temperature to 100 ° C for 25 minutes, then heat up for 5 minutes, raise the temperature to 150 ° C for 35 minutes, cool down 10 Minute the temperature to 70 ° C to take out;
  • segmental baking that is, in an oven, heat up for 15 minutes, raise the temperature to 100 ° C for 25 minutes, then heat up for 5 minutes, raise the temperature to 150 ° C for 35 minutes, cool down 10 Minute the temperature to 70 ° C to take out;
  • the anti-separation process in the segment baking process from the MEMS chip pad up the back of the pad on the back pad 15 low-radius bonding wire, select the expansion coefficient ⁇ 1 ⁇ 1, water absorption ⁇ 0.25% environmentally-friendly transparent plastic sealing material package, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 ° C for 0.5 hours;
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° C to remove the temperature to 70 ° C; in the segment baking process using the anti-separation process, the pad on the other VGA amplifier chip up the top of the pad
  • the low-radius welding wire is packaged in an environmentally-friendly molding compound with an expansion coefficient ⁇ 1 ⁇ 1 and a water absorption rate ⁇ 0.30%, and is post-cured at 175 ° C for 4 hours; if the bottom surface of the bottom pin is plated with nickel-palladium gold or pure gold , instead of electroplating pure tin, direct laser marking, cutting and separating, testing, braiding, and making CSP type MEMS package based on custom lead frame; if the bottom surface of the bottom pin is not Electroplated nickel-palladium gold or pure gold, electroplating pure tin on the bottom surface of the bottom pin, then laser marking, cutting and separating, testing, braiding, and making a CSP-type MEMS package based on a custom lead frame;
  • the lead frame is reversely fed, and the second VGA amplifier chip is reversed on the bottom surface of the upturned pin, that is, the second VGA amplifier.
  • the bump on the chip 21 is connected to the lower surface 3 of the inner lead and is subjected to the first reflow soldering; then, on the flip chip bonding machine, the front side of the semi-finished lead frame to which the second VGA amplifier chip is bonded is fed.
  • the third VGA amplifier chip is reversed on the front side of the upturned pin, that is, the bump on the third VGA amplifier chip 27 is connected to the upper surface 6 of the inner lead, and the second reflow is performed; then, in the film On the sheet bonding machine, the front side of the semi-finished lead frame to which the third VGA amplifier chip is bonded is fed, and the MEMS chip 1 with the adhesive film is stacked on the back side of the third VGA amplifier chip for segment baking, that is, in an oven. After raising the temperature for 15 minutes, the temperature was raised to 100 ° C for 25 minutes, and then the temperature was raised for 5 minutes.
  • the temperature was raised to 150 ° C for 35 minutes, and the temperature was lowered to 70 ° C for 10 minutes; the anti-separation was used during the segmentation baking process.
  • Layer process positively tilting the pins from the pads on the MEMS chip Low arc welding wire of the pad; the punching rate is controlled at 5%, no void and separation layer, and the environment is packaged with an environmentally-friendly molding compound with expansion coefficient ⁇ 1 ⁇ 1 and water absorption rate ⁇ 0.30%, and post-cured at 175 °C for 4 hours; If the bottom surface of the bottom surface pin has been plated with nickel-palladium gold or pure gold, then the pure tin is not plated, the laser marking, the rib separation, the test, and the braiding are performed, and the CSP type MEMS package based on the custom lead frame is obtained.
  • the package generally includes a MEMS chip and a wide-band, low-noise, low-distortion, high-gain precision voltage-controlled VGA amplifier chip.
  • the MEMS chip is back-bonded to the front side of the upturned pin by an insulating glue, and the low-radius line is reversed from the pad of the MEMS chip to the back of the winged gull-shaped inner pin, and the VGA amplifier chip is insulated or insulated.
  • the film is bonded to the back side of the MEMS chip, and the high-low arc welding line is formed from the pad on the VGA amplifier chip to the front surface of the wing-gull type upturned inner pin.
  • the anti-warping process is adopted: the thinned wafer is diced and drawn by A-WD-300TXB dicing machine.
  • the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ⁇ 10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; on the adhesive sheeting machine, the lead frame is first tilted. The first adhesive sheet is placed on the front end of the inner lead, and then the MEMS chip is placed in the opposite direction on the front side of the multi-row matrix CSP lead frame of the first adhesive sheet, and all the MEMS chips are stuck.
  • the section baking is carried out, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes. After 25 minutes, the temperature is raised for another 5 minutes, the temperature is raised to 150 ° C for 35 minutes, and the temperature is lowered to 70 ° C for 10 minutes.
  • the anti-separation process is used in the step-by-step baking process. After the semi-finished multi-row matrix CSP lead frame is reverse fed, the back pad of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type is reversed to the lower arc of the MEMS chip.
  • the semi-finished multi-row matrix CSP lead frame with the second bonding wire is fed, and the second adhesive sheet is drawn on the back of the MEMS chip, and the device automatically picks up the first A VGA amplifier chip is accurately placed on the back side of the diced MEMS chip, and after bonding the first VGA amplifier chip, the same segmented baking is used, and the anti-separation layer process is adopted in the segment baking process;
  • the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip 8 has been bonded is fed forward, from the pad on the first VGA amplifier chip 8 to the multi-row matrix CSP lead frame wing gull type
  • the top pad of the upturned inner pin 11 is high and low arc to hit the first bond wire 7;
  • the plastic sealing material with expansion coefficient ⁇ 1 ⁇ 1, water absorption rate ⁇ 0.30% is selected, the punching rate is controlled at 5%, no void and separation layer, and post-curing at 150 °C for 5 hours
  • the dicing feed speed is ⁇ 10 mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • On the machine first place the first adhesive on the front end of the lead on the lead frame, and then place the MEMS chip in the opposite direction on the multi-row matrix CSP lead frame of the first adhesive.
  • On the front side after all the MEMS chips are glued, they are subjected to segment baking, that is, in the oven, the temperature rises 15 In the minute, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process;
  • the baked semi-finished multi-row matrix CSP lead frame is reverse fed, from the back pad of the multi-row matrix CSP lead frame wing gull type upturned inner pin to the MEMS chip
  • the pad is reversed to the second arc of the lower arc; on the film sticking machine, the semi-assembled multi-row matrix CSP lead frame of the second bonding wire is fed, and the second side of the MEMS chip is marked.
  • Adhesive glue the first VGA amplifier chip automatically picked up by the device, accurately placed on the back side of the MEMS chip that has been glued, after bonding the first VGA amplifier chip, using the same segmental baking, in the segment baking
  • the anti-separation layer process is adopted in the process; on the ball welder, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip is bonded is forwardly fed, from the pad on the first VGA amplifier chip to the multi-row Matrix CSP lead frame wing gull type upturned inner lead front pad
  • the first bonding wire is used in low arc; the environmentally-friendly transparent plastic sealing material package with expansion coefficient ⁇ 1 ⁇ 1 and water absorption rate ⁇ 0.25% is used, and the automatic encapsulation system and the lower cavity transparent plastic sealing mold and the MEMS chip bonding wire are used.
  • the punching rate is controlled at 5%, no void and separation layer, and post-curing at 150 ° C for 1 hour; on the adhesive sheeting machine, the post-cured CSP semi-finished lead frame is reversely fed First, the fast curing glue is spotted on the first groove, and the device automatically picks up the MEMS cover plate and places it on the first groove of the glue; then stacks the back surface of the MEMS chip with an insulating glue or an insulating film.
  • the punching rate is controlled at 5%, no void and separation layer, and post-cured at 175 °C for 4 hours; laser marking, cutting separation, testing, braiding, based on Customized lead frame CSP type MEMS package.
  • the UBM metal layer required for flip-chip packaging is also required; the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, and the bumped wafer is thinned to 175 ⁇ m, without bumps.
  • Thinning to 180 ⁇ m; rough grinding speed of 6 ⁇ m/s during the thinning process, refining speed of 0.15 ⁇ m/s, polishing speed of 0.05 ⁇ m/s; and anti-warping process: then, using A-WD-300TXB dicing machine
  • the diced wafer is diced, and the dicing process is performed by a double-knife process for preventing sharding.
  • the dicing feed speed is ⁇ 10 mm/s
  • the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • MEMS partition walls are arranged in parallel on the upper surface of the inner pins of the oppositely disposed inner pins, and the two MEMS partition walls and inner leads form a cavity, that is, using a plastic sealing system and a MEMS cavity mold, using a fast curing liquid epoxy Molding material, MEMS cavity process parameters are optimized by DOE, mold temperature 1 80°C, clamping pressure 90kgf/cm 2 , injection pressure 35Kg f/cm 2 , injection time 3s, curing time 120s; then, the MEMS chip with diaphragm is stuck in the cavity for segment baking, ie in the oven In the temperature rise for 15 minutes, the temperature is raised to 100 ° C for 25 minutes, and then the temperature is raised for 5 minutes, the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered for 10 minutes, the temperature is lowered to 70 ° C to
  • the UBM metal layer required for flip-chip packaging is also required; the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, the bumped wafer is thinned to 160 ⁇ m, and the bumpless wafer Thinning to 140 ⁇ m; rough grinding speed of 6 ⁇ m/s during thinning, fine grinding speed of 0.15 ⁇ m/s, polishing speed of 0.05 ⁇ m/s; simultaneous anti-warping process: then, using A-WD-300TXB dicing machine The diced wafer is diced, and the dicing process is performed by a double-knife process for preventing sharding.
  • the dicing feed speed is ⁇ 10 mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; the lead frame is reversed.
  • the MEMS chip with the adhesive film is pasted on the bottom surface of the upturned pin by means of a rubber film sticking machine, and is subjected to segment baking, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes.
  • the anti-separation layer process is adopted, and the low-radiation bonding wire of the front pad of the upturned pin from the pad on the other VGA amplifier chip is packaged in an environmentally-friendly plastic package with an expansion coefficient ⁇ 1 ⁇ 1 and a water absorption rate ⁇ 0.30%.
  • the bottom surface of the bottom pin is not plated with pure gold, then pure tin is plated on the bottom surface of the bottom pin, then laser marking, cutting and separating, testing, braiding, and CSP type MEMS package based on custom lead frame .

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Abstract

Pièce d'encapsulation de MEMS de type CSP basée sur une grille de connexion personnalisée et procédé pour sa production. Une puce (1) de MEMS dotée de protubérances est montée sur une surface supérieure (6) d'une broche intérieure d'une pièce d'encapsulation dans un mode inversé, et la puce (1) de MEMS est reliée à une plage (15) de connexion sur une face arrière de la broche intérieure; une première puce (8) d'amplificateur VGA est collée sur la puce (1) de MEMS, et la première puce (8) d'amplificateur VGA est reliée à la surface supérieure (6) de la broche intérieure; une couche métallique (14) de broche de face inférieure est disposée sur une face inférieure d'une broche (12) de face inférieure; et un premier corps (10) d'encapsulation en plastique est disposé sur la grille de connexion dans un mode d'encapsulation sous plastique, tous les dispositifs sont disposés dans le premier corps (10) d'encapsulation en plastique dans un mode d'encapsulation sous plastique, et seule la couche métallique (14) de broche de face inférieure est exposée hors du premier corps (10) d'encapsulation en plastique. La pièce d'encapsulation de MEMS de type CSP basée sur la grille de connexion personnalisée est fabriquée par des procédures consistant à fabriquer une grille de connexion, amincir et rayer une tranche, coller une puce, souder des fils, réaliser une encapsulation sous plastique, etc. La pièce d'encapsulation peut éliminer les interférences, assurer la précision de détection de signaux de la puce de MEMS, réduire l'influence de l'inductance, de la capacitance et de la résistance supplémentaires et parasites de la pièce d'encapsulation elle-même et les interférences environnementales sur les signaux, et empêcher que des signaux de sortie soient interceptés, distordus ou captés.
PCT/CN2015/095026 2014-12-02 2015-11-19 Pièce d'encapsulation de mems de type csp basée sur une grille de connexion personnalisée et procédé pour sa production WO2016086769A1 (fr)

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