CN101442035B - 一种扁平无引线封装件及其生产方法 - Google Patents

一种扁平无引线封装件及其生产方法 Download PDF

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CN101442035B
CN101442035B CN2008102338322A CN200810233832A CN101442035B CN 101442035 B CN101442035 B CN 101442035B CN 2008102338322 A CN2008102338322 A CN 2008102338322A CN 200810233832 A CN200810233832 A CN 200810233832A CN 101442035 B CN101442035 B CN 101442035B
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CN101442035A (zh
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郭小伟
慕蔚
李习周
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Tianshui Huatian Technology Co Ltd
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Abstract

一种扁平无引线封装件及其生产方法，包括引线框架载体，载体上粘接IC芯片，引线框架载体的正面设有凹坑，正面周边设有两圈防水槽；引线框架载体的背面设有两圈防溢料槽。按晶圆减薄/划片、上芯、压焊、塑封、电镀、打印、切割入盘工艺方法生产。本发明增加了粘接胶与引线框架载体及IC芯片之间的结合力，消除和降低了IC芯片表面产生分层缺陷的几率。在载体边缘做出两圈防水槽，塑封料嵌入槽内可阻挡潮气向芯片浸入，在载体边缘有两圈防溢料槽，具有防分层缺陷、防潮、防溢料作用。成品率高、可靠性好、使用方便的。其工艺方法有效的提高了产品的可靠性和封装良率。

Description

一种扁平无引线封装件及其生产方法
技术领域
本发明涉及集成电路封装技术领域，特别是能有效防止分层缺陷的一种扁平无引线封装件，本发明还包括该扁平无引线封装件的塑封生产方法。
背景技术
封装过程中产生的分层缺陷已成为成品率下降、影响可靠性的主要因素之一，许多客户不仅要求产品要通过MSL 3，而且要通过MSL 2考核，甚至提出MSLl、无分层。另外由于QFN外观第一脚位置不易区分，对封装制造过程和客户使用带来了不必要的麻烦。
普通的QFN封装主要存在以下不足：
因为普通的QFN封装，只用于一般产品，没有高可靠性要求，所以使用的引线框架没有专门的防分层缺陷设计要求，使用的封装材料也是一般材料。同时，在制造过程中没有采取防分层缺陷工艺措施，所以存在以下不足：
1、集成电路芯片和载体的结合力不好，当受外界环境变化的影响时，会造成产品内部产生分层缺陷，致使性能褪化，甚至失效；
2、载体背面和塑封料的结合力不好，当受外界环境的影响，会造成产品产生缺陷(分层)；或外露载体(基岛)上有较厚的溢料，给后续去溢料带来困难，增加了产生分层缺陷的几率；
3、QFN外观第一脚位置不易区分，对封装制造过程和客户使用带来了不必要的麻烦。
发明内容
本发明所要解决的技术问题在于克服上述QFN封装件的结构缺陷及制造过程中的不足，提供一种成品率高、可靠性好、使用方便的扁平无引线封装件及其生产方法。
本发明采用下述技术方案解决其技术问题：
一种扁平无引线封装件，包括引线框架载体，载体上粘接IC芯片，IC芯片上的焊盘通过金线键合与引线框架的引线脚相连，构成电路信号和电流通道，所述引线框架载体的正面设有凹坑，正面周边设有两圈防水槽；引线框架载体的背面设有两圈防溢料槽。
所述凹坑由多个圆形或者梯形凹坑整齐排列分布。
所述凹坑为一个长方形或正方形的凹坑。
所述引线框架载体的背面右下角设计为45度斜角，作为引线框架/电路1脚PIN1标记。
上述扁平无引线封装件按下述工艺方法生产：
a、晶圆减薄/划片
晶圆减薄/划片，0.75mm厚度产品芯片厚度为180μm，对于0.50mm厚度的封装晶圆，芯片厚度控制在130μm～150μm，采用防碎片防翘曲工艺控制技术。
b、上芯
上芯采用防分层缺陷框架或对框架的镀层和表面进行处理，所用的框架是铜剥离框架；导电胶选用低挥发物——高温烘烤后失重＜5％，，低吸水率——封装后的产品在85℃、相对湿度85％RH、吸水率＜0.35％，，高粘度材料——粘接≥9000CP；采用真空充氮烘箱或防分层专用烘箱，排风通畅，温度控制均匀，N2流量≥25ml/分。
c、压焊
衬底温度200℃～210℃，每条框架在轨道上停留时间3分钟～4分钟，防止框架氧化，预防分层产生。
d、塑封
塑封料选用低应力、低吸水率、、高粘度塑封料，模温175℃～185℃，注塑压力1600psi～1800psi，固化时间150s～180s。
e、电镀
电镀工序去溢料，采用热煮软化和高压水冲击相结合的去溢料工艺，先将产品装放入配有S700系列等化学材料的软化液槽中，软化时间控制在25min～40min内浸泡，软化后产品送到高压水去溢料机上，通过高压的压力和冲刷力，将泡软的溢料打掉，达到去溢料效果；电镀后烘烤2小时。
f、打印
电镀完成后经烘烤后送打印，该扁平无引线封装打印与普通QFN生产相同。
g、切割入盘
经打印的半成品送切割，0.75mm厚度产品切割入盘的方法同普通QFN生产。
所述d塑封步骤中的所用塑封料的低应力为：填充料熔融型球形硅，线膨胀系数α1≤1.3×10-5/℃；低吸水率为：封装后的产品在煮沸情况下，吸水率≤0.5％；高粘度为：粘度≥20Pa.S。
所述g切割入盘步骤中对于0.50mm厚度产品，首先在普通切割机上切割，切割后在UV照射机上照射，降低载体背面的胶膜粘度，然后真空吸附分离入盘。
本发明的结构特点为：采用具有防分层、防潮、防溢料设计的引线框架，在载体正面，采用冲压或蚀刻出多排圆形或梯形凹坑，增加了粘接胶与引线框架载体及IC芯片之间的结合力，消除和降低了IC芯片表面产生分层缺陷的几率。在载体边缘做出两圈防水槽，塑封料嵌入槽内可阻挡潮气向芯片浸入。在载体背面右下角有一45度斜角，作为PIN1的标记。并且在载体边缘有两圈防溢料槽，具有防分层缺陷、防潮、防溢料作用。
本发明上芯使用防分层缺陷专用框架和低吸水率、低吸水性、高粘度材料，防缺陷(分层)技术，并且采用防分层缺陷专用烘箱烘烤，可避免上芯后烘烤框架氧化、上芯烘烤时因粘片胶中挥发物过多沾污芯片等缺点，有有利于压焊，在塑封和后续加工减少了缺陷(分层)产生。压焊工序采用防缺陷(分层)键合工艺，严格控制了球焊的温度和框架在高温区停留的时间。塑封工序，选用低应力、高粘度、低吸水性材料，电镀工序采用热煮软化处理与高压水去溢料工艺，防止和杜绝了因去溢料而造成的产品管脚分层缺陷。该方法有效的提高了产品的可靠性和封装良率。
本发明可靠性考核等级按MLSL 2标准，而普通QFN产品可靠性考核等级按MLSL 3标准。因此，本项目产品可靠性考核等级高于普通QFN，也就是说本方法生产提高了产品质量。
本发明结构简单合理，具有成本低、防分层缺陷显著、可靠性高等优点，其封装的产品广泛用于便携式产品，如数据通讯(手机)、数码相机、MP3/4、PDA等便携式电子产品和自动控制等领域。
附图说明
图1为本发明正面示意图；
图2为本发明背面示意图；
图3为正面为一个凹坑示意图；
图4为0.75mm厚度封装产品剖面图；
图5为0.50mm厚度封装产品剖面图。
具体实施方式
本发明的扁平无引线封装件，包括引线框架载体5、粘片胶6、IC芯片7、键合线引线8、引线框架的引线脚9及塑封体10。引线框架载体5上通过粘片胶，具体为导电胶或绝缘胶6粘接IC芯片7，IC芯片7上的焊盘PAD通过键合金、铝或铜线8与引线框架的引线脚9相连，构成电路的信号和电流通道。
其第一种结构的引线框架载体5的正面整齐分布有多个凹坑1，凹坑1可以是圆形，也可以是梯形。引线框架载体5正面周边设有两圈防水槽2，背面设有两圈防溢料槽4。引线框架载体5背面的右下角设计成一个45度斜角，作为PIN标记；该引线框架出厂时背面贴有普通胶膜。
第二种结构的引线框架载体5正面有一长方形或正方形凹坑1，凹坑1底面平整。引线框架载体5正面周边有两圈防水槽2，背面也设有两圈防溢料槽4。引线框架载体1背面的右下角设计成一个45度斜角，作为PIN标记。该引线框架出厂时背面贴有UV胶膜。
第二种结构的扁平无引线框架适合于0.50mm厚度产品封装，封装产品满足超薄型产品的应用。
本封装的生产方法如下：
1、晶圆减薄/划片
0.75mm厚度的封装及生产方法的晶圆减薄同普通QFN塑封集成电路。先在晶圆正面贴上胶膜，然后在专用减薄机上进行减薄，晶圆减薄厚度控制在180μm。
对于0.5mm厚度封装的晶圆，芯片厚度控制在130μm～150μm，要采用防碎片、防翘曲减薄工艺控制技术，在来料晶圆厚度+胶膜厚度-50μm厚度范围内采用粗磨，粗磨速度≤30μm/min；在最终晶圆厚度+胶膜厚度+30μm范围内采用细磨，细磨速度≤10μm/min。在划片中，划片进刀速度≤10mm/s，必要时采用双刀划片机。
2、上芯
上芯采用下述专用框架：
①第一种结构的引线框架载体5正面有多排圆形或梯形凹坑1，并在引线框架载体边缘有两圈防水槽2；在载体背面右下角有一45度斜角，作为PIN1标记，并在载体边缘有两圈防溢料槽4。同时该引线框架出厂时背面贴有普通胶膜。
②第二种结构的引线框架载体5正面有一长方形或正方形凹坑1，凹坑1底面平整。在引线框架载体边缘有两圈防水槽2。引线框架载体5背面的右下角设计成一个45度斜角，作为PIN1标记，并且背面设有两圈防溢料槽4。同时该引线框架出厂时背面贴有UV胶膜。
这样的框架具有防分层、防潮、防溢料作用。
③导电胶即绝缘胶选用低挥发物、低吸水性、高粘度材料。低挥发物指材料高温烘烤后失重＜5％，以前采用普通材料，烘烤失重＞8％；低吸水性指封装后的产品在85℃、85％RH情况下吸水率＜0.35％，以前吸水率≥0.7％；高粘度指粘接≥9000CP，以前是粘接≤8000CP。
过去上芯烘烤采用普通烘箱，排风不畅通，温度控制不均匀，N2流量最大15ml/分。而本项目采用真空充氮烘箱或防缺陷(分层)专用烘箱，排风畅通，温度控制均匀，N2流量≥25ml/分。
此工艺可避免上芯烘烤后引线框架氧化、上芯烘烤时因粘接胶中挥发物过多沾污芯片表面等缺点造成压焊困难，塑封和后续加工产生缺陷(分层)。
由于引线框架载体(基岛、PAD)5正面有多排圆形或梯形凹坑1，增加了作为粘接胶6的导电胶或绝缘胶与引线框架载体(基岛、PAD)5及IC芯片7之间的结合力，消除和降低了IC芯片7表面产生分层缺陷的几率。引线框载体边缘有两圈防水槽，塑封料嵌入槽内可阻挡潮气向芯片浸入。
第二种的引线框架载体5正面有一长方形或正方形凹坑1，相对增加了塑封体厚度，可实现0.5mm厚度超薄型产品封装。
3、压焊
衬底温度调整到200℃～210℃，每条框架在轨道上停留时间为4分钟，防止框架氧化，预防缺陷(分层)产生。在通用压焊机上，采用金线或硅铝丝或铜线8通过球焊把IC芯片7上的焊盘(PAD)和引线框架的引线脚9相连，形成了电路的电源和信号通道。
4、塑封、后固化
塑封料选用低应力，填充料为熔融型球形硅，线膨胀系数α1≤1.3×10-5l/℃，低吸水性，封装后的产品在煮沸情况下，吸水率≤0.5％，普通产品吸水率≥1％、高粘度塑封料，粘度≥20Pa.S，模温175℃～185℃，注塑压力1600psi～1800psi，固化时间150s～180s，保证固化充分，防止缺陷(分层)的产生。采用薄形单面封装防翘曲防溢料控制技术，后固化保证翘曲在合格范围。
塑封好的产品送后固化，本项目后固化工艺同普通QFN。
5、电镀
电镀工序去溢料，采用热煮软化和高压水冲击相结合的去溢料工艺。先将塑封后的产品装入专用特制的热煮篮，而后将产品放入配有S700系列等化学材料的软化液槽中，根据封装品种的不同，软化时间控制在25min～40min内浸泡。软化后产品送到高压水去溢料机上，通过高压的压力和冲刷力，将泡软的溢料打掉，从而达到去溢料的效果。并且电镀后烘烤时间为2小时，充分去除电镀过程中塑封体中渗入的水份。
6、打印
电镀完成后经烘烤后送打印，本项目打印与普通QFN生产相同。
7、切割入盘
经打印的半成品送切割，0.75mm厚度产品切割入盘的方法同普通QFN生产。在通用QFN切割机上将单元封装产品切割成单个产品并入盘，切割入盘后经检验送包装测试。
实施例1
1、晶圆减薄/划片
0.75mm厚度封装的晶圆减薄同普通QFN塑封集成电路。先在晶圆正面贴上胶膜，然后在专用减薄机上进行减薄，晶圆减薄厚度控制在180μm。
2、上芯
上芯采用下述专用框架：
引线框架载体5正面有多排圆形或梯形凹坑1，并在引线框架载体边缘有两圈防水槽2；在载体背面右下角有一45度斜角，作为PIN1标记，并在载体边缘有两圈防溢料槽4。同时该引线框架出厂时背面贴有普通胶膜。
导电胶即绝缘胶选用高温烘烤后失重＜5％，在85℃、85％RH情况下吸水率＜0.35％，粘接≥9000CP的材料。
采用真空充氮烘箱，排风畅通，温度控制均匀，N2流量≥25ml/分。
3、压焊
衬底温度调整到200℃，每条框架在轨道上停留时间为3分钟，防止框架氧化，预防缺陷(分层)产生。在通用压焊机上，采用金线或硅铝丝或铜线8通过球焊把IC芯片7上的焊盘(PAD)和引线框架的引线脚9相连，形成电路的电源和信号通道。
4、塑封、后固化
塑封料选用低应力，填充料为熔融型球形硅，线膨胀系数α1≤1.3×10-5l/℃，低吸水性，封装后的产品在煮沸情况下，吸水率≤0.5％，普通产品吸水率≥1％、高粘度塑封料，粘度≥20Pa.S；模温175℃，注塑压力1600psi，固化时间180s，保证固化充分，防止缺陷(分层)的产生。塑封好的产品送后固化，本项目后固化工艺同普通QFN。
5、电镀
电镀工序去溢料，采用热煮软化和高压水冲击相结合的去溢料工艺。先将塑封后的产品装入专用特制的热煮篮，而后将产品放入配有S700系列等化学材料的软化液槽中，根据封装品种的不同，软化时间控制在25min内浸泡。软化后产品送到高压水去溢料机上，通过高压的压力和冲刷力，将泡软的溢料打掉，从而达到去溢料的效果。并且电镀后烘烤时间为2小时，充分去除电镀过程中塑封体中渗入的水份。
6、打印
电镀完成后经烘烤后送打印，本项目打印与普通QFN生产相同。
7、切割入盘
经打印的半成品送切割，0.75mm厚度产品切割入盘的方法同普通QFN生产。在通用QFN切割机上将单元封装产品切割成单个产品并入盘，切割入盘后经检验送包装测试。
实施例2
1、晶圆减薄/划片
对于0.5mm厚度封装的晶圆，芯片厚度控制在130μm～150μm，采用防碎片、防翘曲减薄工艺控制技术，在来料晶圆厚度+胶膜厚度-50μm厚度范围内采用粗磨，粗磨速度≤30μm/min；在最终晶圆厚度+胶膜厚度+30μm范围内采用细磨，细磨速度≤10μm/min。在划片中，划片进刀速度≤10mm/s，必要时采用双刀划片机。
2、上芯
上芯采用下述专用框架：
引线框架载体5正面有一长方形或正方形凹坑1，凹坑1底面平整。在引线框架载体边缘有两圈防水槽2。引线框架载体5背面的右下角设计成一个45度斜角，作为PIN1标记，并且背面设有两圈防溢料槽4。同时该引线框架出厂时背面贴有UV胶膜。
导电胶即绝缘胶选用高温烘烤后失重＜5％，在85℃、85％RH情况下吸水率＜0.35％，粘接≥9000CP的材料。
采用防分层专用烘箱，排风畅通，温度控制均匀，N2流量≥25ml/分。
3、压焊
衬底温度调整到210℃，每条框架在轨道上停留时间为4分钟，防止框架氧化，预防缺陷(分层)产生。在通用压焊机上，采用金线或硅铝丝或铜线8通过球焊把IC芯片7上的焊盘(PAD)和引线框架的引线脚9相连，形成电路的电源和信号通道。
4、塑封、后固化
塑封料选用低应力，填充料为熔融型球形硅，线膨胀系数α1≤1.3×10-5l/℃，低吸水性，封装后的产品在煮沸情况下，吸水率≤0.5％，普通产品吸水率≥1％、高粘度塑封料，粘度≥20Pa.S，模温185℃，注塑压力1800psi，固化时间150s，保证固化充分，防止分层的产生，采用薄形单面封装防翘曲防溢料控制技术，后固化保证翘曲在合格范围。
5、电镀
电镀工序去溢料，采用热煮软化和高压水冲击相结合的去溢料工艺。先将塑封后的产品装入专用特制的热煮篮，而后将产品放入配有S700系列等化学材料的软化液槽中，根据封装品种的不同，软化时间控制在40min内浸泡。软化后产品送到高压水去溢料机上，通过高压的压力和冲刷力，将泡软的溢料打掉，从而达到去溢料的效果。并且电镀后烘烤时间为2小时，充分去除电镀过程中塑封体中渗入的水份。
6、打印
电镀完成后经烘烤后送打印，本项目打印与普通QFN生产相同。
7、切割入盘
对于0.50mm厚度产品，首先在普通切割机上切割，切割后在UV照射机上照射，降低载体背面的胶膜粘度，然后真空吸附分离入盘。

Claims (3)

1.一种扁平无引线封装件，包括引线框架载体，载体上粘接IC芯片，IC芯片上的焊盘通过金线键合与引线框架的引线脚相连，构成电路信号和电流通道，其特征在于：所述引线框架载体(5)的正面设有凹坑(1)，正面周边设有两圈防水槽(2)；引线框架载体(5)的背面设有两圈防溢料槽(4)。
2.根据权利要求1所述的一种扁平无引线封装件，其特征在于所述凹坑(1)由多个圆形或者梯形凹坑整齐排列分布。
3.根据权利要求1所述的一种扁平无引线封装件，其特征在于所述凹坑(1)为一个长方形或正方形的凹坑。
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