WO2016086769A1 - Csp type mems packaging piece based on customised lead frame and production method therefor - Google Patents

Csp type mems packaging piece based on customised lead frame and production method therefor Download PDF

Info

Publication number
WO2016086769A1
WO2016086769A1 PCT/CN2015/095026 CN2015095026W WO2016086769A1 WO 2016086769 A1 WO2016086769 A1 WO 2016086769A1 CN 2015095026 W CN2015095026 W CN 2015095026W WO 2016086769 A1 WO2016086769 A1 WO 2016086769A1
Authority
WO
WIPO (PCT)
Prior art keywords
mems
chip
pin
lead frame
csp
Prior art date
Application number
PCT/CN2015/095026
Other languages
French (fr)
Chinese (zh)
Inventor
慕蔚
邵荣昌
李习周
张易勒
胡魁
Original Assignee
天水华天科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 天水华天科技股份有限公司 filed Critical 天水华天科技股份有限公司
Publication of WO2016086769A1 publication Critical patent/WO2016086769A1/en

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Definitions

  • the invention belongs to the technical field of semiconductor manufacturing, and relates to a CSP type MEMS package based on a customized lead frame, and to a method for producing the package.
  • CSP Chip Scale Package, the same below
  • chip-scale package this package is a thin, micro package developed on the basis of TSOP and BGA.
  • CSP can realize a package with a ratio of chip area to package area exceeding 1..1.14, and its package area is about 1/3 of that of ordinary BGA, which is only 1/6 of the package area of TSOP memory chip.
  • CSP is not only small in size, but also thinner.
  • the most effective heat dissipation path from the substrate to the heating element is only 0.2mm, which greatly improves the reliability of the memory chip for a long time running, the line impedance is significantly reduced, and the chip speed is also greatly increased. The range is increased.
  • MEMS packages such as DIP and SOP
  • the main problem is how to eliminate interference and ensure the detection accuracy and gain of the MEMS chip.
  • the MEMS chip has a strong signal detection function, in actual use, it is affected by the additional inductance, capacitance, resistance and environmental dry deflection signal of the package itself, causing the output signal to be cut off or distorted.
  • the object of the present invention is to provide a CSP type MEMS package based on a custom lead frame, which is not affected by the additional inductance, capacitance, resistance and environmental dry deflection signals of the package itself, and avoids the output signal being cut off or distorted.
  • Another object of the present invention is to provide a method of producing the above MEMS package.
  • the technical solution adopted by the present invention is: a CSP type MEMS package based on a custom lead frame, including a lead frame, wherein the inner pin of the lead frame is connected to the bottom surface pin, and the upper surface of the inner pin is inverted.
  • the bump on the MEMS chip is connected to the back pad of the inner pin through the second bonding wire;
  • the first VGA amplifier chip is pasted on the MEMS chip, and the first VGA amplifier chip passes the first
  • the bonding wire is connected to the upper surface of the inner pin;
  • the first groove and the second groove are arranged in parallel along a direction perpendicular to the line connecting the bottom rows of the two rows, and the bottom pin is away from the opposite ends of the upper surface of the inner pin.
  • the bottom surface of the bottom surface of the bottom pin is provided with a metal layer of the bottom surface; the first plastic body is molded on the lead frame, and all the components are molded in the first plastic body, and only the metal layer of the bottom surface is exposed to the first plastic body.
  • Another technical solution adopted by the present invention is: a production method of the above-mentioned custom lead frame-based CSP type MEMS package, which is specifically carried out according to the following steps:
  • Step 1 Make a multi-row matrix carrierless wing gull-type internal CSP lead frame with the front and back sides of the inner leads in addition to electroplated copper, silver or nickel-plated palladium-plated pads, or flip-chip according to plating
  • the package needs to be plated with a UBM metal layer;
  • the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, the bumped wafer is thinned to 150-200 ⁇ m, and the wafer without bumps is thinned to 130-180 ⁇ m; the thinning process is thick The grinding speed is 6 ⁇ m/s, the finishing speed is 0.15 ⁇ m/s, and the polishing speed is 0.05 ⁇ m/s.
  • the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ⁇ 10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • Step 2 On the adhesive sheet bonding machine, first place the first adhesive sheet on the front end surface of the lead pin on the lead frame, and then place the MEMS chip in reverse on the multi-row matrix of the first adhesive sheet.
  • the front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking
  • the lead frame is reversely fed, and the back pad of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type is reversed to the second radiant wire of the pad on the MEMS chip; the film is stuck in the film
  • the semi-assembled multi-row matrix CSP lead frame with the second bonding wire is fed, and the second adhesive sheet is drawn on the back of the MEMS chip, and the first VGA amplifier chip automatically picked up by the device is accurately placed in the film.
  • the first bonding wire is drawn from the pad on the first VGA amplifier chip to the front pad of the multi-row matrix CSP lead frame wing gull type upturned inner lead; after the bonding wire, the expansion coefficient is selected ⁇ 1 ⁇ 1, water absorption rate ⁇ 0.30%, plastic packaging material plastic seal, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 °C for 5 hours; if the bottom pin is not plated in the frame production Nickel palladium gold or pure gold, plating blunt tin, blunt tin layer thickness 7.62 ⁇ 15.24 ⁇ m, and baking at 175 ° C, 1 hour to prevent whisker growth; after laser marking, cutting separation, testing, tape, A CSP type MEMS package based on a custom lead frame is prepared; if the bottom surface of the bottom pin is plated with nickel palladium gold or pure gold, no pure tin plating, direct laser marking, shear separation, testing, tape making, A CSP type MEMS package based on a custom lead frame;
  • the MEMS package of the invention can eliminate the dry deflection, ensure the detection precision of the MEMS chip signal, reduce the additional and parasitic inductance of the package itself, the influence of the capacitance, the resistance and the dry deflection of the environment on the signal, and prevent the output signal from being cut off and distorted. Or gain.
  • this package incorporates a wide-band, low-noise, low-distortion, high-gain-precision voltage-controlled VGA amplifier (Variable Gain Amplifire, VGA amplifier) chip with a variable attenuation.
  • VGA amplifier Very Gain Amplifire, VGA amplifier
  • the device, the gain control interface and a fixed gain amplifier are three parts, which can automatically adjust the frequency and attenuate and amplify the signal detected by the MEMS device, but without distortion. It is often used in RF automatic gain amplifier, video gain control, A/D. Converter range extension and signal detection system.
  • Figure 1 is a cross-sectional view showing a first embodiment of a MEMS package of the present invention.
  • FIG. 2 is a cross-sectional view showing a second embodiment of the MEMS package of the present invention.
  • FIG 3 is a cross-sectional view showing a third embodiment of the MEMS package of the present invention.
  • FIG. 4 is a cross-sectional view showing a fourth embodiment of the MEMS package of the present invention.
  • Figure 5 is a cross-sectional view showing a fifth embodiment of the MEMS package of the present invention.
  • MEMS chip 2. first adhesive sheet, 3. inner pin lower surface, 4. first groove, 5. inner pin, 6. inner pin upper surface, 7. first key Alignment, 8. First VGA amplifier chip, 9. Second adhesive sheet, 10. First plastic package, 11. Front pad, 12. Back surface pin, 13. Second groove, 14. Bottom pin Metal layer, 15. back pad, 16. second bond wire, 17. MEMS cover, 18. second plastic body, 19. MEMS cover opening, 20. first film, 21. second VGA amplifier chip, 22. chip bump, 23. first UBM, 24. MEMS partition, 25. second film, 26. second UBM, 27. third VGA amplifier chip.
  • the structure of all embodiments of the MEMS package of the present invention adopts the same multi-row matrix leadless CSP custom lead frame suitable for CSP package, and the custom lead frame has an external dimension of 259.00 mm ⁇ 79.00 mm, and according to the package
  • the optimal size of the design frame (8 to 12 rows) and the number of package units (120 to 240) the inner leads in the custom lead frame are lifted up into a gull-wing shape, and the upper lead surface of the inner pin And the lower surface of the pin are parallel to the horizontal plane, and the front and back surfaces of the upper lead surface are plated with a metal layer for the bonding wire; the bottom surface of the lower pin in the custom lead frame is provided with a groove for the plastic sealing
  • the material is embedded so that the plastic body is firmly bonded to the lead frame, and a tin layer or a copper layer or a gold layer is plated on the bottom surface of the lower pin as the lead-in end of the signal and power source.
  • a first embodiment of the MEMS package of the present invention is a MEMS package structure without a cap plate, including a custom lead frame, and an inner pin 5 and a bottom pin 12 in the custom lead frame. Connected, the upper surface 6 of the inner pin is bonded to the MEMS chip 1 through the first adhesive sheet 2, and the MEMS chip 1 is a bumped chip. The MEMS chip 1 is flipped on the upper surface 6 of the inner lead, on the MEMS chip 1.
  • the bump is connected to the back pad 15 of the inner lead through the second bonding wire 16; the first VGA amplifier chip 8 is pasted on the MEMS chip 1 through the second adhesive sheet 9, and the soldering on the first VGA amplifier chip 8
  • the disk is connected to the front pad 11 on the upper surface 6 of the inner lead through the first bonding wire 7; in the direction perpendicular to the line connecting the pins 12 of the bottom row of the two rows, the bottom pin 12 is away from the upper surface 6 of the inner pin.
  • the sides are arranged in parallel
  • First VGA amplifier chip 8 second adhesive sheet 9, second bonding wire 16, front pad 11, inner pin upper surface 6, MEMS chip 1, first adhesive sheet 2, inner pin lower surface 3
  • the first bonding wire 7, the back surface pad 15, the first recess 4, the second recess 13, the inner lead 5, the upper surface of the bottom surface pin 12, and the bottom surface pin metal layer 14 constitute the entire circuit.
  • the MEMS chip 1, the first bonding wire 7, the first VGA amplifier chip 8, the second bonding wire 16, the inner lead 5, the front pad 11, the back surface pad 15, and the bottom pin metal layer 14 constitute a power supply for the circuit. And signal channels.
  • the lead frame is molded with a first molding body 10, a bottom surface pin 12, an inner lead 5, a first bonding wire 7, a second bonding wire 16, a MEMS chip 1, a first VGA amplifier chip 8, and a first groove. 4 and the second recess 13 are both located in the first molding body 10, and only the bottom surface pin metal layer 14 is exposed outside the first molding body 10.
  • a second embodiment of the MEMS package of the present invention is a MEMS chip and VGA amplifier chip stacked package structure with a bottom cover plate, and the structure and the MEMS package in the first embodiment.
  • the structure of the components is basically the same, and the difference between the two is that in the second embodiment, the MEMS cover plate 17 is disposed between the two rows of the bottom surface pins 12, and one side of the MEMS cover plate 17 and one row of the bottom surface pins 12 are provided.
  • the first recess 4 is fixed, and the MEMS cover 17 is provided with a MEMS cover opening 19; the MEMS cover 17, the inner lead 5 and the MEMS chip 1 are integrally molded with a transparent second plastic body 18 ;
  • the MEMS cover plate 17 and the MEMS cover opening 19 constitute the entire circuit.
  • the MEMS chip 1, the first VGA amplifier chip 8, the second bonding wire 16, the inner lead 5, the front pad 11, the back pad 15 and the bottom pin metal layer 14 constitute a power supply and signal path of the circuit.
  • a third embodiment of the MEMS package of the present invention includes a custom lead frame in which the inner lead 5 is connected to the bottom surface pin 12, and the inner lead upper surface 6 passes through the first adhesive.
  • the diaphragm 20 is pasted with the MEMS chip 1.
  • the pads on the MEMS chip 1 are connected to the front pads 11 on the upper surface 6 of the inner leads through the first bonding wires 7, and the upper surface 6 of the inner leads is provided with a MEMS partition.
  • the top end of the MEMS partition wall 24 of the two rows of inner pins 5 are connected by the MEMS cover plate 17, and the MEMS cover plate 17 is provided with the MEMS cover opening 19, the MEMS partition wall 24, the MEMS cover plate 17, and the inner lead pins.
  • the upper surface 6 and the MEMS chip 1 enclose a cavity.
  • the first bonding wire 7 and the front surface pad 11 are both located in the cavity, and the cavity is molded with a transparent second molding body 18; the inner pin lower surface 3 passes through
  • the first UBM 23 is bonded to the second VGA amplifier chip 21, and the first UBM 23 is bonded to the chip bump 22 on the second VGA amplifier chip 21, that is, the chip bump 22 on the second VGA amplifier chip 21 faces upward.
  • a first groove 4 is disposed in parallel along a direction perpendicular to the line connecting the two rows of the bottom surface pins 12, and a side of the bottom surface pin 12 away from the end of the upper surface 6 of the inner lead
  • the second recess 13 has a first recess 4 on the bottom surface of the row of pins 12 facing the other row of bottom pins 12, and a bottom surface of the bottom surface of the bottom pin 12 is provided with a bottom metal layer 14; the custom lead frame is molded with a plastic
  • the first molding body 10, except for the cavity, the MEMS cover plate 17, and the bottom pin metal layer 14, is molded in the first molding body 10.
  • First molding body 10 MEMS cover plate 17, cover opening 19, MEMS partition wall 24, lead upper surface 6, second VGA amplifier chip 21, chip bump 22, first UBM 23, front pad 11,
  • the upper surfaces of the inner lead lower surface 3, the inner lead 5, the first recess 4, the second recess 13, and the bottom surface lead 12 constitute the package circuit as a whole.
  • the MEMS chip 1, the first bonding wire 7, the front pad 11, the second VGA amplifier chip 21, the chip bump 22, the first UBM 23, the inner lead 5, and the bottom pin metal layer 14 constitute a power supply and signal of the circuit.
  • the channel and the output end are firmly connected, and the high frequency performance is good.
  • a fourth embodiment of the MEMS package of the present invention is a bottom cover with a MEMS chip and a VGA amplifier chip package on both sides of the inner lead, and the structure and the second
  • the structure of the embodiment is basically the same, and the difference between the two is: in the fourth embodiment, the MEMS chip 1 is pasted on the inner pin lower surface 3 through the first adhesive film 20, and the pad on the MEMS chip 1 passes. The second bonding wire 16 and the back on the lower surface 3 of the inner pin
  • the surface pads 15 are connected; the first VGA amplifier chip 8 is pasted on the upper surface 6 of the inner lead via the second adhesive film 25, and the pads on the first VGA amplifier chip 8 are soldered to the front surface through the first bonding wires 7.
  • the disks 11 are connected; the custom lead frame uses a multi-row matrix CSP nickel-palladium gold plating frame.
  • the MEMS chip 1, the back surface pad 15, the first bonding wire 7, the upper surface of the bottom surface pin 12, the second molding body 18, the first recess 4, and the second recess 13 constitute the entire circuit.
  • the MEMS chip 1, the first bonding wire 7, the first VGA amplifier chip 8, the front surface pad 11, the back surface pad 15, the inner lead 5, and the bottom metal layer 14 constitute a power supply and signal path of the circuit, and the output end is firmly contacted. .
  • a fifth embodiment of the CSP package of the present invention is a package of a two-sided flip-chip VGA amplifier chip and a front-side stacked MEMS chip, including a custom lead frame, and the custom lead frame is adopted.
  • a multi-row matrix CSP nickel-palladium gold electroplating frame in which the inner lead 5 is tilted up to form a gull-wing type, and the upper surface 6 of the inner lead is mounted with a third VGA amplifier chip 27, that is, a third VGA amplifier chip 27
  • the chip bump is bonded to the inner lead upper surface 6 through the second UBM 26, and the upper surface of the third VGA amplifier chip 27 is bonded to the MEMS chip 1 through the second adhesive film 25, and the pad on the MEMS chip 1 passes.
  • the first bonding wire 7 is connected to the front surface pad 11 on the upper surface 6 of the inner lead; the second VGA amplifier chip 21 is mounted on the lower surface 3 of the inner pin, that is, the chip bump on the second VGA amplifier chip 21.
  • Point 22 is bonded to the lower surface 3 of the inner lead by the first UBM 23; parallel to the sides perpendicular to the line connecting the pins 12 of the bottom row, and the sides of the bottom pin 12 away from the end of the upper surface 6 of the inner lead are arranged in parallel
  • the first groove 4 and the second groove 13 are oriented toward the first groove 4 on the bottom surface of the pin 12
  • a row of bottom surface pins 12, a bottom surface pin layer 12 is provided on the bottom surface of the bottom surface pins 12; a MEMS chip 1, a first bonding wire 7, a second VGA amplifier chip 21, an inner pin 5, and a front pad 11
  • the back pad 15 and the bottom pin metal layer 14 form the power and signal path of the circuit.
  • the lead frame is molded with a first molding body 10, a bottom surface pin 12, an inner lead 5, a first bonding wire 7, a MEMS chip 1, a second VGA amplifier chip 21, a third VGA amplifier chip 27, and a first groove. 4 and the second recess 13 are both located in the first molding body 10, and only the bottom surface pin metal layer 14 is exposed outside the first molding body 10.
  • First molding body 10 First bonding wire 7, MEMS chip 1, second film 25, second VGA amplifier chip 21, chip bump 22, inner pin upper surface 6, inner pin lower surface 3,
  • the inner lead 5, the third VGA amplifier chip 27, the first UBM 23, the second UBM 26, the bottom surface lead upper surface 6, the first recess 4, the second recess 13, and the bottom lead metal layer 14 constitute the entire circuit.
  • Metal coating by MEMS chip 1, first bonding wire 7, first VGA amplifier chip 8, first UBM 23, chip bump 22, second VGA amplifier chip 21, second UBM 26, inner pin 5, and bottom pin 14 constitutes the power supply and signal channel of the circuit, the output end is firmly contacted, and the high frequency performance is good.
  • the second VGA amplifier chip 21 and the third VGA amplifier chip 27 are bumped chips.
  • the main problems to be solved include how to eliminate the dry deflection, ensure the detection precision of the MEMS chip signal, and reduce the body inductance, bulk capacitance, body resistance of the package and The effects of parasitic inductance, capacitance, resistance, and environmental strain on the signal prevent the output signal from being cut off, distorted, or gained.
  • this package incorporates a wide-band, low-noise, low-distortion, high-gain-precision voltage-controlled VGA amplifier (Variable Gain Amplifire, VGA amplifier) chip with a variable attenuation.
  • the device, the gain control interface and a fixed gain amplifier are three parts, which can automatically adjust the frequency and attenuate and amplify the signal detected by the MEMS device, but without distortion. It is often used in RF automatic gain amplifier, video gain control, A/D. Converter range extension and signal detection system.
  • the voltage-controlled VGA chip is internally composed of a variable attenuator composed of a seven-stage R-2R ladder network and a fixed gain amplifier, and the attenuation of each stage is 6.02dB, which provides 0 ⁇ -42.14dB attenuation to the input signal, eliminating the effects of distributed capacitance, inductance, resistance and parasitic capacitance, inductance, and resistance on frequency and signal.
  • An important advantage of this architecture is its superior noise characteristics, with an output signal-to-noise ratio of 86.6dB at 1MHz wideband and a maximum undistorted output of 1Vrms.
  • the MEMS chip and the wide-band, low-noise, low-distortion, high-gain precision voltage-controlled VGA amplifier chip are stacked or flip-down, so the package thickness is less than 1mm. It is much smaller than the TO-263 and SOP packages of the same chip.
  • the manufacturing method of the above MEMS package provided by the present invention is specifically carried out according to the following steps:
  • Step 1 According to the needs of the chip and the customer, design a multi-row matrix CSP lead frame drawing with different structures and specifications, and make a multi-row (8-16 rows) matrix type carrierless wing-gull type internal lead CSP custom lead frame.
  • the front and back sides of the inner leads are plated with silver or nickel-plated palladium-plated pads, or the UBM metal layer is plated according to the plated flip-chip package. And the back is generally only plated with copper, and the lead frame when grinding is required to be plated with a layer of gold to increase the reliability and wear resistance of the bottom pin contact;
  • the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, the bumped wafer is thinned to 150-200 ⁇ m, and the wafer without bumps is thinned to 130-180 ⁇ m; the thinning process is thick The grinding speed is 6 ⁇ m/s, the finishing speed is 0.15 ⁇ m/s, and the polishing speed is 0.05 ⁇ m/s.
  • the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ⁇ 10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • Step 2 For packages without a cover and cavity (as in the first embodiment shown in Figure 1):
  • the first adhesive sheet 2 is first placed on the front end surface of the lead pin on the lead frame, and then the MEMS chip 1 is reversely placed on the multi-row matrix of the first adhesive sheet 2
  • the front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking
  • the lead frame is reversely fed, and the second bonding wire 16 is reversed from the back pad 15 of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type to the pad on the MEMS chip 1;
  • the half-packed multi-row matrix CSP lead frame of the second bonding wire 16 is fed, and the second adhesive sheet 9 is marked on the back of the MEMS chip 1, and the first VGA automatically sucked by the device
  • the amplifier chip 8 is accurately placed on the back side of the diced MEMS chip 1, and after bonding the entire first VGA amplifier chip 8
  • the same stepwise baking is adopted, and the anti-separation layer process is adopted in the segment baking process; on the ball bonding machine, the semi-finished multi-row matrix
  • the first bonding wire 7 is driven from the pad on the first VGA amplifier chip 8 to the front pad 11 of the multi-row matrix CSP lead frame wing gull type upturned inner lead; after the bonding wire, the expansion is selected
  • a CSP type MEMS package based on a custom lead frame is prepared; if the bottom surface of the bottom pin is plated with nickel palladium gold or pure gold, no pure tin plating, direct laser marking, shear separation, testing, tape, Making a CSP type MEMS package based on
  • the first adhesive sheet 2 is first placed on the front end surface of the lead pin on the lead frame, and then the MEMS chip 1 is reversely placed on the multi-row matrix of the first adhesive sheet 2
  • the front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking
  • the lead frame is reversely fed, and the second bonding wire 16 is reversed from the back pad 15 of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type to the pad on the MEMS chip 1;
  • the half-packed multi-row matrix CSP lead frame of the second bonding wire 16 is fed, and the second adhesive sheet 9 is marked on the back of the MEMS chip 1, and the first VGA automatically sucked by the device
  • the amplifier chip 8 is accurately placed on the back side of the diced MEMS chip 1, and after bonding the entire first VGA amplifier chip 8
  • the stepwise baking of the anti-separation layer process is performed; on the ball welder, the semi-finished multi-row matrix CSP lead frame to which the first V
  • the first voltage-controlled VGA amplifier chip 8 for bonding broadband, low noise, low distortion, and high gain precision is baked at a temperature of 150 ° C to 175 ° C for 3 hours using an anti-off layer process, and then the first VGA amplifier chip 8 is performed.
  • the MEMS partition wall 24 is first disposed in parallel on the inner surface 6 of the inner pins 5 of the two rows of oppositely disposed inner pins 5.
  • the two MEMS partition walls 24 and the inner leads 5 form a cavity, that is, a plastic sealing system and a MEMS cavity are used.
  • Mold using fast curing liquid epoxy molding compound, DOE optimized MEMS cavity process parameters, mold temperature 180 ° C, clamping pressure 90kgf / cm 2 , injection pressure 35Kg f / cm 2 , injection time 3s, curing time 120s; Then, the MEMS chip with the membrane is pasted in the cavity and subjected to segment baking, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and the temperature is raised to 150 ° C for 5 minutes.
  • the punching rate is controlled at 5%, no void and separation layer, and post-curing at 175°C for 4 hours; if the bottom surface is on the bottom surface When nickel-palladium gold or pure gold has been plated, it is not necessary to electroplating pure tin, direct laser marking, cutting and separating, testing, braiding, and making a CSP type MEMS package based on a custom lead frame; If there is no electroplated nickel, palladium or pure gold, pure tin is electroplated on the bottom surface of the bottom surface pin, and then laser marking, cutting and separating, testing and braiding are performed to obtain a CSP type MEMS package based on a custom lead frame;
  • the lead frame is reversely fed, and the MEMS chip with the adhesive film is pasted using a film-bonding machine.
  • segmental baking that is, in an oven, heat up for 15 minutes, raise the temperature to 100 ° C for 25 minutes, then heat up for 5 minutes, raise the temperature to 150 ° C for 35 minutes, cool down 10 Minute the temperature to 70 ° C to take out;
  • segmental baking that is, in an oven, heat up for 15 minutes, raise the temperature to 100 ° C for 25 minutes, then heat up for 5 minutes, raise the temperature to 150 ° C for 35 minutes, cool down 10 Minute the temperature to 70 ° C to take out;
  • the anti-separation process in the segment baking process from the MEMS chip pad up the back of the pad on the back pad 15 low-radius bonding wire, select the expansion coefficient ⁇ 1 ⁇ 1, water absorption ⁇ 0.25% environmentally-friendly transparent plastic sealing material package, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 ° C for 0.5 hours;
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° C to remove the temperature to 70 ° C; in the segment baking process using the anti-separation process, the pad on the other VGA amplifier chip up the top of the pad
  • the low-radius welding wire is packaged in an environmentally-friendly molding compound with an expansion coefficient ⁇ 1 ⁇ 1 and a water absorption rate ⁇ 0.30%, and is post-cured at 175 ° C for 4 hours; if the bottom surface of the bottom pin is plated with nickel-palladium gold or pure gold , instead of electroplating pure tin, direct laser marking, cutting and separating, testing, braiding, and making CSP type MEMS package based on custom lead frame; if the bottom surface of the bottom pin is not Electroplated nickel-palladium gold or pure gold, electroplating pure tin on the bottom surface of the bottom pin, then laser marking, cutting and separating, testing, braiding, and making a CSP-type MEMS package based on a custom lead frame;
  • the lead frame is reversely fed, and the second VGA amplifier chip is reversed on the bottom surface of the upturned pin, that is, the second VGA amplifier.
  • the bump on the chip 21 is connected to the lower surface 3 of the inner lead and is subjected to the first reflow soldering; then, on the flip chip bonding machine, the front side of the semi-finished lead frame to which the second VGA amplifier chip is bonded is fed.
  • the third VGA amplifier chip is reversed on the front side of the upturned pin, that is, the bump on the third VGA amplifier chip 27 is connected to the upper surface 6 of the inner lead, and the second reflow is performed; then, in the film On the sheet bonding machine, the front side of the semi-finished lead frame to which the third VGA amplifier chip is bonded is fed, and the MEMS chip 1 with the adhesive film is stacked on the back side of the third VGA amplifier chip for segment baking, that is, in an oven. After raising the temperature for 15 minutes, the temperature was raised to 100 ° C for 25 minutes, and then the temperature was raised for 5 minutes.
  • the temperature was raised to 150 ° C for 35 minutes, and the temperature was lowered to 70 ° C for 10 minutes; the anti-separation was used during the segmentation baking process.
  • Layer process positively tilting the pins from the pads on the MEMS chip Low arc welding wire of the pad; the punching rate is controlled at 5%, no void and separation layer, and the environment is packaged with an environmentally-friendly molding compound with expansion coefficient ⁇ 1 ⁇ 1 and water absorption rate ⁇ 0.30%, and post-cured at 175 °C for 4 hours; If the bottom surface of the bottom surface pin has been plated with nickel-palladium gold or pure gold, then the pure tin is not plated, the laser marking, the rib separation, the test, and the braiding are performed, and the CSP type MEMS package based on the custom lead frame is obtained.
  • the package generally includes a MEMS chip and a wide-band, low-noise, low-distortion, high-gain precision voltage-controlled VGA amplifier chip.
  • the MEMS chip is back-bonded to the front side of the upturned pin by an insulating glue, and the low-radius line is reversed from the pad of the MEMS chip to the back of the winged gull-shaped inner pin, and the VGA amplifier chip is insulated or insulated.
  • the film is bonded to the back side of the MEMS chip, and the high-low arc welding line is formed from the pad on the VGA amplifier chip to the front surface of the wing-gull type upturned inner pin.
  • the anti-warping process is adopted: the thinned wafer is diced and drawn by A-WD-300TXB dicing machine.
  • the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ⁇ 10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; on the adhesive sheeting machine, the lead frame is first tilted. The first adhesive sheet is placed on the front end of the inner lead, and then the MEMS chip is placed in the opposite direction on the front side of the multi-row matrix CSP lead frame of the first adhesive sheet, and all the MEMS chips are stuck.
  • the section baking is carried out, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes. After 25 minutes, the temperature is raised for another 5 minutes, the temperature is raised to 150 ° C for 35 minutes, and the temperature is lowered to 70 ° C for 10 minutes.
  • the anti-separation process is used in the step-by-step baking process. After the semi-finished multi-row matrix CSP lead frame is reverse fed, the back pad of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type is reversed to the lower arc of the MEMS chip.
  • the semi-finished multi-row matrix CSP lead frame with the second bonding wire is fed, and the second adhesive sheet is drawn on the back of the MEMS chip, and the device automatically picks up the first A VGA amplifier chip is accurately placed on the back side of the diced MEMS chip, and after bonding the first VGA amplifier chip, the same segmented baking is used, and the anti-separation layer process is adopted in the segment baking process;
  • the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip 8 has been bonded is fed forward, from the pad on the first VGA amplifier chip 8 to the multi-row matrix CSP lead frame wing gull type
  • the top pad of the upturned inner pin 11 is high and low arc to hit the first bond wire 7;
  • the plastic sealing material with expansion coefficient ⁇ 1 ⁇ 1, water absorption rate ⁇ 0.30% is selected, the punching rate is controlled at 5%, no void and separation layer, and post-curing at 150 °C for 5 hours
  • the dicing feed speed is ⁇ 10 mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • On the machine first place the first adhesive on the front end of the lead on the lead frame, and then place the MEMS chip in the opposite direction on the multi-row matrix CSP lead frame of the first adhesive.
  • On the front side after all the MEMS chips are glued, they are subjected to segment baking, that is, in the oven, the temperature rises 15 In the minute, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes.
  • the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process;
  • the baked semi-finished multi-row matrix CSP lead frame is reverse fed, from the back pad of the multi-row matrix CSP lead frame wing gull type upturned inner pin to the MEMS chip
  • the pad is reversed to the second arc of the lower arc; on the film sticking machine, the semi-assembled multi-row matrix CSP lead frame of the second bonding wire is fed, and the second side of the MEMS chip is marked.
  • Adhesive glue the first VGA amplifier chip automatically picked up by the device, accurately placed on the back side of the MEMS chip that has been glued, after bonding the first VGA amplifier chip, using the same segmental baking, in the segment baking
  • the anti-separation layer process is adopted in the process; on the ball welder, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip is bonded is forwardly fed, from the pad on the first VGA amplifier chip to the multi-row Matrix CSP lead frame wing gull type upturned inner lead front pad
  • the first bonding wire is used in low arc; the environmentally-friendly transparent plastic sealing material package with expansion coefficient ⁇ 1 ⁇ 1 and water absorption rate ⁇ 0.25% is used, and the automatic encapsulation system and the lower cavity transparent plastic sealing mold and the MEMS chip bonding wire are used.
  • the punching rate is controlled at 5%, no void and separation layer, and post-curing at 150 ° C for 1 hour; on the adhesive sheeting machine, the post-cured CSP semi-finished lead frame is reversely fed First, the fast curing glue is spotted on the first groove, and the device automatically picks up the MEMS cover plate and places it on the first groove of the glue; then stacks the back surface of the MEMS chip with an insulating glue or an insulating film.
  • the punching rate is controlled at 5%, no void and separation layer, and post-cured at 175 °C for 4 hours; laser marking, cutting separation, testing, braiding, based on Customized lead frame CSP type MEMS package.
  • the UBM metal layer required for flip-chip packaging is also required; the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, and the bumped wafer is thinned to 175 ⁇ m, without bumps.
  • Thinning to 180 ⁇ m; rough grinding speed of 6 ⁇ m/s during the thinning process, refining speed of 0.15 ⁇ m/s, polishing speed of 0.05 ⁇ m/s; and anti-warping process: then, using A-WD-300TXB dicing machine
  • the diced wafer is diced, and the dicing process is performed by a double-knife process for preventing sharding.
  • the dicing feed speed is ⁇ 10 mm/s
  • the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
  • MEMS partition walls are arranged in parallel on the upper surface of the inner pins of the oppositely disposed inner pins, and the two MEMS partition walls and inner leads form a cavity, that is, using a plastic sealing system and a MEMS cavity mold, using a fast curing liquid epoxy Molding material, MEMS cavity process parameters are optimized by DOE, mold temperature 1 80°C, clamping pressure 90kgf/cm 2 , injection pressure 35Kg f/cm 2 , injection time 3s, curing time 120s; then, the MEMS chip with diaphragm is stuck in the cavity for segment baking, ie in the oven In the temperature rise for 15 minutes, the temperature is raised to 100 ° C for 25 minutes, and then the temperature is raised for 5 minutes, the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered for 10 minutes, the temperature is lowered to 70 ° C to
  • the UBM metal layer required for flip-chip packaging is also required; the wafer is thinned by a 8 ⁇ to 12 ⁇ thinner, the bumped wafer is thinned to 160 ⁇ m, and the bumpless wafer Thinning to 140 ⁇ m; rough grinding speed of 6 ⁇ m/s during thinning, fine grinding speed of 0.15 ⁇ m/s, polishing speed of 0.05 ⁇ m/s; simultaneous anti-warping process: then, using A-WD-300TXB dicing machine The diced wafer is diced, and the dicing process is performed by a double-knife process for preventing sharding.
  • the dicing feed speed is ⁇ 10 mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; the lead frame is reversed.
  • the MEMS chip with the adhesive film is pasted on the bottom surface of the upturned pin by means of a rubber film sticking machine, and is subjected to segment baking, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes.
  • the anti-separation layer process is adopted, and the low-radiation bonding wire of the front pad of the upturned pin from the pad on the other VGA amplifier chip is packaged in an environmentally-friendly plastic package with an expansion coefficient ⁇ 1 ⁇ 1 and a water absorption rate ⁇ 0.30%.
  • the bottom surface of the bottom pin is not plated with pure gold, then pure tin is plated on the bottom surface of the bottom pin, then laser marking, cutting and separating, testing, braiding, and CSP type MEMS package based on custom lead frame .

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)

Abstract

A CSP type MEMS packaging piece based on a customised lead frame and a production method therefor. An MEMS chip (1) with protrusions is mounted on an upper surface (6) of an inner pin of a packaging piece in an inverted mode, and the MEMS chip (1) is connected to a bonding pad (15) on a back face of the inner pin; a first VGA amplifier chip (8) is pasted on the MEMS chip (1), and the first VGA amplifier chip (8) is connected to the upper surface (6) of the inner pin; a bottom face pin metal layer (14) is arranged on a bottom face of a bottom face pin (12); and a first plastic packaging body (10) is arranged on the lead frame in a plastic packaging mode, all devices are arranged in the first plastic packaging body (10) in a plastic packaging mode, and only the bottom face pin metal layer (14) is exposed out of the first plastic packaging body (10). The CSP type MEMS packaging piece based on the customised lead frame is manufactured through the procedures of manufacturing a lead frame, thinning and scribing a wafer, pasting a chip, welding wires, carrying out plastic packaging and the like. The packaging piece can eliminate interference, ensure the signal detection precision of the MEMS chip, reduce the influence of additional and parasitic inductance, capacitance and resistance of the packaging piece itself and environmental interference on signals, and prevent output signals from being intercepted, distorted or gained.

Description

基于定制引线框架的CSP型MEMS封装件及生产方法CSP type MEMS package based on custom lead frame and production method thereof 技术领域Technical field
本发明属于半导体制造技术领域,涉及一种基于定制引线框架的CSP型MEMS封装件,本发明还涉及一种该封装件的生产方法。The invention belongs to the technical field of semiconductor manufacturing, and relates to a CSP type MEMS package based on a customized lead frame, and to a method for producing the package.
背景技术Background technique
CSP(Chip Scale Package,以下同),即芯片级封装,这种封装是在TSOP和BGA的基础上发展起来的一种薄型、微型封装。CSP可以实现芯片面积与封装面积之比超过1︰1.14的封装,其封装面积约为普通BGA的1/3,仅仅相当于TSOP内存芯片封装面积的1/6。CSP不但体积小,同时也更薄,其基板到发热体的最有效散热路径往往只有0.2mm,大大提高了内存芯片长时间运行的可靠性,线路阻抗显著减小,芯片速度也随之得到大幅度提高。CSP (Chip Scale Package, the same below), chip-scale package, this package is a thin, micro package developed on the basis of TSOP and BGA. CSP can realize a package with a ratio of chip area to package area exceeding 1..1.14, and its package area is about 1/3 of that of ordinary BGA, which is only 1/6 of the package area of TSOP memory chip. CSP is not only small in size, but also thinner. The most effective heat dissipation path from the substrate to the heating element is only 0.2mm, which greatly improves the reliability of the memory chip for a long time running, the line impedance is significantly reduced, and the chip speed is also greatly increased. The range is increased.
在DIP、SOP等传统封装形式的MEMS封装件中,存在的主要问题是如何解决消除干扰,保证MEMS芯片对信号的检测精度和增益问题。虽然MEMS芯片具有较强的信号的检测功能,但是在实际使用中会受到封装件本身的附加电感、电容、电阻及环境的干挠信号影响,造成输出信号截止或失真。In MEMS packages such as DIP and SOP, the main problem is how to eliminate interference and ensure the detection accuracy and gain of the MEMS chip. Although the MEMS chip has a strong signal detection function, in actual use, it is affected by the additional inductance, capacitance, resistance and environmental dry deflection signal of the package itself, causing the output signal to be cut off or distorted.
发明内容Summary of the invention
本发明的目的是提供一种基于定制引线框架的CSP型MEMS封装件,不受封装件本身附加电感、电容、电阻及环境的干挠信号影响,避免输出信号截止或失真。The object of the present invention is to provide a CSP type MEMS package based on a custom lead frame, which is not affected by the additional inductance, capacitance, resistance and environmental dry deflection signals of the package itself, and avoids the output signal being cut off or distorted.
本发明的另一个目的是提供一种上述MEMS封装件的生产方法。Another object of the present invention is to provide a method of producing the above MEMS package.
为实现上述目的,本发明所采用的技术方案是:一种基于定制引线框架的CSP型MEMS封装件,包括引线框架,引线框架中的内引脚与底面引脚相连,内引脚上表面倒装有带凸点的MEMS芯片,MEMS芯片上的凸点通过第二键合线与内引脚的背面焊盘相连;MEMS芯片上面粘贴有第一VGA放大器芯片,第一VGA放大器芯片通过第一键合线与内引脚上表面相连;沿垂直于两排底面引脚连线的方向、底面引脚远离内引脚上表面一端的两侧平行设置有第一凹槽和第二凹槽,底面引脚的底面上设有底面引脚金属层;引线框架上塑封有第一塑封体,所有器件均塑封于第一塑封体内,只有底面引脚金属层露出第一塑封体外。In order to achieve the above object, the technical solution adopted by the present invention is: a CSP type MEMS package based on a custom lead frame, including a lead frame, wherein the inner pin of the lead frame is connected to the bottom surface pin, and the upper surface of the inner pin is inverted. Mounted with a bumped MEMS chip, the bump on the MEMS chip is connected to the back pad of the inner pin through the second bonding wire; the first VGA amplifier chip is pasted on the MEMS chip, and the first VGA amplifier chip passes the first The bonding wire is connected to the upper surface of the inner pin; the first groove and the second groove are arranged in parallel along a direction perpendicular to the line connecting the bottom rows of the two rows, and the bottom pin is away from the opposite ends of the upper surface of the inner pin. The bottom surface of the bottom surface of the bottom pin is provided with a metal layer of the bottom surface; the first plastic body is molded on the lead frame, and all the components are molded in the first plastic body, and only the metal layer of the bottom surface is exposed to the first plastic body.
本发明所采用的另一个技术方案是:一种上述基于定制引线框架的CSP型MEMS封装件的生产方法,具体按以下步骤进行:Another technical solution adopted by the present invention is: a production method of the above-mentioned custom lead frame-based CSP type MEMS package, which is specifically carried out according to the following steps:
步骤1:制作多排矩阵式无载体翼鸥型内引脚的CSP引线框架,内引脚的正面和背面除电镀铜外,还要镀银或镀镍钯金焊盘、或者根据电镀倒装封装需要电镀UBM金属层;Step 1: Make a multi-row matrix carrierless wing gull-type internal CSP lead frame with the front and back sides of the inner leads in addition to electroplated copper, silver or nickel-plated palladium-plated pads, or flip-chip according to plating The package needs to be plated with a UBM metal layer;
采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至150~200μm,不带凸点的晶圆减薄至130~180μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;The wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 150-200 μm, and the wafer without bumps is thinned to 130-180 μm; the thinning process is thick The grinding speed is 6μm/s, the finishing speed is 0.15μm/s, and the polishing speed is 0.05μm/s. At the same time, the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ≤10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
步骤2:在粘片胶粘片机上,先在引线框架上翘内引脚的正面端面点上第一粘片胶,然后将MEMS芯片反向放置在已点第一粘片胶的多排矩阵式CSP引线框架上翘内引脚的正面,全部MEMS芯片1粘完后,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺;在球焊机上,将烘烤后的半成品多排矩阵式CSP引线框架反向进料,从多排矩阵式CSP引线框架翼鸥型的上翘内引脚的背面焊盘向MEMS芯片上的焊盘反打低弧度第二键合线;在胶膜片粘片机上,将已打第二键合线的半装成品多排矩阵式CSP引线框架进料,在MEMS芯片背面划上第二粘片胶,设备自动吸取的第一VGA放大器芯片,准确放置在已划胶的MEMS芯片的背面,粘接完全部第一VGA放大器 芯片后,采用同上的分段烘烤,分段烘烤过程中采用防离层工艺;在球焊机上,将已粘接第一VGA放大器芯片的半成品多排矩阵式CSP引线框架正向进料,从第一VGA放大器芯片上的焊盘向多排矩阵式CSP引线框架翼鸥型的上翘内引脚的正面焊盘高低弧度打第一键合线线;焊线以后,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料塑封,冲线率控制在5%,无空洞和离层,在150℃温度下后固化5小时;若底部引脚在框架生产中未电镀镀镍钯金或纯金,则电镀钝锡,钝锡层厚度7.62~15.24μm,并在175℃下,烘烤1小时预防锡须生长;之后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上已电镀镍钯金或纯金,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;Step 2: On the adhesive sheet bonding machine, first place the first adhesive sheet on the front end surface of the lead pin on the lead frame, and then place the MEMS chip in reverse on the multi-row matrix of the first adhesive sheet. The front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes. The temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking The lead frame is reversely fed, and the back pad of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type is reversed to the second radiant wire of the pad on the MEMS chip; the film is stuck in the film On the chip machine, the semi-assembled multi-row matrix CSP lead frame with the second bonding wire is fed, and the second adhesive sheet is drawn on the back of the MEMS chip, and the first VGA amplifier chip automatically picked up by the device is accurately placed in the film. The back side of the MEMS chip that has been glued, bonding the entire first VGA amplifier After the chip, the same segmental baking is used, and the anti-separation layer process is adopted in the segment baking process; on the ball bonding machine, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip is bonded is forwarded. The first bonding wire is drawn from the pad on the first VGA amplifier chip to the front pad of the multi-row matrix CSP lead frame wing gull type upturned inner lead; after the bonding wire, the expansion coefficient is selected Α1≤1, water absorption rate ≤0.30%, plastic packaging material plastic seal, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 °C for 5 hours; if the bottom pin is not plated in the frame production Nickel palladium gold or pure gold, plating blunt tin, blunt tin layer thickness 7.62 ~ 15.24μm, and baking at 175 ° C, 1 hour to prevent whisker growth; after laser marking, cutting separation, testing, tape, A CSP type MEMS package based on a custom lead frame is prepared; if the bottom surface of the bottom pin is plated with nickel palladium gold or pure gold, no pure tin plating, direct laser marking, shear separation, testing, tape making, A CSP type MEMS package based on a custom lead frame;
本发明MEMS封装件能消除干挠,保证对MEMS芯片信号的检测精度,减小封装件本身的附加及寄生电感、电容、电阻和环境的干挠对信号的影响,防止造成输出信号截止、失真或增益。本封装件除MEMS芯片外还加入了宽频带、低噪声、低畸变、高增益精度的压控VGA放大器(Variable Gain Amplifire,可变增益放大器,简称VGA放大器)芯片,该芯片由一个可变衰减器、增益控制界面和一个固定增益放大器三部分组成,可以自动调整频率,将MEMS器件检测到的信号衰减、放大,但不会失真,常应用于射频自动增益放大器、视频增益控制、A/D转换器量程扩展和信号检测系统。The MEMS package of the invention can eliminate the dry deflection, ensure the detection precision of the MEMS chip signal, reduce the additional and parasitic inductance of the package itself, the influence of the capacitance, the resistance and the dry deflection of the environment on the signal, and prevent the output signal from being cut off and distorted. Or gain. In addition to the MEMS chip, this package incorporates a wide-band, low-noise, low-distortion, high-gain-precision voltage-controlled VGA amplifier (Variable Gain Amplifire, VGA amplifier) chip with a variable attenuation. The device, the gain control interface and a fixed gain amplifier are three parts, which can automatically adjust the frequency and attenuate and amplify the signal detected by the MEMS device, but without distortion. It is often used in RF automatic gain amplifier, video gain control, A/D. Converter range extension and signal detection system.
附图说明DRAWINGS
图1是本发明MEMS封装件第一种实施例的剖面示意图。BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a cross-sectional view showing a first embodiment of a MEMS package of the present invention.
图2是本发明MEMS封装件第二种实施例的剖面示意图。2 is a cross-sectional view showing a second embodiment of the MEMS package of the present invention.
图3是本发明MEMS封装件第三种实施例的剖面示意图。3 is a cross-sectional view showing a third embodiment of the MEMS package of the present invention.
图4是本发明MEMS封装件第四种实施例的剖面示意图。4 is a cross-sectional view showing a fourth embodiment of the MEMS package of the present invention.
图5是本发明MEMS封装件第五种实施例的剖面示意图。Figure 5 is a cross-sectional view showing a fifth embodiment of the MEMS package of the present invention.
图中:1.MEMS芯片,2.第一粘片胶,3.内引脚下表面,4.第一凹槽,5.内引脚,6.内引脚上表面,7.第一键合线,8.第一VGA放大器芯片,9.第二粘片胶,10.第一塑封体,11.正面焊盘,12.底面引脚,13.第二凹槽,14.底面引脚金属层,15.背面焊盘,16.第二键合线,17.MEMS盖板,18.第二塑封体,19.MEMS盖板开孔,20.第一胶膜片,21.第二VGA放大器芯片,22.芯片凸点,23.第一UBM,24.MEMS隔墙,25.第二胶膜片,26.第二UBM,27.第三VGA放大器芯片。In the figure: 1. MEMS chip, 2. first adhesive sheet, 3. inner pin lower surface, 4. first groove, 5. inner pin, 6. inner pin upper surface, 7. first key Alignment, 8. First VGA amplifier chip, 9. Second adhesive sheet, 10. First plastic package, 11. Front pad, 12. Back surface pin, 13. Second groove, 14. Bottom pin Metal layer, 15. back pad, 16. second bond wire, 17. MEMS cover, 18. second plastic body, 19. MEMS cover opening, 20. first film, 21. second VGA amplifier chip, 22. chip bump, 23. first UBM, 24. MEMS partition, 25. second film, 26. second UBM, 27. third VGA amplifier chip.
具体实施方式detailed description
下面结合附图和具体实施方式对本发明进行详细说明。The invention will be described in detail below with reference to the drawings and specific embodiments.
本发明MEMS封装件所有实施例的结构中均采用相同的适用CSP封装的多排矩阵式无引脚CSP定制引线框架,该定制引线框架的外形尺寸为259.00mm×79.00mm,并根据封装件的尺寸最优化设计框架的排数(8~12排)和封装单元数(120~240),该定制引线框架中的内引脚向上翘起成鸥翼形,该内引脚的上引脚面和下引脚面均与水平面平行,上引脚面的正反面上均电镀有金属层,以供焊线;该定制引线框架中的下引脚底面两端都设有凹槽,以供塑封料嵌入,使塑封体与引线框架牢固结合,下引脚底面上电镀锡层或铜层或金层,作为信号、电源的引出(入)端。The structure of all embodiments of the MEMS package of the present invention adopts the same multi-row matrix leadless CSP custom lead frame suitable for CSP package, and the custom lead frame has an external dimension of 259.00 mm×79.00 mm, and according to the package The optimal size of the design frame (8 to 12 rows) and the number of package units (120 to 240), the inner leads in the custom lead frame are lifted up into a gull-wing shape, and the upper lead surface of the inner pin And the lower surface of the pin are parallel to the horizontal plane, and the front and back surfaces of the upper lead surface are plated with a metal layer for the bonding wire; the bottom surface of the lower pin in the custom lead frame is provided with a groove for the plastic sealing The material is embedded so that the plastic body is firmly bonded to the lead frame, and a tin layer or a copper layer or a gold layer is plated on the bottom surface of the lower pin as the lead-in end of the signal and power source.
如图1所示,本发明MEMS封装件第一种实施例,该实施例为不带盖板的MEMS封装件结构,包括定制引线框架,定制引线框架中的内引脚5与底面引脚12相连,内引脚上表面6通过第一粘片胶2粘接有MEMS芯片1,MEMS芯片1为带凸点芯片,MEMS芯片1倒装于内引脚上表面6上,MEMS芯片1上的凸点通过第二键合线16与内引脚的背面焊盘15相连接;MEMS芯片1上面通过第二粘片胶9粘贴有第一VGA放大器芯片8,第一VGA放大器芯片8上的焊盘通过第一键合线7与内引脚上表面6上的正面焊盘11相连接;沿垂直于两排底面引脚12连线的方向、底面引脚12远离内引脚上表面6一端的两侧平行设置有 第一凹槽4和第二凹槽13,一排底面引脚12上的第一凹槽4朝向另一排底面引脚12,底面引脚12的底面上设有底面引脚金属层14;第一VGA放大器芯片8、第二粘片胶9、第二键合线16、正面焊盘11、内引脚上表面6、MEMS芯片1、第一粘片胶2、内引脚下表面3、第一键合线7、背面焊盘15、第一凹槽4、第二凹槽13、内引脚5、底面引脚12的上表面以及底面引脚金属层14构成了电路整体。MEMS芯片1、第一键合线7、第一VGA放大器芯片8、第二键合线16、内引脚5、正面焊盘11、背面焊盘15以及底面引脚金属层14构成电路的电源和信号通道。引线框架上塑封有第一塑封体10,底面引脚12、内引脚5、第一键合线7、第二键合线16、MEMS芯片1、第一VGA放大器芯片8、第一凹槽4和第二凹槽13均位于第一塑封体10内,只有底面引脚金属层14露出第一塑封体10外。As shown in FIG. 1 , a first embodiment of the MEMS package of the present invention is a MEMS package structure without a cap plate, including a custom lead frame, and an inner pin 5 and a bottom pin 12 in the custom lead frame. Connected, the upper surface 6 of the inner pin is bonded to the MEMS chip 1 through the first adhesive sheet 2, and the MEMS chip 1 is a bumped chip. The MEMS chip 1 is flipped on the upper surface 6 of the inner lead, on the MEMS chip 1. The bump is connected to the back pad 15 of the inner lead through the second bonding wire 16; the first VGA amplifier chip 8 is pasted on the MEMS chip 1 through the second adhesive sheet 9, and the soldering on the first VGA amplifier chip 8 The disk is connected to the front pad 11 on the upper surface 6 of the inner lead through the first bonding wire 7; in the direction perpendicular to the line connecting the pins 12 of the bottom row of the two rows, the bottom pin 12 is away from the upper surface 6 of the inner pin. The sides are arranged in parallel The first groove 4 and the second groove 13, the first groove 4 on the bottom row of pins 12 faces the other row of bottom pins 12, and the bottom surface of the bottom surface of the bottom pin 12 is provided with a bottom pin metal layer 14; First VGA amplifier chip 8, second adhesive sheet 9, second bonding wire 16, front pad 11, inner pin upper surface 6, MEMS chip 1, first adhesive sheet 2, inner pin lower surface 3 The first bonding wire 7, the back surface pad 15, the first recess 4, the second recess 13, the inner lead 5, the upper surface of the bottom surface pin 12, and the bottom surface pin metal layer 14 constitute the entire circuit. The MEMS chip 1, the first bonding wire 7, the first VGA amplifier chip 8, the second bonding wire 16, the inner lead 5, the front pad 11, the back surface pad 15, and the bottom pin metal layer 14 constitute a power supply for the circuit. And signal channels. The lead frame is molded with a first molding body 10, a bottom surface pin 12, an inner lead 5, a first bonding wire 7, a second bonding wire 16, a MEMS chip 1, a first VGA amplifier chip 8, and a first groove. 4 and the second recess 13 are both located in the first molding body 10, and only the bottom surface pin metal layer 14 is exposed outside the first molding body 10.
如图2所示,本发明MEMS封装件第二种实施例,该实施例是一种底部带盖板的MEMS芯片与VGA放大器芯片堆叠封装件结构,该结构与第一种实施例中MEMS封装件的结构基本相同,两者之间的区别在于:第二种实施例中两排底面引脚12之间设有MEMS盖板17,MEMS盖板17的一侧与一排底面引脚12上的第一凹槽4固接,MEMS盖板17上设有MEMS盖板开孔19;MEMS盖板17、内引脚5和MEMS芯片1围成的腔体内塑封有透明的第二塑封体18;As shown in FIG. 2, a second embodiment of the MEMS package of the present invention is a MEMS chip and VGA amplifier chip stacked package structure with a bottom cover plate, and the structure and the MEMS package in the first embodiment. The structure of the components is basically the same, and the difference between the two is that in the second embodiment, the MEMS cover plate 17 is disposed between the two rows of the bottom surface pins 12, and one side of the MEMS cover plate 17 and one row of the bottom surface pins 12 are provided. The first recess 4 is fixed, and the MEMS cover 17 is provided with a MEMS cover opening 19; the MEMS cover 17, the inner lead 5 and the MEMS chip 1 are integrally molded with a transparent second plastic body 18 ;
第一塑封体10、第二键合线15、第一VGA放大器芯片8、第二粘片胶9、内引脚上表面6、正面焊盘11、内引脚5、底面引脚12的上表面、第一凹槽4、第二塑封体18、MEMS芯片1、第一粘片胶2、第一键合线7、背面焊盘15,内引脚下表面3、第二凹槽13、MEMS盖板17以及MEMS盖板开孔19构成了电路整体。MEMS芯片1、第一VGA放大器芯片8、第二键合线16、内引脚5、正面焊盘11、背面焊盘15以及底面引脚金属层14构成电路的电源和信号通道。The first molding body 10, the second bonding wire 15, the first VGA amplifier chip 8, the second adhesive sheet 9, the inner lead upper surface 6, the front surface pad 11, the inner lead 5, and the bottom surface pin 12 Surface, first groove 4, second molding body 18, MEMS chip 1, first adhesive sheet 2, first bonding wire 7, back surface pad 15, inner pin lower surface 3, second groove 13, The MEMS cover plate 17 and the MEMS cover opening 19 constitute the entire circuit. The MEMS chip 1, the first VGA amplifier chip 8, the second bonding wire 16, the inner lead 5, the front pad 11, the back pad 15 and the bottom pin metal layer 14 constitute a power supply and signal path of the circuit.
如图3所示,本发明MEMS封装件第三种实施例,包括定制引线框架,该定制引线框架中的内引脚5与底面引脚12相连接,内引脚上表面6通过第一胶膜片20粘贴有MEMS芯片1,MEMS芯片1上的焊盘通过第一键合线7与内引脚上表面6上的正面焊盘11相连接,内引脚上表面6设有MEMS隔墙24,两排内引脚5上MEMS隔墙24的顶端通过MEMS盖板17相连接,MEMS盖板17上设有MEMS盖板开孔19,MEMS隔墙24、MEMS盖板17、内引脚上表面6和MEMS芯片1围成一个腔体,第一键合线7和正面焊盘11均位于该腔体内,该腔体内塑封有透明的第二塑封体18;内引脚下表面3通过第一UBM 23与第二VGA放大器芯片21粘接,第一UBM 23与第二VGA放大器芯片21上的芯片凸点22相粘接,即第二VGA放大器芯片21上的芯片凸点22朝上;沿垂直于两排底面引脚12连线的方向、底面引脚12远离内引脚上表面6一端的两侧平行设置有第一凹槽4和第二凹槽13,一排底面引脚12上的第一凹槽4朝向另一排底面引脚12,底面引脚12的底面上设有底面引脚金属层14;定制引线框架上塑封有第一塑封体10,除腔体、MEMS盖板17和底面引脚金属层14外,其余所有的器件均塑封于第一塑封体10内。As shown in FIG. 3, a third embodiment of the MEMS package of the present invention includes a custom lead frame in which the inner lead 5 is connected to the bottom surface pin 12, and the inner lead upper surface 6 passes through the first adhesive. The diaphragm 20 is pasted with the MEMS chip 1. The pads on the MEMS chip 1 are connected to the front pads 11 on the upper surface 6 of the inner leads through the first bonding wires 7, and the upper surface 6 of the inner leads is provided with a MEMS partition. 24, the top end of the MEMS partition wall 24 of the two rows of inner pins 5 are connected by the MEMS cover plate 17, and the MEMS cover plate 17 is provided with the MEMS cover opening 19, the MEMS partition wall 24, the MEMS cover plate 17, and the inner lead pins. The upper surface 6 and the MEMS chip 1 enclose a cavity. The first bonding wire 7 and the front surface pad 11 are both located in the cavity, and the cavity is molded with a transparent second molding body 18; the inner pin lower surface 3 passes through The first UBM 23 is bonded to the second VGA amplifier chip 21, and the first UBM 23 is bonded to the chip bump 22 on the second VGA amplifier chip 21, that is, the chip bump 22 on the second VGA amplifier chip 21 faces upward. a first groove 4 is disposed in parallel along a direction perpendicular to the line connecting the two rows of the bottom surface pins 12, and a side of the bottom surface pin 12 away from the end of the upper surface 6 of the inner lead The second recess 13 has a first recess 4 on the bottom surface of the row of pins 12 facing the other row of bottom pins 12, and a bottom surface of the bottom surface of the bottom pin 12 is provided with a bottom metal layer 14; the custom lead frame is molded with a plastic The first molding body 10, except for the cavity, the MEMS cover plate 17, and the bottom pin metal layer 14, is molded in the first molding body 10.
第一塑封体10、MEMS盖板17、盖板开孔19、MEMS隔墙24、引脚上表面6、第二VGA放大器芯片21、芯片凸点22、第一UBM 23、正面焊盘11、内引脚下表面3、内引脚5、第一凹槽4、第二凹槽13以及底面引脚12的上表面构成封装电路整体。MEMS芯片1、第一键合线7、正面焊盘11、第二VGA放大器芯片21、芯片凸点22、第一UBM 23、内引脚5以及底面引脚金属层14构成电路的电源和信号通道,输出端接触牢固,高频性能好。 First molding body 10, MEMS cover plate 17, cover opening 19, MEMS partition wall 24, lead upper surface 6, second VGA amplifier chip 21, chip bump 22, first UBM 23, front pad 11, The upper surfaces of the inner lead lower surface 3, the inner lead 5, the first recess 4, the second recess 13, and the bottom surface lead 12 constitute the package circuit as a whole. The MEMS chip 1, the first bonding wire 7, the front pad 11, the second VGA amplifier chip 21, the chip bump 22, the first UBM 23, the inner lead 5, and the bottom pin metal layer 14 constitute a power supply and signal of the circuit. The channel and the output end are firmly connected, and the high frequency performance is good.
如图4所示,本发明MEMS封装件第四种实施例,该实施例是一种底部带盖板、且内引脚两面分别粘贴MEMS芯片与VGA放大器芯片封装体,其结构与第二种实施例的结构基本相同,两者之间的区别是:第四种实施例中,MEMS芯片1通过第一胶膜片20粘贴于内引脚下表面3上,MEMS芯片1上的焊盘通过第二键合线16与内引脚下表面3上的背 面焊盘15相连接;内引脚上表面6上通过第二胶膜片25粘贴有第一VGA放大器芯片8,第一VGA放大器芯片8上的焊盘通过第一键合线7与正面焊盘11相连接;定制引线框架采用多排矩阵式CSP镍钯金电镀框架。As shown in FIG. 4 , a fourth embodiment of the MEMS package of the present invention is a bottom cover with a MEMS chip and a VGA amplifier chip package on both sides of the inner lead, and the structure and the second The structure of the embodiment is basically the same, and the difference between the two is: in the fourth embodiment, the MEMS chip 1 is pasted on the inner pin lower surface 3 through the first adhesive film 20, and the pad on the MEMS chip 1 passes. The second bonding wire 16 and the back on the lower surface 3 of the inner pin The surface pads 15 are connected; the first VGA amplifier chip 8 is pasted on the upper surface 6 of the inner lead via the second adhesive film 25, and the pads on the first VGA amplifier chip 8 are soldered to the front surface through the first bonding wires 7. The disks 11 are connected; the custom lead frame uses a multi-row matrix CSP nickel-palladium gold plating frame.
第一塑封体10、第二键合线16、第一VGA放大器芯片8、第二胶膜片25、正面焊盘11、内引脚上表面6、内引脚5、第一胶膜片20、MEMS芯片1、背面焊盘15、第一键合线7、底面引脚12的上表面、第二塑封体18、第一凹槽4以及第二凹槽13构成了电路整体。MEMS芯片1、第一键合线7、第一VGA放大器芯片8、正面焊盘11、背面焊盘15、内引脚5以及底面金属层14构成了电路的电源和信号通道,输出端接触牢固。 First molding body 10, second bonding wire 16, first VGA amplifier chip 8, second adhesive film 25, front surface pad 11, inner pin upper surface 6, inner lead 5, first adhesive film 20 The MEMS chip 1, the back surface pad 15, the first bonding wire 7, the upper surface of the bottom surface pin 12, the second molding body 18, the first recess 4, and the second recess 13 constitute the entire circuit. The MEMS chip 1, the first bonding wire 7, the first VGA amplifier chip 8, the front surface pad 11, the back surface pad 15, the inner lead 5, and the bottom metal layer 14 constitute a power supply and signal path of the circuit, and the output end is firmly contacted. .
如图5所示,本发明CSP封装件第五种实施例,该实施例是一种引脚两面倒装VGA放大器芯片、正面堆叠MEMS芯片的封装件,包括定制引线框架,该定制引线框架采用多排矩阵式CSP镍钯金电镀框架,其中的内引脚5向上翘起形成鸥翼型,内引脚上表面6上倒装有第三VGA放大器芯片27,即第三VGA放大器芯片27上的芯片凸点通过第二UBM 26与内引脚上表面6相粘接,第三VGA放大器芯片27上表面通过第二胶膜片25粘接有MEMS芯片1,MEMS芯片1上的焊盘通过第一键合线7与内引脚上表面6上的正面焊盘11相连接;内引脚下表面3上倒装有第二VGA放大器芯片21,即第二VGA放大器芯片21上的芯片凸点22通过第一UBM 23与内引脚下表面3相粘接;沿垂直于两排底面引脚12连线的方向、底面引脚12远离内引脚上表面6一端的两侧平行设置有第一凹槽4和第二凹槽13,一排底面引脚12上的第一凹槽4朝向另一排底面引脚12,底面引脚12的底面上设有底面引脚金属层14;MEMS芯片1、第一键合线7、第二VGA放大器芯片21、内引脚5、正面焊盘11、背面焊盘15以及底面引脚金属层14构成电路的电源和信号通道。引线框架上塑封有第一塑封体10,底面引脚12、内引脚5、第一键合线7、MEMS芯片1、第二VGA放大器芯片21、第三VGA放大器芯片27、第一凹槽4和第二凹槽13均位于第一塑封体10内,只有底面引脚金属层14露出第一塑封体10外。As shown in FIG. 5, a fifth embodiment of the CSP package of the present invention is a package of a two-sided flip-chip VGA amplifier chip and a front-side stacked MEMS chip, including a custom lead frame, and the custom lead frame is adopted. A multi-row matrix CSP nickel-palladium gold electroplating frame in which the inner lead 5 is tilted up to form a gull-wing type, and the upper surface 6 of the inner lead is mounted with a third VGA amplifier chip 27, that is, a third VGA amplifier chip 27 The chip bump is bonded to the inner lead upper surface 6 through the second UBM 26, and the upper surface of the third VGA amplifier chip 27 is bonded to the MEMS chip 1 through the second adhesive film 25, and the pad on the MEMS chip 1 passes. The first bonding wire 7 is connected to the front surface pad 11 on the upper surface 6 of the inner lead; the second VGA amplifier chip 21 is mounted on the lower surface 3 of the inner pin, that is, the chip bump on the second VGA amplifier chip 21. Point 22 is bonded to the lower surface 3 of the inner lead by the first UBM 23; parallel to the sides perpendicular to the line connecting the pins 12 of the bottom row, and the sides of the bottom pin 12 away from the end of the upper surface 6 of the inner lead are arranged in parallel The first groove 4 and the second groove 13 are oriented toward the first groove 4 on the bottom surface of the pin 12 A row of bottom surface pins 12, a bottom surface pin layer 12 is provided on the bottom surface of the bottom surface pins 12; a MEMS chip 1, a first bonding wire 7, a second VGA amplifier chip 21, an inner pin 5, and a front pad 11 The back pad 15 and the bottom pin metal layer 14 form the power and signal path of the circuit. The lead frame is molded with a first molding body 10, a bottom surface pin 12, an inner lead 5, a first bonding wire 7, a MEMS chip 1, a second VGA amplifier chip 21, a third VGA amplifier chip 27, and a first groove. 4 and the second recess 13 are both located in the first molding body 10, and only the bottom surface pin metal layer 14 is exposed outside the first molding body 10.
第一塑封体10、第一键合线7、MEMS芯片1、第二胶膜片25、第二VGA放大器芯片21、芯片凸点22、内引脚上表面6、内引脚下表面3、内引脚5、第三VGA放大器芯片27、第一UBM23、第二UBM26、底面引脚上表面6、第一凹槽4、第二凹槽13以及底面引脚金属层14构成了电路整体。由MEMS芯片1、第一键合线7、第一VGA放大器芯片8、第一UBM23、芯片凸点22、第二VGA放大器芯片21、第二UBM 26、内引脚5以及底面引脚金属镀层14构成了电路的电源和信号通道,输出端接触牢固,高频性能好。 First molding body 10, first bonding wire 7, MEMS chip 1, second film 25, second VGA amplifier chip 21, chip bump 22, inner pin upper surface 6, inner pin lower surface 3, The inner lead 5, the third VGA amplifier chip 27, the first UBM 23, the second UBM 26, the bottom surface lead upper surface 6, the first recess 4, the second recess 13, and the bottom lead metal layer 14 constitute the entire circuit. Metal coating by MEMS chip 1, first bonding wire 7, first VGA amplifier chip 8, first UBM 23, chip bump 22, second VGA amplifier chip 21, second UBM 26, inner pin 5, and bottom pin 14 constitutes the power supply and signal channel of the circuit, the output end is firmly contacted, and the high frequency performance is good.
第二VGA放大器芯片21和第三VGA放大器芯片27为带凸点的芯片。The second VGA amplifier chip 21 and the third VGA amplifier chip 27 are bumped chips.
本发明基于定制引线框架的CSP型MEMS封装件的设计过程中,主要解决的问题包括如何消除干挠,保证对MEMS芯片信号的检测精度,减小封装件的体电感、体电容、体电阻及寄生电感、电容、电阻和环境的干挠对信号的影响,防止造成输出信号截止、失真或增益。本封装件除MEMS芯片外还加入了宽频带、低噪声、低畸变、高增益精度的压控VGA放大器(Variable Gain Amplifire,可变增益放大器,简称VGA放大器)芯片,该芯片由一个可变衰减器、增益控制界面和一个固定增益放大器三部分组成,可以自动调整频率,将MEMS器件检测到的信号衰减、放大,但不会失真,常应用于射频自动增益放大器、视频增益控制、A/D转换器量程扩展和信号检测系统。In the design process of the CSP type MEMS package based on the customized lead frame, the main problems to be solved include how to eliminate the dry deflection, ensure the detection precision of the MEMS chip signal, and reduce the body inductance, bulk capacitance, body resistance of the package and The effects of parasitic inductance, capacitance, resistance, and environmental strain on the signal prevent the output signal from being cut off, distorted, or gained. In addition to the MEMS chip, this package incorporates a wide-band, low-noise, low-distortion, high-gain-precision voltage-controlled VGA amplifier (Variable Gain Amplifire, VGA amplifier) chip with a variable attenuation. The device, the gain control interface and a fixed gain amplifier are three parts, which can automatically adjust the frequency and attenuate and amplify the signal detected by the MEMS device, but without distortion. It is often used in RF automatic gain amplifier, video gain control, A/D. Converter range extension and signal detection system.
由于本封装件中至少包含一个MEMS芯片和一个压控VGA芯片,压控VGA芯片内部由一个七级R-2R梯形网络构成的可变衰减器及一个固定增益放大器构成,每级的衰减量为6.02dB,可对输入信号提供0~-42.14dB的衰减,消除分布电容、电感、电阻和寄生电容、电感、电阻对频率和信号的影响。该结构的一个重要优点是优越的噪声特性,在1MHz宽带、最大不失真输出为1Vrms时,输出信噪比为86.6dB。并且,MEMS芯片和宽频带、低噪声、低畸变、高增益精度的压控VGA放大器芯片采用堆叠或下引脚面倒装,因此封装厚度小于1mm, 比同芯片装的TO-263、SOP封装件的体积小得多。Since the package includes at least one MEMS chip and one voltage-controlled VGA chip, the voltage-controlled VGA chip is internally composed of a variable attenuator composed of a seven-stage R-2R ladder network and a fixed gain amplifier, and the attenuation of each stage is 6.02dB, which provides 0~-42.14dB attenuation to the input signal, eliminating the effects of distributed capacitance, inductance, resistance and parasitic capacitance, inductance, and resistance on frequency and signal. An important advantage of this architecture is its superior noise characteristics, with an output signal-to-noise ratio of 86.6dB at 1MHz wideband and a maximum undistorted output of 1Vrms. Moreover, the MEMS chip and the wide-band, low-noise, low-distortion, high-gain precision voltage-controlled VGA amplifier chip are stacked or flip-down, so the package thickness is less than 1mm. It is much smaller than the TO-263 and SOP packages of the same chip.
本发明提供的上述MEMS封装件的制造方法,具体按以下步骤进行:The manufacturing method of the above MEMS package provided by the present invention is specifically carried out according to the following steps:
步骤1:根据芯片和客户需要,设计出不同结构和规格的多排矩阵式CSP引线框架图纸,制作多排(8~16排)矩阵式无载体翼鸥型内引脚的CSP定制引线框架,内引脚的正面和背面除电镀铜外,还要镀银或镀镍钯金焊盘、或者根据电镀倒装封装需要电镀UBM金属层,其翼鸥型内引脚的底部内引脚的正面和背面一般只电镀铜,另外有研磨要求时的引线框架还要电镀一层金,增加底部引脚接触的可靠性和耐磨性;Step 1: According to the needs of the chip and the customer, design a multi-row matrix CSP lead frame drawing with different structures and specifications, and make a multi-row (8-16 rows) matrix type carrierless wing-gull type internal lead CSP custom lead frame. The front and back sides of the inner leads are plated with silver or nickel-plated palladium-plated pads, or the UBM metal layer is plated according to the plated flip-chip package. And the back is generally only plated with copper, and the lead frame when grinding is required to be plated with a layer of gold to increase the reliability and wear resistance of the bottom pin contact;
采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至150~200μm,不带凸点的晶圆减薄至130~180μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;The wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 150-200 μm, and the wafer without bumps is thinned to 130-180 μm; the thinning process is thick The grinding speed is 6μm/s, the finishing speed is 0.15μm/s, and the polishing speed is 0.05μm/s. At the same time, the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ≤10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
步骤2:对于没有盖板和腔体的封装件(如图1所示的第一种实施例):Step 2: For packages without a cover and cavity (as in the first embodiment shown in Figure 1):
在粘片胶粘片机上,先在引线框架上翘内引脚的正面端面点上第一粘片胶2,然后将MEMS芯片1反向放置在已点第一粘片胶2的多排矩阵式CSP引线框架上翘内引脚的正面,全部MEMS芯片1粘完后,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺;在球焊机上,将烘烤后的半成品多排矩阵式CSP引线框架反向进料,从多排矩阵式CSP引线框架翼鸥型的上翘内引脚的背面焊盘15向MEMS芯片1上的焊盘反打低弧度第二键合线16;在胶膜片粘片机上,将已打第二键合线16的半装成品多排矩阵式CSP引线框架进料,在MEMS芯片1背面划上第二粘片胶9,设备自动吸取的第一VGA放大器芯片8,准确放置在已划胶的MEMS芯片1的背面,粘接完全部第一VGA放大器芯片8后,采用同上的分段烘烤,分段烘烤过程中采用防离层工艺;在球焊机上,将已粘接第一VGA放大器芯片8的半成品多排矩阵式CSP引线框架正向进料,从第一VGA放大器芯片8上的焊盘向多排矩阵式CSP引线框架翼鸥型的上翘内引脚的正面焊盘11高低弧度打第一键合线线7;焊线以后,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料塑封,冲线率控制在5%,无空洞和离层,在150℃温度下后固化5小时;若底部引脚在框架生产中未电镀镀镍钯金或纯金,则电镀钝锡,钝锡层厚度7.62~15.24μm,并在175℃下,烘烤1小时预防锡须生长;之后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上已电镀镍钯金或纯金,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;On the adhesive sheet bonding machine, the first adhesive sheet 2 is first placed on the front end surface of the lead pin on the lead frame, and then the MEMS chip 1 is reversely placed on the multi-row matrix of the first adhesive sheet 2 The front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes. The temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking The lead frame is reversely fed, and the second bonding wire 16 is reversed from the back pad 15 of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type to the pad on the MEMS chip 1; On the film sticking machine, the half-packed multi-row matrix CSP lead frame of the second bonding wire 16 is fed, and the second adhesive sheet 9 is marked on the back of the MEMS chip 1, and the first VGA automatically sucked by the device The amplifier chip 8 is accurately placed on the back side of the diced MEMS chip 1, and after bonding the entire first VGA amplifier chip 8 The same stepwise baking is adopted, and the anti-separation layer process is adopted in the segment baking process; on the ball bonding machine, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip 8 is bonded is fed forward. The first bonding wire 7 is driven from the pad on the first VGA amplifier chip 8 to the front pad 11 of the multi-row matrix CSP lead frame wing gull type upturned inner lead; after the bonding wire, the expansion is selected The environmental protection plastic sealing material with coefficient α1≤1, water absorption rate≤0.30%, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 °C for 5 hours; if the bottom pin is not plated in the frame production Nickel-plated palladium or pure gold, electroplated blunt tin, blunt tin layer thickness 7.62 ~ 15.24μm, and baked at 175 ° C, 1 hour to prevent whisker growth; after laser marking, cutting separation, testing, tape A CSP type MEMS package based on a custom lead frame is prepared; if the bottom surface of the bottom pin is plated with nickel palladium gold or pure gold, no pure tin plating, direct laser marking, shear separation, testing, tape, Making a CSP type MEMS package based on a custom lead frame;
对于盖板在底部的封装件(图2所示的第二种实施例):For the package with the cover at the bottom (the second embodiment shown in Figure 2):
在粘片胶粘片机上,先在引线框架上翘内引脚的正面端面点上第一粘片胶2,然后将MEMS芯片1反向放置在已点第一粘片胶2的多排矩阵式CSP引线框架上翘内引脚的正面,全部MEMS芯片1粘完后,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺;在球焊机上,将烘烤后的半成品多排矩阵式CSP引线框架反向进料,从多排矩阵式CSP引线框架翼鸥型的上翘内引脚的背面焊盘15向MEMS芯片1上的焊盘反打低弧度第二键合线16;在胶膜片粘片机上,将已打第二键合线16的半装成品多排矩阵式CSP引线框架进料,在MEMS芯片1背面划上第二粘片胶9,设备自动吸取的第一VGA放大器芯片8,准确放置在已划胶的MEMS芯片1的背面,粘接完全部第一VGA放大器芯片8后,采用分段烘烤的防离层工艺烘烤;在球焊机上,将已粘接第一VGA放大器芯片8的半成品多排矩阵式CSP引线框架正向进料,从第一VGA放大器芯片8上的焊盘向多排矩阵式CSP引线框架翼鸥型的上翘内引脚的正面焊盘11高低弧度打第一 键合线线7;选用膨胀系数α1≤1、吸水率≤0.25%的环保型透明塑封料封装,使用全自动包封系统和下模腔透明塑封模具及MEMS芯片焊线后的CSP半成品引线框架,冲线率控制在5%、无空洞和离层,在150℃温度下后固化1小时;在粘片胶粘片机上,将已后固化的CSP半成品引线框架反向进料,先在第一凹槽4上点上快速固化胶,设备自动吸取MEMS盖板17,对准放置在已点胶的第一凹槽4上;然后用绝缘胶或绝缘胶膜片在MEMS芯片1的背面堆叠粘接宽频带、低噪声、低畸变、高增益精度的第一压控VGA放大器芯片8,在150℃~175℃温度下采用防离层工艺烘烤3小时,再进行第一VGA放大器芯片8与上翘引脚正面低弧度(弧高控制在120μm)焊线;焊线后,选用膨胀系数α1≤1、吸水率≤0.30%的环保型透明塑封料,使用全自动包封系统和上模腔塑封模具对第一VGA放大器芯片8焊线后的CSP半成品引线框架进行封装,冲线率控制在5%、无空洞和离层,在175℃温度下后固化4小时;若底面引脚的底面上已经电镀了镍钯金或纯金时,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上没有电镀镍钯金或纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;On the adhesive sheet bonding machine, the first adhesive sheet 2 is first placed on the front end surface of the lead pin on the lead frame, and then the MEMS chip 1 is reversely placed on the multi-row matrix of the first adhesive sheet 2 The front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes. The temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking The lead frame is reversely fed, and the second bonding wire 16 is reversed from the back pad 15 of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type to the pad on the MEMS chip 1; On the film sticking machine, the half-packed multi-row matrix CSP lead frame of the second bonding wire 16 is fed, and the second adhesive sheet 9 is marked on the back of the MEMS chip 1, and the first VGA automatically sucked by the device The amplifier chip 8 is accurately placed on the back side of the diced MEMS chip 1, and after bonding the entire first VGA amplifier chip 8 The stepwise baking of the anti-separation layer process is performed; on the ball welder, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip 8 has been bonded is forwardly fed, from the first VGA amplifier chip 8 The pad on the top row of the matrix CSP lead frame wing gull type upturned inner pin of the front pad 11 high and low arc hit first Bonding wire 7; environmentally-friendly transparent plastic sealing material package with expansion coefficient α1≤1, water absorption rate ≤0.25%, CSP semi-finished lead frame after fully automatic encapsulation system and lower cavity transparent plastic sealing mold and MEMS chip bonding wire The punching rate is controlled at 5%, no void and separation layer, and post-curing at 150 ° C for 1 hour; on the adhesive sheeting machine, the post-cured CSP semi-finished lead frame is reversely fed, first in the first A fast curing glue is placed on a groove 4, and the device automatically picks up the MEMS cover plate 17 and places it on the first groove 4 which has been dispensed; then, it is stacked on the back surface of the MEMS chip 1 with an insulating glue or an insulating film. The first voltage-controlled VGA amplifier chip 8 for bonding broadband, low noise, low distortion, and high gain precision is baked at a temperature of 150 ° C to 175 ° C for 3 hours using an anti-off layer process, and then the first VGA amplifier chip 8 is performed. The welding line with low curvature (arc height is controlled at 120μm) on the front side of the upturned pin; after the welding line, the environment-friendly transparent plastic sealing material with expansion coefficient α1 ≤1, water absorption rate ≤0.30% is used, and the automatic encapsulation system and the upper mold are used. Cavity plastic sealing mold for the first VGA amplifier chip 8 after bonding wire C SP semi-finished lead frame is packaged, the punching rate is controlled at 5%, no void and separation layer, and post-cured at 175 ° C for 4 hours; if the bottom surface of the bottom pin is plated with nickel palladium gold or pure gold, then No need to plate pure tin, direct laser marking, cutting and separating, testing, braiding, and making CSP type MEMS package based on custom lead frame; if the bottom surface of the bottom pin is not plated with nickel palladium gold or pure gold, then Pure tin is electroplated on the bottom surface of the bottom pin, and then laser marking, rib separation, testing, braiding, and manufacturing a CSP type MEMS package based on a custom lead frame;
对于盖板在顶部有腔体的封装件(图3所示的第三种实施例):For a package with a cover at the top of the cavity (the third embodiment shown in Figure 3):
先在两排相对设置的内引脚5的内引脚上表面6上平行设置MEMS隔墙24,两个MEMS隔墙24和内引脚5构成一个腔体,即使用塑封系统和MEMS腔体模具,用快速固化液态环氧塑封料,通过DOE优化制作MEMS腔体工艺参数,模温180℃,合模压力90kgf/cm2,注塑压力35Kg f/cm2,注塑时间3s,固化时间120s;然后,将带膜片的MEMS芯片粘贴在腔体内,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上的焊盘向位于腔体内的内引脚上表面6焊线,然后在两个MEMS隔墙24顶端粘接MEMS盖板,在150℃温度下烘烤0.5小时;接着在倒装粘片机上,将已粘接盖板的半成品引线框架采用反向进料方式,将带凸点的VGA放大器芯片倒扣在上翘引脚的背面,并回流焊;选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,冲线率控制在5%、无空洞和离层,在175℃温度下后固化4小时;若底面引脚的底面上已经电镀了镍钯金或纯金时,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上没有电镀镍钯金或纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;The MEMS partition wall 24 is first disposed in parallel on the inner surface 6 of the inner pins 5 of the two rows of oppositely disposed inner pins 5. The two MEMS partition walls 24 and the inner leads 5 form a cavity, that is, a plastic sealing system and a MEMS cavity are used. Mold, using fast curing liquid epoxy molding compound, DOE optimized MEMS cavity process parameters, mold temperature 180 ° C, clamping pressure 90kgf / cm 2 , injection pressure 35Kg f / cm 2 , injection time 3s, curing time 120s; Then, the MEMS chip with the membrane is pasted in the cavity and subjected to segment baking, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and the temperature is raised to 150 ° C for 5 minutes. Bake for 35 minutes, cool down for 10 minutes and drop the temperature to 70 °C. In the segment baking process, use the anti-separation layer process, wire the wire from the pad on the MEMS chip to the upper surface of the inner pin in the cavity, and then The MEMS cover plate is bonded to the top of the two MEMS partition walls 24 and baked at 150 ° C for 0.5 hours. Then, on the flip-chip bonding machine, the semi-finished lead frame of the bonded cover plate is reverse fed, and the tape is taken. The bumped VGA amplifier chip is flipped on the back of the upturned pin and reflowed It adopts environmentally friendly plastic packaging material with expansion coefficient α1≤1 and water absorption rate≤0.30%. The punching rate is controlled at 5%, no void and separation layer, and post-curing at 175°C for 4 hours; if the bottom surface is on the bottom surface When nickel-palladium gold or pure gold has been plated, it is not necessary to electroplating pure tin, direct laser marking, cutting and separating, testing, braiding, and making a CSP type MEMS package based on a custom lead frame; If there is no electroplated nickel, palladium or pure gold, pure tin is electroplated on the bottom surface of the bottom surface pin, and then laser marking, cutting and separating, testing and braiding are performed to obtain a CSP type MEMS package based on a custom lead frame;
对于MEMS芯片在上翘引脚的背面的封装件(图4所示的第四种实施例),引线框架反向进料,采用胶膜片粘片机,将带胶膜片的MEMS芯片粘贴在上翘引脚的底面,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上焊盘向上翘引脚的背面焊盘15低弧度焊线,选用膨胀系数α1≤1、吸水率≤0.25%的环保型透明塑封料封装,冲线率控制在5%、无空洞和离层,在150℃温度下后固化0.5小时;将MEMS盖板与第一凹槽4粘接,然后,在胶膜片粘片机上,将已粘MEMS盖板的半成品引线框架正面进料,将另一个带胶膜片的VGA放大器芯片粘贴在上翘引脚的正面,然后进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从另一个VGA放大器芯片上焊盘向上翘引脚的正面焊盘低弧度焊线,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,在175℃温度下后固化4小时;若底面引脚的底面上已经电镀了镍钯金或纯金时,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上没 有电镀镍钯金或纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;For the package of the MEMS chip on the back side of the upturned pin (the fourth embodiment shown in FIG. 4), the lead frame is reversely fed, and the MEMS chip with the adhesive film is pasted using a film-bonding machine. On the bottom surface of the upturned pin, perform segmental baking, that is, in an oven, heat up for 15 minutes, raise the temperature to 100 ° C for 25 minutes, then heat up for 5 minutes, raise the temperature to 150 ° C for 35 minutes, cool down 10 Minute the temperature to 70 ° C to take out; use the anti-separation process in the segment baking process, from the MEMS chip pad up the back of the pad on the back pad 15 low-radius bonding wire, select the expansion coefficient α1 ≤ 1, water absorption ≤0.25% environmentally-friendly transparent plastic sealing material package, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 ° C for 0.5 hours; bonding the MEMS cover to the first groove 4, and then On the adhesive film sticking machine, the front side of the semi-finished lead frame of the bonded MEMS cover is fed, and another VGA amplifier chip with the adhesive film is pasted on the front side of the upturned pin, and then subjected to segment baking, that is, In an oven, heat up for 15 minutes, raise the temperature to 100 ° C for 25 minutes, and then heat for 5 minutes. The temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° C to remove the temperature to 70 ° C; in the segment baking process using the anti-separation process, the pad on the other VGA amplifier chip up the top of the pad The low-radius welding wire is packaged in an environmentally-friendly molding compound with an expansion coefficient α1 ≤1 and a water absorption rate ≤0.30%, and is post-cured at 175 ° C for 4 hours; if the bottom surface of the bottom pin is plated with nickel-palladium gold or pure gold , instead of electroplating pure tin, direct laser marking, cutting and separating, testing, braiding, and making CSP type MEMS package based on custom lead frame; if the bottom surface of the bottom pin is not Electroplated nickel-palladium gold or pure gold, electroplating pure tin on the bottom surface of the bottom pin, then laser marking, cutting and separating, testing, braiding, and making a CSP-type MEMS package based on a custom lead frame;
对于图5所示的第五种实施例的封装件,在倒装粘片机上,引线框架反向进料,将第二VGA放大器芯片倒扣在上翘引脚的底面,即第二VGA放大器芯片21上的凸点与内引脚下表面3相连接,并进行第一次回流焊;接着,在倒装粘片机上,将已粘接第二VGA放大器芯片的半成品引线框架正面进料,将第三VGA放大器芯片倒扣在上翘引脚的正面,即第三VGA放大器芯片27上的凸点与内引脚上表面6相连接,并进行第二次回流焊;然后,在胶膜片粘片机上,将已粘接第三VGA放大器芯片的半成品引线框架正面进料,将带胶膜片的MEMS芯片1堆叠在第三VGA放大器芯片背面,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上焊盘向上翘引脚的正面的焊盘低弧度焊线;冲线率控制在5%、无空洞和离层,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,在175℃温度下后固化4小时;若底面引脚的底面上已经电镀了镍钯金或纯金时,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上没有电镀镍钯金或纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。For the package of the fifth embodiment shown in FIG. 5, on the flip-chip bonding machine, the lead frame is reversely fed, and the second VGA amplifier chip is reversed on the bottom surface of the upturned pin, that is, the second VGA amplifier. The bump on the chip 21 is connected to the lower surface 3 of the inner lead and is subjected to the first reflow soldering; then, on the flip chip bonding machine, the front side of the semi-finished lead frame to which the second VGA amplifier chip is bonded is fed. The third VGA amplifier chip is reversed on the front side of the upturned pin, that is, the bump on the third VGA amplifier chip 27 is connected to the upper surface 6 of the inner lead, and the second reflow is performed; then, in the film On the sheet bonding machine, the front side of the semi-finished lead frame to which the third VGA amplifier chip is bonded is fed, and the MEMS chip 1 with the adhesive film is stacked on the back side of the third VGA amplifier chip for segment baking, that is, in an oven. After raising the temperature for 15 minutes, the temperature was raised to 100 ° C for 25 minutes, and then the temperature was raised for 5 minutes. The temperature was raised to 150 ° C for 35 minutes, and the temperature was lowered to 70 ° C for 10 minutes; the anti-separation was used during the segmentation baking process. Layer process, positively tilting the pins from the pads on the MEMS chip Low arc welding wire of the pad; the punching rate is controlled at 5%, no void and separation layer, and the environment is packaged with an environmentally-friendly molding compound with expansion coefficient α1≤1 and water absorption rate≤0.30%, and post-cured at 175 °C for 4 hours; If the bottom surface of the bottom surface pin has been plated with nickel-palladium gold or pure gold, then the pure tin is not plated, the laser marking, the rib separation, the test, and the braiding are performed, and the CSP type MEMS package based on the custom lead frame is obtained. If there is no nickel-palladium gold or pure gold on the bottom surface of the bottom pin, pure tin is plated on the bottom surface of the bottom pin, then laser marking, cutting and separating, testing, braiding, and making a custom lead frame based on CSP type MEMS package.
本封装件中一般包含1个MEMS芯片和1个宽频带、低噪声、低畸变、高增益精度的压控VGA放大器芯片。其中,MEMS芯片采用绝缘胶反粘在上翘内引脚的正面,从MEMS芯片的焊盘向翼鸥型的上翘内引脚的背面反打低弧度线,VGA放大器芯片用绝缘胶或绝缘胶膜片粘接在MEMS芯片的背面,并从VGA放大器芯片上焊盘向翼鸥型的上翘内引脚的正面地盘高低弧焊线。The package generally includes a MEMS chip and a wide-band, low-noise, low-distortion, high-gain precision voltage-controlled VGA amplifier chip. The MEMS chip is back-bonded to the front side of the upturned pin by an insulating glue, and the low-radius line is reversed from the pad of the MEMS chip to the back of the winged gull-shaped inner pin, and the VGA amplifier chip is insulated or insulated. The film is bonded to the back side of the MEMS chip, and the high-low arc welding line is formed from the pad on the VGA amplifier chip to the front surface of the wing-gull type upturned inner pin.
实施例1Example 1
根据客户需要,设计出不同结构和规格的多排矩阵式CSP引线框架图纸,制作8排矩阵式无载体翼鸥型内引脚的CSP定制引线框架,内引脚的正面和背面除电镀铜外,还要镀银;采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至150μm,不带凸点的晶圆减薄至130μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;在粘片胶粘片机上,先在引线框架上翘内引脚的正面端面点上第一粘片胶,然后将MEMS芯片反向放置在已点第一粘片胶的多排矩阵式CSP引线框架上翘内引脚的正面,全部MEMS芯片粘完后,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,在球焊机上,将烘烤后的半成品多排矩阵式CSP引线框架反向进料,从多排矩阵式CSP引线框架翼鸥型的上翘内引脚的背面焊盘向MEMS芯片上的焊盘反打低弧度第二键合线;在胶膜片粘片机上,将已打第二键合线的半装成品多排矩阵式CSP引线框架进料,在MEMS芯片背面划上第二粘片胶,设备自动吸取的第一VGA放大器芯片,准确放置在已划胶的MEMS芯片的背面,粘接完全部第一VGA放大器芯片后,采用同上的分段烘烤,分段烘烤过程中采用防离层工艺;在球焊机上,将已粘接第一VGA放大器芯片8的半成品多排矩阵式CSP引线框架正向进料,从第一VGA放大器芯片8上的焊盘向多排矩阵式CSP引线框架翼鸥型的上翘内引脚的正面焊盘11高低弧度打第一键合线线7;焊线以后,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料塑封,冲线率控制在5%,无空洞和离层,在150℃温度下后固化5小时;底部引脚电镀钝锡,钝锡层厚度7.62~15.24μm,并在175℃下,烘烤1小时预防锡须生长;之后激光打标、切筋 分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。According to customer needs, design multi-row matrix CSP lead frame drawings with different structures and specifications, and make 8 rows of matrix-type carrierless wing-gull inner lead CSP custom lead frame. The front and back of the inner lead are except for electroplated copper. It is also silver plated; the wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 150 μm, and the wafer without bumps is thinned to 130 μm; The rough grinding speed is 6μm/s, the finishing speed is 0.15μm/s, and the polishing speed is 0.05μm/s. At the same time, the anti-warping process is adopted: the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ≤10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; on the adhesive sheeting machine, the lead frame is first tilted. The first adhesive sheet is placed on the front end of the inner lead, and then the MEMS chip is placed in the opposite direction on the front side of the multi-row matrix CSP lead frame of the first adhesive sheet, and all the MEMS chips are stuck. After that, the section baking is carried out, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes. After 25 minutes, the temperature is raised for another 5 minutes, the temperature is raised to 150 ° C for 35 minutes, and the temperature is lowered to 70 ° C for 10 minutes. The anti-separation process is used in the step-by-step baking process. After the semi-finished multi-row matrix CSP lead frame is reverse fed, the back pad of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type is reversed to the lower arc of the MEMS chip. In the film-bonding machine, the semi-finished multi-row matrix CSP lead frame with the second bonding wire is fed, and the second adhesive sheet is drawn on the back of the MEMS chip, and the device automatically picks up the first A VGA amplifier chip is accurately placed on the back side of the diced MEMS chip, and after bonding the first VGA amplifier chip, the same segmented baking is used, and the anti-separation layer process is adopted in the segment baking process; On the welder, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip 8 has been bonded is fed forward, from the pad on the first VGA amplifier chip 8 to the multi-row matrix CSP lead frame wing gull type The top pad of the upturned inner pin 11 is high and low arc to hit the first bond wire 7; After the welding line, the plastic sealing material with expansion coefficient α1≤1, water absorption rate≤0.30% is selected, the punching rate is controlled at 5%, no void and separation layer, and post-curing at 150 °C for 5 hours; bottom introduction The foot is plated with blunt tin, the thickness of the blunt tin layer is 7.62~15.24μm, and it is baked at 175 °C for 1 hour to prevent the growth of tin whiskers; then laser marking and cutting Separating, testing, braiding, and making CSP-type MEMS packages based on custom lead frames.
实施例2Example 2
根据芯片和客户需要,设计出不同结构和规格的多排矩阵式CSP引线框架图纸,制作16排矩阵式无载体翼鸥型内引脚的CSP定制引线框架,内引脚的正面和背面除电镀铜外,还要镀镍钯金焊盘;采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至200μm,不带凸点的晶圆减薄至155μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;在粘片胶粘片机上,先在引线框架上翘内引脚的正面端面点上第一粘片胶,然后将MEMS芯片反向放置在已点第一粘片胶的多排矩阵式CSP引线框架上翘内引脚的正面,全部MEMS芯片粘完后,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺;在球焊机上,将烘烤后的半成品多排矩阵式CSP引线框架反向进料,从多排矩阵式CSP引线框架翼鸥型的上翘内引脚的背面焊盘向MEMS芯片上的焊盘反打低弧度第二键合线;在胶膜片粘片机上,将已打第二键合线的半装成品多排矩阵式CSP引线框架进料,在MEMS芯片背面划上第二粘片胶,设备自动吸取的第一VGA放大器芯片,准确放置在已划胶的MEMS芯片的背面,粘接完全部第一VGA放大器芯片后,采用同上的分段烘烤,在分段烘烤过程中采用防离层工艺;在球焊机上,将已粘接第一VGA放大器芯片的半成品多排矩阵式CSP引线框架正向进料,从第一VGA放大器芯片上的焊盘向多排矩阵式CSP引线框架翼鸥型的上翘内引脚的正面焊盘高低弧度打第一键合线线;选用膨胀系数α1≤1、吸水率≤0.25%的环保型透明塑封料封装,使用全自动包封系统和下模腔透明塑封模具及MEMS芯片焊线后的CSP半成品引线框架,冲线率控制在5%、无空洞和离层,在150℃温度下后固化1小时;在粘片胶粘片机上,将已后固化的CSP半成品引线框架反向进料,先在第一凹槽上点上快速固化胶,设备自动吸取MEMS盖板,对准放置在已点胶的第一凹槽上;然后用绝缘胶或绝缘胶膜片在MEMS芯片的背面堆叠粘接宽频带、低噪声、低畸变、高增益精度的第一压控VGA放大器芯片,在150℃~175℃温度下采用防离层工艺烘烤3小时,再进行第一VGA放大器芯片与上翘引脚正面低弧度(弧高控制在120μm)焊线;焊线后,选用膨胀系数α1≤1、吸水率≤0.30%的环保型透明塑封料,使用全自动包封系统和上模腔塑封模具对第一VGA放大器芯片焊线后的CSP半成品引线框架进行封装,冲线率控制在5%、无空洞和离层,在175℃温度下后固化4小时;激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。According to the needs of the chip and the customer, design multi-row matrix CSP lead frame drawings with different structures and specifications, and make 16-row matrix carrierless wing-gull inner lead CSP custom lead frame, front and back of the inner lead except plating In addition to copper, nickel-plated palladium-plated pads are also required; wafers are thinned by a 8 吋 to 12 减 thinner, bumped wafers are thinned to 200 μm, and wafers without bumps are thinned to 155μm; rough grinding speed 6μm/s during the thinning process, refining speed 0.15μm/s, polishing speed 0.05μm/s; at the same time adopting anti-warping process: then, using A-WD-300TXB dicing machine to thin The wafer is diced, and the dicing process is performed by a double-knife process for preventing chipping. The dicing feed speed is ≤10 mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; On the machine, first place the first adhesive on the front end of the lead on the lead frame, and then place the MEMS chip in the opposite direction on the multi-row matrix CSP lead frame of the first adhesive. On the front side, after all the MEMS chips are glued, they are subjected to segment baking, that is, in the oven, the temperature rises 15 In the minute, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes. The temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; On the ball welder, the baked semi-finished multi-row matrix CSP lead frame is reverse fed, from the back pad of the multi-row matrix CSP lead frame wing gull type upturned inner pin to the MEMS chip The pad is reversed to the second arc of the lower arc; on the film sticking machine, the semi-assembled multi-row matrix CSP lead frame of the second bonding wire is fed, and the second side of the MEMS chip is marked. Adhesive glue, the first VGA amplifier chip automatically picked up by the device, accurately placed on the back side of the MEMS chip that has been glued, after bonding the first VGA amplifier chip, using the same segmental baking, in the segment baking The anti-separation layer process is adopted in the process; on the ball welder, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip is bonded is forwardly fed, from the pad on the first VGA amplifier chip to the multi-row Matrix CSP lead frame wing gull type upturned inner lead front pad The first bonding wire is used in low arc; the environmentally-friendly transparent plastic sealing material package with expansion coefficient α1≤1 and water absorption rate≤0.25% is used, and the automatic encapsulation system and the lower cavity transparent plastic sealing mold and the MEMS chip bonding wire are used. CSP semi-finished lead frame, the punching rate is controlled at 5%, no void and separation layer, and post-curing at 150 ° C for 1 hour; on the adhesive sheeting machine, the post-cured CSP semi-finished lead frame is reversely fed First, the fast curing glue is spotted on the first groove, and the device automatically picks up the MEMS cover plate and places it on the first groove of the glue; then stacks the back surface of the MEMS chip with an insulating glue or an insulating film. Bonding a wide-band, low-noise, low-distortion, high-gain precision first voltage-controlled VGA amplifier chip, baked at a temperature of 150 ° C ~ 175 ° C using a separation layer process for 3 hours, and then the first VGA amplifier chip and The arc of the front side of the tilting pin is low arc (the arc height is controlled at 120μm); after the wire is welded, the environmentally-friendly transparent plastic sealing material with the expansion coefficient α1≤1 and the water absorption rate ≤0.30% is used, and the automatic encapsulation system and the upper cavity cavity plastic seal are used. Mold to the first VGA amplifier chip After-line CSP semi-finished lead frame is packaged, the punching rate is controlled at 5%, no void and separation layer, and post-cured at 175 °C for 4 hours; laser marking, cutting separation, testing, braiding, based on Customized lead frame CSP type MEMS package.
实施例3Example 3
根据芯片和客户需要,设计出不同结构和规格的多排矩阵式CSP引线框架图纸,制作12排矩阵式无载体翼鸥型内引脚的CSP定制引线框架,内引脚的正面和背面除电镀铜外,还要电镀倒装封装需要的UBM金属层;采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至175μm,不带凸点的晶圆减薄至180μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;先在两排相对设置的内引脚的内引脚上表面上平行设置MEMS隔墙,两个MEMS隔墙和内引脚构成一个腔体,即使用塑封系统和MEMS腔体模具,用快速固化液态环氧塑封料,通过DOE优化制作MEMS腔体工艺参数,模温180℃,合模压力90kgf/cm2,注塑压力35Kg f/cm2,注塑时间3s,固化时间120s;然后,将带膜片的MEMS芯片粘贴在腔体内,进行分段烘烤,即在烘 箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上的焊盘向位于腔体内的内引脚上表面焊线,然后在两个MEMS隔墙顶端粘接MEMS盖板,在150℃温度下烘烤0.5小时;接着在倒装粘片机上,将已粘接盖板的半成品引线框架采用反向进料方式,将带凸点的VGA放大器芯片倒扣在上翘引脚的背面,并回流焊;选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,冲线率控制在5%、无空洞和离层,在175℃温度下后固化4小时;底面引脚的底面上没有电镀镍钯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。According to the needs of the chip and the customer, design multi-row matrix CSP lead frame drawings with different structures and specifications, and make 12-row matrix carrierless wing-gull type internal lead CSP custom lead frame, front and back of the inner lead except plating In addition to copper, the UBM metal layer required for flip-chip packaging is also required; the wafer is thinned by a 8 吋 to 12 减 thinner, and the bumped wafer is thinned to 175 μm, without bumps. Thinning to 180μm; rough grinding speed of 6μm/s during the thinning process, refining speed of 0.15μm/s, polishing speed of 0.05μm/s; and anti-warping process: then, using A-WD-300TXB dicing machine The diced wafer is diced, and the dicing process is performed by a double-knife process for preventing sharding. The dicing feed speed is ≤10 mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; MEMS partition walls are arranged in parallel on the upper surface of the inner pins of the oppositely disposed inner pins, and the two MEMS partition walls and inner leads form a cavity, that is, using a plastic sealing system and a MEMS cavity mold, using a fast curing liquid epoxy Molding material, MEMS cavity process parameters are optimized by DOE, mold temperature 1 80°C, clamping pressure 90kgf/cm 2 , injection pressure 35Kg f/cm 2 , injection time 3s, curing time 120s; then, the MEMS chip with diaphragm is stuck in the cavity for segment baking, ie in the oven In the temperature rise for 15 minutes, the temperature is raised to 100 ° C for 25 minutes, and then the temperature is raised for 5 minutes, the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered for 10 minutes, the temperature is lowered to 70 ° C to take out; The separation process, from the pad on the MEMS chip to the inner surface of the inner lead in the cavity, and then bonding the MEMS cover on the top of the two MEMS partitions, baking at 150 ° C for 0.5 hours; On the flip-chip bonding machine, the semi-finished lead frame of the bonded cover plate is reversely fed, and the bumped VGA amplifier chip is buckled on the back side of the upturned pin and reflowed; the expansion coefficient α1≤ is selected. 1. The environmental protection plastic packaging material with water absorption rate ≤0.30%, the punching rate is controlled at 5%, no void and separation layer, and post-curing at 175 °C for 4 hours; if there is no electroplated nickel-palladium on the bottom surface of the bottom pin, Plating pure tin on the bottom surface of the bottom pin, then laser marking and cutting Separating, testing, taping, obtained based on customized leadframe CSP type MEMS package.
实施例4Example 4
根据芯片和客户需要,设计出不同结构和规格的多排矩阵式CSP引线框架图纸,制作10排矩阵式无载体翼鸥型内引脚的CSP定制引线框架,内引脚的正面和背面除电镀铜外,还要电镀倒装封装需要的UBM金属层;采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至160μm,不带凸点的晶圆减薄至140μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;引线框架反向进料,采用胶膜片粘片机,将带胶膜片的MEMS芯片粘贴在上翘引脚的底面,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上焊盘向上翘引脚的背面焊盘低弧度焊线,选用膨胀系数α1≤1、吸水率≤0.25%的环保型透明塑封料封装,冲线率控制在5%、无空洞和离层,在150℃温度下后固化0.5小时;将MEMS盖板与第一凹槽粘接,然后,在胶膜片粘片机上,将已粘MEMS盖板的半成品引线框架正面进料,将另一个带胶膜片的VGA放大器芯片粘贴在上翘引脚的正面,然后进行同上的分段烘烤,分段烘烤过程中采用防离层工艺,从另一个VGA放大器芯片上焊盘向上翘引脚的正面焊盘低弧度焊线,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,在175℃温度下后固化4小时;底面引脚的底面上没有电镀纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。According to the chip and customer needs, design multi-row matrix CSP lead frame drawings with different structures and specifications, make 10 rows of matrix carrierless wing gull type internal lead CSP custom lead frame, front and back of the inner lead except plating In addition to copper, the UBM metal layer required for flip-chip packaging is also required; the wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 160 μm, and the bumpless wafer Thinning to 140μm; rough grinding speed of 6μm/s during thinning, fine grinding speed of 0.15μm/s, polishing speed of 0.05μm/s; simultaneous anti-warping process: then, using A-WD-300TXB dicing machine The diced wafer is diced, and the dicing process is performed by a double-knife process for preventing sharding. The dicing feed speed is ≤10 mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating; the lead frame is reversed. To feed, the MEMS chip with the adhesive film is pasted on the bottom surface of the upturned pin by means of a rubber film sticking machine, and is subjected to segment baking, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes. Bake for 25 minutes, heat for another 5 minutes, raise the temperature to 150 ° C for 35 minutes, cool down 10 Minutes the temperature to 70 ° C to take out; in the segment baking process using the anti-separation layer process, from the MEMS chip pad up the back of the pad on the back pad low arc welding wire, the choice of expansion coefficient α1 ≤ 1, water absorption rate ≤ 0.25% environmentally-friendly transparent plastic sealing material package, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 °C for 0.5 hour; the MEMS cover is bonded to the first groove, then, in the glue On the film sticking machine, the front side of the semi-finished lead frame of the bonded MEMS cover is fed, and another VGA amplifier chip with the adhesive film is pasted on the front side of the upturned pin, and then the same segment baking is performed. In the segment baking process, the anti-separation layer process is adopted, and the low-radiation bonding wire of the front pad of the upturned pin from the pad on the other VGA amplifier chip is packaged in an environmentally-friendly plastic package with an expansion coefficient α1≤1 and a water absorption rate≤0.30%. After curing at 175 ° C for 4 hours; the bottom surface of the bottom pin is not plated with pure gold, then pure tin is plated on the bottom surface of the bottom pin, then laser marking, cutting and separating, testing, braiding, and CSP type MEMS package based on custom lead frame .
实施例5Example 5
根据芯片和客户需要,设计出不同结构和规格的多排矩阵式CSP引线框架图纸,制作14排矩阵式无载体翼鸥型内引脚的CSP定制引线框架,内引脚的正面和背面除电镀铜外,还要电镀倒装封装需要的UBM金属层;采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至180μm,不带凸点的晶圆减薄至170μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;在倒装粘片机上,引线框架反向进料,将第二VGA放大器芯片倒扣在上翘引脚的底面,即第二VGA放大器芯片上的凸点与内引脚下表面相连接,并进行第一次回流焊;接着,在倒装粘片机上,将已粘接第二VGA放大器芯片的半成品引线框架正面进料,将第三VGA放大器芯片倒扣在上翘引脚的正面,即第三VGA放大器芯片上的凸点与内引脚上表面相连接,并进行第二次回流焊;然后,在胶膜片粘片机上,将已粘接第三VGA放大器芯片的半成品引线框架正面进料,将带胶膜片的MEMS芯片堆叠在第三VGA放大器芯片背面,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟, 降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上焊盘向上翘引脚的正面的焊盘低弧度焊线;冲线率控制在5%、无空洞和离层,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,在175℃温度下后固化4小时;底面引脚的底面上没有电镀镍钯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。According to the needs of the chip and the customer, design multi-row matrix CSP lead frame drawings with different structures and specifications, and make 14 rows of matrix-type carrierless wing-gull inner lead CSP custom lead frame, front and back of the inner lead except plating In addition to copper, the UBM metal layer required for flip-chip packaging is also required; the wafer is thinned by a 8 吋 to 12 减 thinner, and the bumped wafer is thinned to 180 μm, without bumps. Thinning to 170μm; rough grinding speed of 6μm/s during the thinning process, refining speed of 0.15μm/s, polishing speed of 0.05μm/s; and anti-warping process: then, using A-WD-300TXB dicing machine Dividing the thinned wafer, using the anti-fragment double-knife process dicing during the dicing process, the dicing feed speed is ≤10mm/s, cutting and separating to form the required MEMS IC chip and VGA amplifier chip; On the bonding machine, the lead frame is reversely fed, and the second VGA amplifier chip is reversed on the bottom surface of the upturned pin, that is, the bump on the second VGA amplifier chip is connected to the lower surface of the inner pin, and is first Secondary reflow soldering; then, on the flip-chip bonding machine, the second VGA will be bonded The semi-finished lead frame of the large chip is fed in front, and the third VGA amplifier chip is reversed on the front side of the upturned pin, that is, the bump on the third VGA amplifier chip is connected to the upper surface of the inner pin, and the second is performed. Sub-reflow soldering; then, on the film-bonding machine, the front side of the semi-finished lead frame to which the third VGA amplifier chip is bonded is fed, and the MEMS chip with the adhesive film is stacked on the back side of the third VGA amplifier chip for division Segment baking, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes, and the temperature is raised to 150 ° C for 35 minutes. After cooling for 10 minutes, the temperature is lowered to 70 ° C. The anti-separation process is used in the segment baking process, and the pad on the front surface of the MEMS chip is tilted up to the lower arc of the lead wire; the punch rate is controlled at 5%. No voids and separation layer, packaged with environmentally friendly plastic sealing material with expansion coefficient α1≤1, water absorption rate≤0.30%, post-curing at 175°C for 4 hours; no nickel-palladium plating on the bottom surface of the bottom surface pin, bottom surface Pure tin is electroplated on the bottom surface of the pin, and then laser marking, rib separation, testing, and tape-making are performed to produce a CSP type MEMS package based on a custom lead frame.
虽然结合优选实例已经示出并描述了本发明,本领域技术人员可以理解,在不违背所附权利要求限定的本发明的精神和范围的前提下,可以进行修改和变换。 While the invention has been shown and described with reference to the preferred embodiments embodiments

Claims (9)

  1. 一种基于定制引线框架的CSP型MEMS封装件,其特征在于,包括引线框架,引线框架中的内引脚(5)与底面引脚(12)相连,内引脚上表面(6)倒装有带凸点的MEMS芯片(1),MEMS芯片(1)上的凸点通过第二键合线(16)与内引脚的背面焊盘(15)相连;MEMS芯片(1)上面粘贴有第一VGA放大器芯片(8),第一VGA放大器芯片(8)通过第一键合线(7)与内引脚上表面(6)相连;沿垂直于两排底面引脚(12)连线的方向、底面引脚(12)远离内引脚上表面(6)一端的两侧平行设置有第一凹槽(4)和第二凹槽(13),底面引脚(12)的底面上设有底面引脚金属层(14);引线框架上塑封有第一塑封体(10),所有器件均塑封于第一塑封体(10)内,只有底面引脚金属层(14)露出第一塑封体(10)外。A CSP type MEMS package based on a custom lead frame, characterized in that it comprises a lead frame, the inner pin (5) in the lead frame is connected to the bottom surface pin (12), and the inner pin upper surface (6) is flipped There is a bumped MEMS chip (1), and the bump on the MEMS chip (1) is connected to the back pad (15) of the inner lead through the second bonding wire (16); the MEMS chip (1) is pasted thereon a first VGA amplifier chip (8), the first VGA amplifier chip (8) is connected to the upper surface (6) of the inner pin through the first bonding wire (7); and is connected to the pin (12) perpendicular to the bottom surface of the two rows The first groove (4) and the second groove (13) are disposed in parallel with the direction of the bottom surface pin (12) away from the inner surface of the upper surface (6) of the inner pin, and the bottom surface of the bottom pin (12) The bottom lead metal layer (14) is provided; the lead frame is molded with a first molding body (10), and all the devices are molded in the first molding body (10), and only the bottom surface pin metal layer (14) is exposed first. Outside the plastic body (10).
  2. 根据权利要求1所述的基于定制引线框架的CSP型MEMS封装件,其特征在于,所述的两排底面引脚(12)之间设有MEMS盖板(17),MEMS盖板(17)的一侧与一排底面引脚(12)上的第一凹槽(4)固接,MEMS盖板(17)上设有MEMS盖板开孔(19);MEMS盖板(17)、内引脚(5)和MEMS芯片(1)围成的腔体内塑封有第二塑封体(18)。The custom lead frame-based CSP type MEMS package according to claim 1, wherein a MEMS cover plate (17) and a MEMS cover plate (17) are disposed between the two rows of bottom surface pins (12). One side is fixed to the first recess (4) on a row of bottom surface pins (12), and the MEMS cover (17) is provided with a MEMS cover opening (19); the MEMS cover (17), the inner A second plastic body (18) is molded in the cavity surrounded by the pin (5) and the MEMS chip (1).
  3. 一种基于定制引线框架的CSP型MEMS封装件,其特征在于,包括引线框架,该引线框架中的内引脚(5)与底面引脚(12)相连,内引脚上表面(6)粘贴有MEMS芯片(1),MEMS芯片(1)通过第一键合线(7)与内引脚上表面(6)相连,内引脚上表面(6)设有MEMS隔墙(24),两排MEMS隔墙(24)顶端通过MEMS盖板(17)相连接,MEMS盖板(17)上设有MEMS盖板开孔(19),MEMS隔墙(24)、MEMS盖板(17)、内引脚上表面(6)和MEMS芯片(1)围成一个腔体,该腔体内塑封有第二塑封体(18),第一键合线(7)位于第二塑封体(18)内;内引脚下表面(3)通过第一UBM(23)与第二VGA放大器芯片(21)粘接,第一UBM(23)与第二VGA放大器芯片(21)上的芯片凸点(22)相粘接;沿垂直于两排底面引脚(12)连线的方向、底面引脚(12)远离内引脚上表面(6)一端的两侧平行设置有第一凹槽(4)和第二凹槽(13),底面引脚(12)的底面上设有底面引脚金属层(14);引线框架上塑封有第一塑封体(10),除腔体、MEMS盖板17)和底面引脚金属层(14)外,其余所有的器件均塑封于第一塑封体(10)内。A CSP type MEMS package based on a custom lead frame, comprising a lead frame, wherein an inner pin (5) in the lead frame is connected to a bottom surface pin (12), and an inner pin upper surface (6) is pasted There is a MEMS chip (1), the MEMS chip (1) is connected to the upper surface (6) of the inner pin through the first bonding wire (7), and the MEMS partition wall (24) is provided on the upper surface (6) of the inner pin, two The top of the MEMS partition wall (24) is connected by a MEMS cover plate (17), and the MEMS cover plate (17) is provided with a MEMS cover opening (19), a MEMS partition wall (24), a MEMS cover plate (17), The inner pin upper surface (6) and the MEMS chip (1) enclose a cavity in which a second molding body (18) is molded, and the first bonding wire (7) is located in the second molding body (18). The inner pin lower surface (3) is bonded to the second VGA amplifier chip (21) through the first UBM (23), and the chip bumps on the first UBM (23) and the second VGA amplifier chip (21) (22) The phase is bonded; the first groove (4) is disposed in parallel with the direction perpendicular to the line connecting the bottom row pins (12) of the two rows, and the bottom surface pin (12) is parallel to the sides of the upper surface (6) of the inner lead. And a second recess (13), the bottom surface of the bottom surface pin (12) is provided with a bottom pin metal layer (14); on the lead frame The first molding body (10) is molded, except for the cavity, the MEMS cover plate 17) and the bottom pin metal layer (14), and all the other devices are molded in the first molding body (10).
  4. 一种基于定制引线框架的CSP型MEMS封装件,其特征在于,包括引线框架,该引线框架中的内引脚(5)与底面引脚(12)相连,MEMS芯片(1)粘贴于内引脚下表面(3)上,MEMS芯片(1)通过第二键合线(16)与内引脚下表面(3)相连;内引脚上表面(6)上粘贴有第一VGA放大器芯片(8),第一VGA放大器芯片(8)通过第一键合线(7)与内引脚上表面(6)相连;沿垂直于两排底面引脚(12)连线的方向、底面引脚(12)远离内引脚上表面(6)一端的两侧平行设置有第一凹槽(4)和第二凹槽(13),底面引脚(12)的底面上设有底面引脚金属层(14);引线框架上塑封有第一塑封体(10),除腔体、MEMS盖板17)和底面引脚金属层(14)外,其余所有的器件均塑封于第一塑封体(10)内;两排底面引脚(12)之间设有MEMS盖板(17),MEMS盖板(17)的一侧与一排底面引脚(12)上的第一凹槽(4)固接,MEMS盖板(17)上设有MEMS盖板开孔(19);MEMS盖板(17)、内引脚(5)和MEMS芯片(1)围成的腔体内塑封有第二塑封体(18)。A CSP type MEMS package based on a custom lead frame, characterized in that it comprises a lead frame, the inner pin (5) in the lead frame is connected to the bottom surface pin (12), and the MEMS chip (1) is attached to the inner lead On the lower surface (3), the MEMS chip (1) is connected to the lower surface (3) of the inner pin through the second bonding wire (16); the first VGA amplifier chip is pasted on the upper surface (6) of the inner pin ( 8), the first VGA amplifier chip (8) is connected to the upper surface (6) of the inner pin through the first bonding wire (7); the direction and the bottom surface pin are perpendicular to the line connecting the pins (12) of the bottom row of the two rows (12) A first groove (4) and a second groove (13) are disposed in parallel on both sides of one end of the upper surface (6) of the inner lead, and the bottom surface of the bottom pin (12) is provided with a bottom metal a layer (14); the lead frame is molded with a first molding body (10), except for the cavity, the MEMS cover plate 17) and the bottom pin metal layer (14), all the other devices are molded on the first molding body ( 10) inside; two rows of bottom surface pins (12) are provided with a MEMS cover plate (17), one side of the MEMS cover plate (17) and a row of bottom surface pins (12) on the first groove (4) Fixed, MEMS cover (17) is provided with MEMS cover opening (19); MEMS cover (17) The pin (5) and the MEMS chip (1) a cavity surrounded by the second plastic molding material (18).
  5. 一种基于定制引线框架的CSP型MEMS封装件,其特征在于,包括引线框架,该引线框架采用多排矩阵式CSP镍钯金电镀框架,其中的内引脚(5)向上翘起形成鸥翼型,内引脚上表面(6)上倒装有第三VGA放大器芯片(27),第三VGA放大器芯片(27)上表面粘接有MEMS芯片(1),MEMS芯片(1)通过第一键合线(7)与内引脚上表面(6)相连;内引脚下表面(3)上倒装有第二VGA放大器芯片(21);沿垂直于两排底面引脚(12)连线的方向、底面引脚(12)远离内引脚上表面(6)一端的两侧平行设置有第一凹槽(4)和第二凹槽(13),底面引脚(12)的底面上设有底面引脚金属层(14);引线框架上塑封有 第一塑封体(10),底面引脚金属层(14)露出第一塑封体(10),其余所有器件均位于第一塑封体(10)内。A CSP type MEMS package based on a custom lead frame, characterized in that it comprises a lead frame using a plurality of rows of matrix CSP nickel-palladium gold electroplated frames, wherein the inner leads (5) are tilted upward to form a gull wing The third VGA amplifier chip (27) is mounted on the upper surface (6) of the inner pin, and the MEMS chip (1) is bonded to the upper surface of the third VGA amplifier chip (27), and the MEMS chip (1) passes the first The bonding wire (7) is connected to the upper surface (6) of the inner pin; the second VGA amplifier chip (21) is mounted on the lower surface (3) of the inner pin; and the pin (12) is perpendicular to the bottom of the two rows. The direction of the line and the bottom surface pin (12) are disposed away from the two sides of the upper surface of the inner lead (6) in parallel with the first recess (4) and the second recess (13), and the bottom surface of the bottom pin (12) There is a bottom pin metal layer (14); the lead frame is molded with The first molding body (10), the bottom pin metal layer (14) exposes the first molding body (10), and all other components are located in the first molding body (10).
  6. 一种权利要求1所述的基于定制引线框架的CSP型MEMS封装件的生产方法,其特征在于,具体按以下步骤进行:A method for manufacturing a custom lead frame-based CSP type MEMS package according to claim 1, wherein the method is specifically as follows:
    步骤1:制作多排矩阵式无载体翼鸥型内引脚的CSP引线框架,内引脚的正面和背面除电镀铜外,还要镀银或镀镍钯金焊盘、或者根据电镀倒装封装需要电镀UBM金属层;Step 1: Make a multi-row matrix carrierless wing gull-type internal CSP lead frame with the front and back sides of the inner leads in addition to electroplated copper, silver or nickel-plated palladium-plated pads, or flip-chip according to plating The package needs to be plated with a UBM metal layer;
    采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至150~200μm,不带凸点的晶圆减薄至130~180μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;The wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 150-200 μm, and the wafer without bumps is thinned to 130-180 μm; the thinning process is thick The grinding speed is 6μm/s, the finishing speed is 0.15μm/s, and the polishing speed is 0.05μm/s. At the same time, the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ≤10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
    步骤2:在粘片胶粘片机上,先在引线框架上翘内引脚的正面端面点上第一粘片胶,然后将MEMS芯片反向放置在已点第一粘片胶的多排矩阵式CSP引线框架上翘内引脚的正面,全部MEMS芯片1粘完后,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺;在球焊机上,将烘烤后的半成品多排矩阵式CSP引线框架反向进料,从多排矩阵式CSP引线框架翼鸥型的上翘内引脚的背面焊盘向MEMS芯片上的焊盘反打低弧度第二键合线;在胶膜片粘片机上,将已打第二键合线的半装成品多排矩阵式CSP引线框架进料,在MEMS芯片背面划上第二粘片胶,设备自动吸取的第一VGA放大器芯片,准确放置在已划胶的MEMS芯片的背面,粘接完全部第一VGA放大器芯片后,采用同上的分段烘烤,分段烘烤过程中采用防离层工艺;在球焊机上,将已粘接第一VGA放大器芯片的半成品多排矩阵式CSP引线框架正向进料,从第一VGA放大器芯片上的焊盘向多排矩阵式CSP引线框架翼鸥型的上翘内引脚的正面焊盘高低弧度打第一键合线线;焊线以后,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料塑封,冲线率控制在5%,无空洞和离层,在150℃温度下后固化5小时;若底部引脚在框架生产中未电镀镀镍钯金或纯金,则电镀钝锡,钝锡层厚度7.62~15.24μm,并在175℃下,烘烤1小时预防锡须生长;之后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上已电镀镍钯金或纯金,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。Step 2: On the adhesive sheet bonding machine, first place the first adhesive sheet on the front end surface of the lead pin on the lead frame, and then place the MEMS chip in reverse on the multi-row matrix of the first adhesive sheet. The front side of the inner lead of the CSP lead frame is lifted, and all the MEMS chip 1 is baked, and then baked in a section, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and then heated for 5 minutes. The temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 ° minutes to remove the temperature to 70 ° C; the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP after baking The lead frame is reversely fed, and the back pad of the upturned inner pin of the multi-row matrix CSP lead frame wing gull type is reversed to the second radiant wire of the pad on the MEMS chip; the film is stuck in the film On the chip machine, the semi-assembled multi-row matrix CSP lead frame with the second bonding wire is fed, and the second adhesive sheet is drawn on the back of the MEMS chip, and the first VGA amplifier chip automatically picked up by the device is accurately placed in the film. The back side of the MEMS chip that has been glued, after bonding the first VGA amplifier chip The same as the segmented baking, the anti-separation process is used in the segment baking process; on the ball welder, the semi-finished multi-row matrix CSP lead frame to which the first VGA amplifier chip is bonded is fed forward, from the first The pad on a VGA amplifier chip is applied to the front pad of the multi-row matrix CSP lead frame wing gull type upturned inner pin, and the first bonding wire is used; after the bonding wire, the expansion coefficient α1 ≤ 1, Plastic packaging material with water absorption rate ≤0.30%, the punching rate is controlled at 5%, no void and separation layer, post-curing at 150 °C for 5 hours; if the bottom pin is not plated with nickel-plated palladium in frame production or Pure gold, electroplated blunt tin, blunt tin layer thickness 7.62 ~ 15.24μm, and baked at 175 ° C, 1 hour to prevent tin whisker growth; after laser marking, cutting rib separation, testing, braiding, based on custom CSP type MEMS package of lead frame; if nickel, palladium gold or pure gold is plated on the bottom surface of the bottom pin, no pure tin plating, direct laser marking, separation of ribs, testing, braiding, and manufacturing based on custom leads Framed CSP type MEMS package.
  7. 一种权利要求3所述的基于定制引线框架的CSP型MEMS封装件的生产方法,其特征在于,具体按以下步骤进行:A method for manufacturing a custom lead frame-based CSP type MEMS package according to claim 3, characterized in that the following steps are specifically performed:
    步骤1:制作多排矩阵式无载体翼鸥型内引脚的CSP引线框架,内引脚的正面和背面除电镀铜外,还要镀银或镀镍钯金焊盘、或者根据电镀倒装封装需要电镀UBM金属层;Step 1: Make a multi-row matrix carrierless wing gull-type internal CSP lead frame with the front and back sides of the inner leads in addition to electroplated copper, silver or nickel-plated palladium-plated pads, or flip-chip according to plating The package needs to be plated with a UBM metal layer;
    采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至150~200μm,不带凸点的晶圆减薄至130~180μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;The wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 150-200 μm, and the wafer without bumps is thinned to 130-180 μm; the thinning process is thick The grinding speed is 6μm/s, the finishing speed is 0.15μm/s, and the polishing speed is 0.05μm/s. At the same time, the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ≤10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
    步骤2:先在两排相对设置的内引脚的内引脚上表面上平行设置MEMS隔墙,两个MEMS隔墙和内引脚构成一个腔体;然后,将带膜片的MEMS芯片粘贴在腔体内,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上的焊盘向位于腔体内的内引脚上表面焊线,然后在两个MEMS隔墙顶端粘接MEMS盖板,在150℃温度下烘烤0.5小时;接着在倒装粘片机上,将已粘接盖板的半成 品引线框架采用反向进料方式,将带凸点的VGA放大器芯片倒扣在上翘引脚的背面,并回流焊;选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,冲线率控制在5%、无空洞和离层,在175℃温度下后固化4小时;若底面引脚的底面上已经电镀了镍钯金或纯金时,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上没有电镀镍钯金或纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。Step 2: First, MEMS partition walls are arranged in parallel on the upper surface of the inner pins of the two rows of oppositely disposed inner pins, and the two MEMS partition walls and the inner leads form a cavity; then, the MEMS chip with the diaphragm is pasted In the cavity, the section baking is carried out, that is, in the oven, the temperature is raised to 100 ° C for 15 minutes, the temperature is raised to 5 ° C for 25 minutes, the temperature is raised to 150 ° C for 35 minutes, and the temperature is lowered by 10 minutes. Take out to 70 ° C; use the anti-separation process in the segment baking process, from the pad on the MEMS chip to the inner surface of the inner lead in the cavity, and then bond the MEMS cover on the top of the two MEMS partitions. , baking at 150 ° C for 0.5 hours; then on the flip-chip machine, the half of the bonded cover The lead frame of the product adopts a reverse feeding mode, and the bumped VGA amplifier chip is buckled on the back side of the upturned pin and reflowed; the environmentally friendly plastic sealing material with the expansion coefficient α1≤1 and the water absorption rate≤0.30% is selected. The punching rate is controlled at 5%, void-free and separated, and post-cured at 175 °C for 4 hours. If the bottom surface of the bottom pin is plated with nickel-palladium gold or pure gold, then no pure tin plating, direct laser Marking, cutting, separating, testing, tape-making, making CSP-type MEMS package based on custom lead frame; if the bottom surface of the bottom pin is not plated with nickel-palladium gold or pure gold, plating on the bottom surface of the bottom pin Pure tin, then laser marking, cutting and separating, testing, braiding, and making CSP-type MEMS packages based on custom lead frames.
  8. 一种权利要求4所述的基于定制引线框架的CSP型MEMS封装件的生产方法,其特征在于,具体按以下步骤进行:A method for manufacturing a custom lead frame-based CSP type MEMS package according to claim 4, wherein the method is specifically as follows:
    步骤1:制作多排矩阵式无载体翼鸥型内引脚的CSP引线框架,内引脚的正面和背面除电镀铜外,还要镀银或镀镍钯金焊盘、或者根据电镀倒装封装需要电镀UBM金属层;Step 1: Make a multi-row matrix carrierless wing gull-type internal CSP lead frame with the front and back sides of the inner leads in addition to electroplated copper, silver or nickel-plated palladium-plated pads, or flip-chip according to plating The package needs to be plated with a UBM metal layer;
    采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至150~200μm,不带凸点的晶圆减薄至130~180μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;The wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 150-200 μm, and the wafer without bumps is thinned to 130-180 μm; the thinning process is thick The grinding speed is 6μm/s, the finishing speed is 0.15μm/s, and the polishing speed is 0.05μm/s. At the same time, the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ≤10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
    步骤2:引线框架反向进料,采用胶膜片粘片机,将带胶膜片的MEMS芯片粘贴在上翘引脚的底面,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上焊盘向上翘引脚的背面焊盘低弧度焊线,选用膨胀系数α1≤1、吸水率≤0.25%的环保型透明塑封料封装,冲线率控制在5%、无空洞和离层,在150℃温度下后固化0.5小时;将MEMS盖板与第一凹槽粘接,然后,在胶膜片粘片机上,将已粘MEMS盖板的半成品引线框架正面进料,将另一个带胶膜片的VGA放大器芯片粘贴在上翘引脚的正面,然后进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从另一个VGA放大器芯片上焊盘向上翘引脚的正面焊盘低弧度焊线,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,在175℃温度下后固化4小时;若底面引脚的底面上已经电镀了镍钯金或纯金时,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上没有电镀镍钯金或纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。Step 2: Reverse feeding of the lead frame, using a film-bonding machine, pasting the MEMS chip with the adhesive film on the bottom surface of the upturned pin for segmental baking, that is, heating in the oven for 15 minutes The temperature is raised to 100 ° C for 25 minutes, the temperature is raised for 5 minutes, the temperature is raised to 150 ° C for 35 minutes, the temperature is lowered to 10 minutes to remove the temperature to 70 ° C; the segmentation baking process uses the anti-separation process, from the MEMS The low-radius bonding wire on the back pad of the pad on the chip is used for the low-radius bonding wire with the expansion coefficient α1≤1 and the water absorption rate ≤0.25%. The punching rate is controlled at 5%, no void and separation layer. After curing at 150 ° C for 0.5 hour; bonding the MEMS cover to the first groove, and then feeding the front surface of the semi-finished lead frame of the bonded MEMS cover on the film-bonding machine, the other A VGA amplifier chip with a film is attached to the front side of the upturned pin, and then baked in sections, that is, in an oven, the temperature is raised to 100 ° C for 25 minutes, and the temperature is raised by 5 minutes. Bake at 150 ° C for 35 minutes, cool down for 10 minutes and remove the temperature to 70 ° C; In the segment baking process, the anti-separation layer process is adopted, and the low-radiation bonding wire of the front pad of the upturned pin from the pad on the other VGA amplifier chip is packaged in an environmentally-friendly plastic package with an expansion coefficient α1≤1 and a water absorption rate≤0.30%. After curing at 175 ° C for 4 hours; if the bottom surface of the bottom pin has been plated with nickel palladium gold or pure gold, then no plating of pure tin, direct laser marking, cutting separation, testing, braiding, system CSP type MEMS package based on custom lead frame; if there is no nickel-palladium gold or pure gold on the bottom surface of the bottom pin, pure tin is plated on the bottom surface of the bottom pin, then laser marking, cutting separation, testing , tape, and make CSP type MEMS package based on custom lead frame.
  9. 一种权利要求5所述的基于定制引线框架的CSP型MEMS封装件的生产方法,其特征在于,具体按以下步骤进行:A method for manufacturing a custom lead frame-based CSP type MEMS package according to claim 5, wherein the method is specifically as follows:
    步骤1:制作多排矩阵式无载体翼鸥型内引脚的CSP引线框架,内引脚的正面和背面除电镀铜外,还要镀银或镀镍钯金焊盘、或者根据电镀倒装封装需要电镀UBM金属层;Step 1: Make a multi-row matrix carrierless wing gull-type internal CSP lead frame with the front and back sides of the inner leads in addition to electroplated copper, silver or nickel-plated palladium-plated pads, or flip-chip according to plating The package needs to be plated with a UBM metal layer;
    采用8吋~12吋的减薄机对晶圆进行减薄,带凸点的晶圆减薄至150~200μm,不带凸点的晶圆减薄至130~180μm;减薄过程中的粗磨速度6μm/s,精磨速度0.15μm/s,抛光速度0.05μm/s;同时采用防翘曲工艺:然后,采用A-WD-300TXB划片机对减薄的晶圆进行划片,划片过程中采用防碎片的双刀工艺划片,划片进刀速度≤10mm/s,切割分离形成需要的MEMS IC芯片和VGA放大器芯片;The wafer is thinned by a 8 吋 to 12 减 thinner, the bumped wafer is thinned to 150-200 μm, and the wafer without bumps is thinned to 130-180 μm; the thinning process is thick The grinding speed is 6μm/s, the finishing speed is 0.15μm/s, and the polishing speed is 0.05μm/s. At the same time, the anti-warping process is adopted: Then, the thinned wafer is diced and drawn by A-WD-300TXB dicing machine. In the process of film, the anti-fragment double-knife process dicing is adopted, and the dicing feed speed is ≤10mm/s, and the MEMS IC chip and the VGA amplifier chip are formed by cutting and separating;
    步骤2:在倒装粘片机上,引线框架反向进料,将第二VGA放大器芯片倒扣在上翘引脚的底面,即第二VGA放大器芯片上的凸点与内引脚下表面相连接,并进行第一次回流焊;接着,在倒装粘片机上,将已粘接第二VGA放大器芯片的半成品引线框架正面进料,将第三VGA放大器芯片倒扣在上翘引脚的正面,即第三VGA放大器芯片上的凸点与内引脚上表 面相连接,并进行第二次回流焊;然后,在胶膜片粘片机上,将已粘接第三VGA放大器芯片的半成品引线框架正面进料,将带胶膜片的MEMS芯片堆叠在第三VGA放大器芯片背面,进行分段烘烤,即在烘箱中,升温15分钟将温度升至100℃烘烤25分钟,再升温5分钟将温度升至150℃烘烤35分钟,降温10分钟将温度降至70℃取出;分段烘烤过程中采用防离层工艺,从MEMS芯片上焊盘向上翘引脚的正面的焊盘低弧度焊线;冲线率控制在5%、无空洞和离层,选用膨胀系数α1≤1、吸水率≤0.30%的环保塑封料封装,在175℃温度下后固化4小时;若底面引脚的底面上已经电镀了镍钯金或纯金时,则不用电镀纯锡,直接激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件;若底面引脚的底面上没有电镀镍钯金或纯金,则在底面引脚的底面上电镀纯锡,然后激光打标、切筋分离、测试、编带,制得基于定制引线框架的CSP型MEMS封装件。 Step 2: On the flip-chip bonding machine, the lead frame is reversely fed, and the second VGA amplifier chip is reversed on the bottom surface of the upturned pin, that is, the bump on the second VGA amplifier chip is opposite to the lower surface of the inner pin. Connecting and performing the first reflow soldering; then, on the flip chip bonding machine, the front side of the semi-finished lead frame to which the second VGA amplifier chip is bonded is fed, and the third VGA amplifier chip is reversed on the upturned pin The front side, that is, the bump on the third VGA amplifier chip and the internal pin on the table The surface is connected and subjected to a second reflow soldering; then, on the film bonding machine, the front side of the semi-finished lead frame to which the third VGA amplifier chip is bonded is fed, and the MEMS chip with the adhesive film is stacked in the third The back side of the VGA amplifier chip is baked in sections, that is, in an oven, the temperature is raised to 100 ° C for 15 minutes, and the temperature is raised to 150 ° C for 35 minutes, and the temperature is raised to 150 ° C for 35 minutes. Take out to 70 ° C to take out; use the anti-separation layer process in the segment baking process, from the pad on the MEMS chip up the pad on the front side of the pad low arc bonding wire; the line rate is controlled at 5%, no voids and away The layer is made of environmentally-friendly molding compound with expansion coefficient α1≤1 and water absorption rate≤0.30%, and is post-cured at 175°C for 4 hours. If the bottom surface of the bottom surface has been plated with nickel-palladium gold or pure gold, then it is not used. Electroplating pure tin, direct laser marking, cutting and separating, testing, braiding, and making CSP type MEMS package based on custom lead frame; if the bottom surface of the bottom pin is not plated with nickel palladium gold or pure gold, then the bottom surface Plating pure tin on the underside of the pin, then Marking light, cut tendons separation, testing, taping, obtained based on customized leadframe CSP type MEMS package.
PCT/CN2015/095026 2014-12-02 2015-11-19 Csp type mems packaging piece based on customised lead frame and production method therefor WO2016086769A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410717243.7A CN104465595B (en) 2014-12-02 2014-12-02 CSP type MEMS package parts and production method based on custom lead-frame
CN201410717243.7 2014-12-02

Publications (1)

Publication Number Publication Date
WO2016086769A1 true WO2016086769A1 (en) 2016-06-09

Family

ID=52911402

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/095026 WO2016086769A1 (en) 2014-12-02 2015-11-19 Csp type mems packaging piece based on customised lead frame and production method therefor

Country Status (2)

Country Link
CN (1) CN104465595B (en)
WO (1) WO2016086769A1 (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108117034A (en) * 2017-12-29 2018-06-05 杭州士兰集成电路有限公司 MEMS component and its manufacturing method
CN109660222A (en) * 2018-12-24 2019-04-19 安徽华东光电技术研究所有限公司 A kind of production method of Ku frequency range upconverter cavity body filter
CN109712948A (en) * 2019-01-24 2019-05-03 广东气派科技有限公司 A kind of chip-packaging structure of integrated passive device
CN110164775A (en) * 2019-06-04 2019-08-23 无锡中微高科电子有限公司 High power MOS chip and control chip portfolio encapsulating structure and packaging method
CN112750710A (en) * 2020-12-31 2021-05-04 江苏和睿半导体科技有限公司 Packaging process based on single-base-island SOT23 lead frame
CN113823606A (en) * 2021-08-12 2021-12-21 紫光宏茂微电子(上海)有限公司 Chip stacking and packaging structure and manufacturing method thereof
CN115602546A (en) * 2022-09-27 2023-01-13 瓴承家办(深圳)科技有限公司(Cn) Integrated circuit packaging structure and packaging method
CN116299850A (en) * 2023-05-15 2023-06-23 甬矽电子(宁波)股份有限公司 Silicon photon packaging structure and preparation method thereof
CN117012656A (en) * 2023-09-20 2023-11-07 广东气派科技有限公司 Preparation method of high-density large-matrix SOT89 packaging structure
CN117133746A (en) * 2023-10-26 2023-11-28 成都电科星拓科技有限公司 Square flat pin-free packaging chip structure for double-sided welding and packaging method
CN117238781A (en) * 2023-11-16 2023-12-15 江苏芯德半导体科技有限公司 Wafer-level ultrathin four-side pin-free chip packaging method and chip packaging structure

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104465595B (en) * 2014-12-02 2017-04-05 天水华天科技股份有限公司 CSP type MEMS package parts and production method based on custom lead-frame
CN105226001B (en) * 2015-10-22 2018-05-01 珠海其昌精密机械有限公司 With the twin lamella welding fixture for counting sensing detection
US9809446B1 (en) * 2016-05-09 2017-11-07 Amkor Technology, Inc. Semiconductor package and manufacturing method thereof
CN109817533A (en) * 2017-11-22 2019-05-28 东莞市广信知识产权服务有限公司 A kind of production method of the semiconductor devices based on wafer-level package shell
CN109103128B (en) * 2018-08-09 2021-08-27 重庆市嘉凌新科技有限公司 Cutting mechanism for lead frame belt
CN110323198B (en) * 2019-07-26 2024-04-26 广东气派科技有限公司 Non-contact type upper and lower chip packaging structure and packaging method thereof
CN112645279B (en) * 2020-12-23 2023-09-05 东南大学 Packaging method of MEMS wind speed and direction sensor
CN114646423A (en) * 2022-03-15 2022-06-21 无锡胜脉电子有限公司 High-reliability absolute pressure sensor and packaging method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102344110A (en) * 2011-10-31 2012-02-08 嘉盛半导体(苏州)有限公司 Quad flat non-leaded package structure and method of micro electro mechanical system device
CN102431950A (en) * 2011-12-31 2012-05-02 天水华天科技股份有限公司 Double-layer MEMS (micro-electro-mechanical systems) device stacked package and production method thereof
CN102456582A (en) * 2010-10-26 2012-05-16 联钢技术国际有限公司 Technology for manufacturing molded lead frame
CN104465595A (en) * 2014-12-02 2015-03-25 天水华天科技股份有限公司 CSP type MEMS packaging piece based on customized lead frame and production method
CN204243032U (en) * 2014-12-02 2015-04-01 天水华天科技股份有限公司 Based on the CSP type MEMS package part of custom lead-frame

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100164078A1 (en) * 2008-12-31 2010-07-01 Ruben Madrid Package assembly for semiconductor devices
US8973250B2 (en) * 2011-06-20 2015-03-10 International Business Machines Corporation Methods of manufacturing a micro-electro-mechanical system (MEMS) structure
CN102740207B (en) * 2012-06-15 2015-08-05 歌尔声学股份有限公司 Chip of a kind of integrated silicon micro-microphone and CMOS integrated circuit and preparation method thereof
CN104010260A (en) * 2014-06-17 2014-08-27 山东共达电声股份有限公司 Two-line MEMS microphone

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102456582A (en) * 2010-10-26 2012-05-16 联钢技术国际有限公司 Technology for manufacturing molded lead frame
CN102344110A (en) * 2011-10-31 2012-02-08 嘉盛半导体(苏州)有限公司 Quad flat non-leaded package structure and method of micro electro mechanical system device
CN102431950A (en) * 2011-12-31 2012-05-02 天水华天科技股份有限公司 Double-layer MEMS (micro-electro-mechanical systems) device stacked package and production method thereof
CN104465595A (en) * 2014-12-02 2015-03-25 天水华天科技股份有限公司 CSP type MEMS packaging piece based on customized lead frame and production method
CN204243032U (en) * 2014-12-02 2015-04-01 天水华天科技股份有限公司 Based on the CSP type MEMS package part of custom lead-frame

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108117034B (en) * 2017-12-29 2023-12-26 杭州士兰集成电路有限公司 MEMS component and manufacturing method thereof
CN108117034A (en) * 2017-12-29 2018-06-05 杭州士兰集成电路有限公司 MEMS component and its manufacturing method
CN109660222A (en) * 2018-12-24 2019-04-19 安徽华东光电技术研究所有限公司 A kind of production method of Ku frequency range upconverter cavity body filter
CN109712948A (en) * 2019-01-24 2019-05-03 广东气派科技有限公司 A kind of chip-packaging structure of integrated passive device
CN110164775A (en) * 2019-06-04 2019-08-23 无锡中微高科电子有限公司 High power MOS chip and control chip portfolio encapsulating structure and packaging method
CN110164775B (en) * 2019-06-04 2024-04-09 无锡中微高科电子有限公司 High-power MOS chip and control chip combined packaging structure and packaging method
CN112750710A (en) * 2020-12-31 2021-05-04 江苏和睿半导体科技有限公司 Packaging process based on single-base-island SOT23 lead frame
CN113823606A (en) * 2021-08-12 2021-12-21 紫光宏茂微电子(上海)有限公司 Chip stacking and packaging structure and manufacturing method thereof
CN115602546A (en) * 2022-09-27 2023-01-13 瓴承家办(深圳)科技有限公司(Cn) Integrated circuit packaging structure and packaging method
CN115602546B (en) * 2022-09-27 2024-06-04 瓴承家办(深圳)科技有限公司 Integrated circuit packaging structure and packaging method
CN116299850B (en) * 2023-05-15 2023-09-05 甬矽电子(宁波)股份有限公司 Silicon photon packaging structure and preparation method thereof
CN116299850A (en) * 2023-05-15 2023-06-23 甬矽电子(宁波)股份有限公司 Silicon photon packaging structure and preparation method thereof
CN117012656B (en) * 2023-09-20 2023-12-05 广东气派科技有限公司 Preparation method of high-density large-matrix SOT89 packaging structure
CN117012656A (en) * 2023-09-20 2023-11-07 广东气派科技有限公司 Preparation method of high-density large-matrix SOT89 packaging structure
CN117133746A (en) * 2023-10-26 2023-11-28 成都电科星拓科技有限公司 Square flat pin-free packaging chip structure for double-sided welding and packaging method
CN117133746B (en) * 2023-10-26 2024-01-30 成都电科星拓科技有限公司 Square flat pin-free packaging chip structure for double-sided welding and packaging method
CN117238781A (en) * 2023-11-16 2023-12-15 江苏芯德半导体科技有限公司 Wafer-level ultrathin four-side pin-free chip packaging method and chip packaging structure
CN117238781B (en) * 2023-11-16 2024-02-23 江苏芯德半导体科技有限公司 Wafer-level ultrathin four-side pin-free chip packaging method and chip packaging structure

Also Published As

Publication number Publication date
CN104465595A (en) 2015-03-25
CN104465595B (en) 2017-04-05

Similar Documents

Publication Publication Date Title
WO2016086769A1 (en) Csp type mems packaging piece based on customised lead frame and production method therefor
US7928551B2 (en) Semiconductor device and method of manufacturing the same
CN101442035B (en) Flat non down-lead encapsulation piece and method for producing the same
USRE42349E1 (en) Wafer treating method for making adhesive dies
JP3839323B2 (en) Manufacturing method of semiconductor device
US6620651B2 (en) Adhesive wafers for die attach application
US20120187598A1 (en) Method and apparatus of compression molding to reduce voids in molding compounds of semiconductor packages
US20070218651A1 (en) Manufacturing method of a semiconductor device
US20070215992A1 (en) Chip package and wafer treating method for making adhesive chips
US7419855B1 (en) Apparatus and method for miniature semiconductor packages
WO2012068763A1 (en) Gird-array ic chip package without carrier and manufacturing method thereof
US8815645B2 (en) Multi-chip stacking method to reduce voids between stacked chips
US8093104B1 (en) Multi-chip stacking method to reduce voids between stacked chips
JP2011142264A (en) Method of manufacturing semiconductor device
US9111878B2 (en) Method for forming a semiconductor device assembly having a heat spreader
JP2013045863A (en) Semiconductor device and manufacturing method of the same
JPH05226562A (en) Semiconductor package and its assembly method
KR20150060758A (en) Semiconductor device and method for manufacturing same
KR101590453B1 (en) Semiconductor chip die structure for improving warpage and method thereof
JP2021034606A (en) Semiconductor device and manufacturing method of the same
JP2010103348A (en) Semiconductor device and method of manufacturing same
JP2011018797A (en) Semiconductor device, and method of manufacturing semiconductor device
CN102263077A (en) Double flat carrier-free pin-free IC chip packaging part
WO2016107298A1 (en) Molding packaged mini mobile phone intelligent card, and packing method
JP2000114206A (en) Manufacture of semiconductor package

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15865705

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15865705

Country of ref document: EP

Kind code of ref document: A1