WO2015146130A1 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- WO2015146130A1 WO2015146130A1 PCT/JP2015/001622 JP2015001622W WO2015146130A1 WO 2015146130 A1 WO2015146130 A1 WO 2015146130A1 JP 2015001622 W JP2015001622 W JP 2015001622W WO 2015146130 A1 WO2015146130 A1 WO 2015146130A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- heat sink
- semiconductor chip
- passive component
- bonding wire
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4871—Bases, plates or heatsinks
- H01L21/4882—Assembly of heatsink parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49537—Plurality of lead frames mounted in one device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for individual devices of subclass H10D
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/18—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53875—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters with pulse width modulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/37124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/37147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/3754—Coating
- H01L2224/37599—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49589—Capacitor integral with or on the leadframe
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1205—Capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1207—Resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/1425—Converter
- H01L2924/14253—Digital-to-analog converter [DAC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters
Definitions
- the present disclosure relates to a semiconductor device having a switching element, a resin molded body for sealing the semiconductor chip, a semiconductor device including heat sinks disposed on both sides of the semiconductor chip and connected to the main electrode via solder, and the semiconductor device It relates to a manufacturing method.
- Patent Document 1 a semiconductor chip on which a switching element is formed (hereinafter referred to as a first semiconductor chip), a resin molded body that seals the first semiconductor chip, and both sides of the first semiconductor chip 2.
- a semiconductor device is known that includes heat sinks that are respectively disposed and connected to a main electrode via solder.
- This disclosure is intended to provide a semiconductor device and a method for manufacturing the same that can suppress poor connection of bonding wires while suppressing an increase in physique.
- a semiconductor device includes a lead frame, a first semiconductor chip, a second heat sink, a second semiconductor chip, a passive component, and a resin molded body.
- the lead frame has a first surface and a back surface opposite to the first surface, and includes a first heat sink, an island separated from the first heat sink, and a control terminal.
- the first semiconductor chip has a first main electrode on a surface facing the back surface, and has a second main electrode that forms a pair with the control electrode and the first main electrode on a surface opposite to the facing surface, The first main electrode is connected to the first heat sink.
- the second heat sink is disposed to face the surface of the first semiconductor chip on which the control electrode is disposed, and is connected to the second main electrode.
- the second semiconductor chip is fixed to the island on the back surface in order to control driving of the first semiconductor chip, is connected to the control electrode via a first bonding wire, and is connected via a second bonding wire. Connected to the control terminal.
- the passive component is mounted on a passive component mounting portion of the control terminal via a joining member.
- the resin molded body has a surface on the first heat sink side and a surface on the second heat sink side in the stacking direction of the first heat sink, the second heat sink, and the first semiconductor chip, and the first semiconductor Including the chip, the second semiconductor chip, the passive component, the first heat sink and at least a part of the second heat sink, the first bonding wire, the second bonding wire, the island, and the passive component mounting portion.
- a part of the control terminal is integrally sealed.
- a part of the lead frame is bent with respect to another part, and the island is formed on the back surface of the resin molded body more than the passive component mounting part of the first heat sink and the control terminal. The position is close to the surface on the heat sink side.
- the passive component is mounted on the passive component mounting portion of the control terminal on the one surface.
- the semiconductor device can suppress poor connection between the first bonding wire and the second bonding wire while suppressing an increase in physique.
- a method of manufacturing a semiconductor device is a method of manufacturing a semiconductor device including a lead frame, a first semiconductor chip, a second heat sink, a second semiconductor chip, a passive component, and a resin molded body. It is.
- the lead frame has a first surface and a back surface opposite to the first surface, and includes a first heat sink, an island separated from the first heat sink, and a control terminal.
- the semiconductor chip has a first main electrode on a surface facing the back surface, and has a second main electrode paired with the control electrode and the first main electrode on a surface opposite to the facing surface, One main electrode is connected to the first heat sink via solder.
- the second heat sink is disposed opposite to the surface of the first semiconductor chip on which the control electrode is disposed, and is connected to the second main electrode via solder.
- the second semiconductor chip is fixed to the island on the back surface in order to control driving of the first semiconductor chip, is connected to the control electrode via a first bonding wire, and is connected via a second bonding wire.
- the passive component is mounted on a passive component mounting portion of the control terminal via a joining member.
- the resin molded body has a surface on the first heat sink side and a surface on the second heat sink side in the stacking direction of the first heat sink, the second heat sink, and the first semiconductor chip, and the first semiconductor Including the chip, the second semiconductor chip, the passive component, the first heat sink and at least a part of the second heat sink, the first bonding wire, the second bonding wire, the island, and the passive component mounting portion.
- a part of the control terminal is integrally sealed.
- the island is positioned closer to the surface on the first heat sink side of the resin molded body than the passive component mounting portion of the first heat sink and the control terminal.
- the lead frame bent as described above is used.
- the solder between the first heat sink and the first semiconductor chip is reflowed to form a connection body in which the lead frame and the first semiconductor chip are integrated, and the second semiconductor is formed on the island.
- Fix the tip After fixing the second semiconductor chip, the control electrode and the second semiconductor chip are connected via the first bonding wire, and the second semiconductor chip and the control terminal are connected via the second bonding wire. Connect.
- connection body After connecting the second semiconductor chip via the first bonding wire and the second bonding wire, the connection body is inverted and disposed on the second heat sink, and the second heat sink and the connection body The solder is reflowed, and the passive component is mounted on the passive component mounting portion of the control terminal on the one surface via the joining member. After mounting the passive component, the resin molding is molded.
- the manufacturing method it is possible to manufacture a semiconductor device capable of suppressing connection failure between the first bonding wire and the second bonding wire while suppressing an increase in physique.
- FIG. 1 is a side view illustrating a schematic configuration of a power conversion device to which a semiconductor device according to an embodiment of the present disclosure is applied.
- FIG. 2 is a plan view showing a schematic configuration of the semiconductor device.
- FIG. 3 is a cross-sectional view of the semiconductor device taken along line III-III in FIG. 4 is a cross-sectional view of the semiconductor device taken along line IV-IV in FIG.
- FIG. 5 is a plan view in which the resin molded body is omitted and the second heat sink is indicated by a two-dot chain line in the semiconductor device shown in FIG. FIG.
- FIG. 6 is a plan view of the semiconductor device shown in FIG. 2 as viewed from the lead frame side with the resin molded body and bonding wires omitted.
- FIG. 7 is an enlarged perspective view of a region VII indicated by a dashed line in FIG.
- FIG. 8 is an enlarged perspective view of a region VIII indicated by a one-dot chain line in FIG.
- FIG. 9 is a plan view showing a method for manufacturing a semiconductor device, and shows a state in which the first reflow process is completed.
- FIG. 10 is a cross-sectional view showing a state where the first reflow process is completed, and corresponds to FIG.
- FIG. 11 is a plan view showing a method for manufacturing a semiconductor device, and shows a state in which the wire bonding step is completed.
- FIG. 12 is a cross-sectional view showing a state where the wire bonding process is completed.
- FIG. 13 is a plan view showing a method for manufacturing a semiconductor device, and shows a state in which the second reflow process is completed.
- FIG. 14 is a cross-sectional view showing a state in which the second reflow process has been completed.
- a second semiconductor chip in which a circuit for controlling the driving of a switching element is formed in addition to the above-described components, and a chip resistor and a chip capacitor for the purpose of enhancing the functionality of the semiconductor device of Patent Document 1 and improving noise resistance.
- a semiconductor device further including a passive component such as is conceivable.
- the first heat sink is configured with a common lead frame together with an island and a control terminal on which the second semiconductor chip is disposed. Then, the second semiconductor chip is connected to the first semiconductor chip via the bonding wire.
- the bonding wire has a shape restriction such as a connection angle, depending on the arrangement of the first semiconductor chip and the second semiconductor chip, the semiconductor device may be arranged in a direction orthogonal to the stacking direction of the first semiconductor chip and the heat sink. Physique will increase. Also, bonding wire connection failure is likely to occur during bonding wire connection or resin molding.
- the passive component has a small application area of the joining member, and when fluxless solder is used, the solder hardly wets and spreads the electrode of the passive component. For this reason, flux-containing solder, Ag paste, or the like must be used as a joining member for the passive component. However, when such a joining member is used, scattering of flux, outgas, fume and the like occurs. For this reason, when a passive component is mounted on the same side of the lead frame as the second semiconductor chip, the bonding wire connection location may be contaminated by scattering of flux or the like, resulting in a bonding wire connection failure.
- the present disclosure aims to provide a semiconductor device and a manufacturing method thereof that can suppress a bonding wire connection failure while suppressing an increase in physique.
- a semiconductor device includes a lead frame, a first semiconductor chip, a second heat sink, a second semiconductor chip, a passive component, and a resin molded body.
- the lead frame has one surface and a back surface opposite to the one surface, and includes a first heat sink, an island separated from the first heat sink, and a control terminal.
- the first semiconductor chip has a first main electrode on the surface facing the back surface, and has a second main electrode that forms a pair with the control electrode and the first main electrode on the surface opposite to the facing surface.
- the electrode is connected to the first heat sink.
- the second heat sink is disposed opposite to the surface on which the control electrode of the first semiconductor chip is disposed, and is connected to the second main electrode.
- the second semiconductor chip is fixed to the island on the back surface in order to control the driving of the first semiconductor chip, and is connected to the control electrode via the first bonding wire and to the control terminal via the second bonding wire. Is done.
- the passive component is mounted on the passive component mounting portion of the control terminal via the joining member.
- the resin molded body has a surface on the first heat sink side and a surface on the second heat sink side in the stacking direction of the first heat sink, the second heat sink, and the first semiconductor chip, and the first semiconductor chip, the second semiconductor chip, At least a part of the passive component, the first heat sink and the second heat sink, the first bonding wire, the second bonding wire, the island, and a part of the control terminal including the passive component mounting part are integrally sealed.
- a part of the lead frame is bent with respect to the other part, and on the back surface, the island is located closer to the surface on the first heat sink side of the resin molded body than the passive component mounting part of the first heat sink and the control terminal.
- the passive component is mounted on the passive component mounting portion of the control terminal on one side.
- the island is bent on the back surface of the lead frame so that the island is positioned closer to the surface on the first heat sink side of the resin molded body than the passive component mounting portion of the first heat sink and the control terminal.
- the bonding wire has a shape restriction such as a connection angle (for example, about 40 ° to 50 °). If the connection surfaces of the first bonding wires are separated in the stacking direction, for example, in order to satisfy a predetermined connection angle, the connection surfaces of the first bonding wires must be separated in a direction orthogonal to the stacking direction. However, in the semiconductor device described above, the first semiconductor chip and the second semiconductor chip can be brought close to each other in the direction orthogonal to the stacking direction by the above-described arrangement. Therefore, an increase in the size of the semiconductor device can be suppressed in a direction orthogonal to the stacking direction.
- a connection angle for example, about 40 ° to 50 °
- connection surface of the first bonding wire is brought closer in the stacking direction, it is possible to suppress defects during the connection of the first bonding wire. Furthermore, since the connection length of the first bonding wire can be shortened, it is possible to suppress a connection failure caused by the bonding wire being pressed by the resin pressure during resin molding.
- the second semiconductor chip is mounted on the back surface of the lead frame, and the passive component is mounted on one surface. Therefore, even if flux-containing solder, Ag paste, or the like is used as the joining member of the passive component, it is possible to suppress a bonding wire connection failure due to scattering of the flux or the like.
- the passive component when using a lead frame bent so as to push down the entire island and the control terminal, the distance between one surface of the lead frame and the surface of the resin molded body on the first heat sink side becomes narrow in the stacking direction. Therefore, when the passive component is mounted on one surface of the control terminal, a technical problem arises that the passive component is exposed from the resin molded body or the resin thickness covering the passive component is reduced. When the passive component is exposed, the passive component may come into contact with the mold during molding of the resin molded body, and the passive component may be damaged. Further, moisture or the like may enter from the outside, and there is a possibility that the resin molded body may be peeled off or the electrical connection reliability may be reduced. When the resin thickness is thin, entrainment voids are likely to occur.
- the passive component mounting portion of the control terminal is farther from the island than the surface of the resin molded body on the first heat sink side. Therefore, in the passive component mounting portion of the control terminal, the passive component can be mounted on one surface opposite to the back surface on which the second semiconductor chip is mounted.
- a method of manufacturing a semiconductor device is a method of manufacturing a semiconductor device including a lead frame, a first semiconductor chip, a second heat sink, a second semiconductor chip, a passive component, and a resin molded body. It is.
- the lead frame has one surface and a back surface opposite to the one surface, and includes a first heat sink, an island separated from the first heat sink, and a control terminal.
- the semiconductor chip has a first main electrode on the surface facing the back surface, and has a second main electrode that is paired with the control electrode and the first main electrode on the surface opposite to the facing surface,
- the first heat sink is connected via solder.
- the second heat sink is disposed opposite to the surface of the first semiconductor chip on which the control electrode is disposed, and is connected to the second main electrode via solder.
- the second semiconductor chip is fixed to the island on the back surface in order to control the driving of the first semiconductor chip, and is connected to the control electrode via the first bonding wire and to the control terminal via the second bonding wire. Is done.
- the passive component is mounted on the passive component mounting portion of the control terminal via the joining member.
- the resin molded body has a surface on the first heat sink side and a surface on the second heat sink side in the stacking direction of the first heat sink, the second heat sink, and the first semiconductor chip, and the first semiconductor chip, the second semiconductor chip, At least a part of the passive component, the first heat sink and the second heat sink, the first bonding wire, the second bonding wire, the island, and a part of the control terminal including the passive component mounting part are integrally sealed.
- the island is bent so as to be closer to the surface on the first heat sink side of the resin molded body than the passive component mounting portion of the first heat sink and the control terminal.
- the solder between the first heat sink and the first semiconductor chip is reflowed to form a connection body in which the lead frame and the first semiconductor chip are integrated, and the second semiconductor chip is fixed on the island.
- the control electrode and the second semiconductor chip are connected via the first bonding wire, and the second semiconductor chip and the control terminal are connected via the second bonding wire.
- connection body After connecting the second semiconductor chip via the first bonding wire and the second bonding wire, the connection body is inverted and placed on the second heat sink, and the solder between the second heat sink and the connection body is reflowed. Then, the passive component is mounted on the passive component mounting portion of the control terminal on one surface via the joining member. After mounting the passive components, the resin molding is molded.
- one surface of the lead frame is positioned higher than the back surface by inverting when the connection body is disposed on the second heat sink. Therefore, in the inverted connection body, the passive component can be arranged on one surface of the passive component mounting portion of the control terminal via the joining member. And a passive component can be mounted by the heating at the time of reflowing the solder between a 2nd heat sink and a connection body. In this way, passive components can be mounted without adding a manufacturing process.
- the passive component is mounted after the second semiconductor chip is connected via the first bonding wire and the second bonding wire, it is possible to more reliably suppress bonding wire connection failure due to scattering of flux or the like. You can also.
- the stacking direction of each heat sink and the first semiconductor chip in other words, the thickness direction of the first semiconductor chip is indicated as the Z direction.
- the extending direction of the main terminal and the control terminal is indicated as the Y direction orthogonal to the Z direction.
- a direction orthogonal to both the Y direction and the Z direction is referred to as an X direction.
- the planar shape indicates a shape along a plane defined by the X direction and the Y direction unless otherwise specified.
- the power conversion apparatus 100 shown in FIG. 1 outputs an inverter 102 for driving a vehicle driving motor 200, a driver 104 for driving the inverter 102, and a drive signal to the inverter 102 via the driver 104. And a microcomputer 106.
- a power conversion device 100 is mounted on, for example, an electric vehicle or a hybrid vehicle.
- the semiconductor device 10 includes an upper arm portion 10U and a lower arm portion 10L connected in series between the positive electrode (high potential side) and the negative electrode (low potential side) of the DC power supply 108.
- the upper arm unit 10U is disposed on the high potential side of the DC power source 108
- the lower arm unit 10L is disposed on the low potential side of the DC power source 108.
- the inverter 102 has three phases of upper and lower arms including an upper arm portion 10U and a lower arm portion 10L. And it is comprised so that direct-current power can be converted into a three-phase alternating current, and it can output to the motor 200.
- FIG. 1 the code
- the driver 104 has a chip corresponding to each of the arm units 10U and 10L, and a circuit for controlling driving of the elements of the arm units 10U and 10L is formed in each chip.
- the semiconductor device 10 has upper and lower arms for one phase, and also has a driver 104 chip corresponding to the upper and lower arms. That is, the inverter 102 and the driver 104 are configured by the three semiconductor devices 10.
- the upper arm portion 10U includes an n-channel IGBT element 12U and a reflux FWD element 14U connected in reverse parallel to the IGBT element 12U.
- the IGBT element 12U and the FWD element 14U are configured on the same semiconductor chip.
- the IGBT element 12U and the FWD element 14U may be configured in separate chips.
- the IGBT element 12U includes a collector electrode 16U and an emitter electrode 18U that are main electrodes, and a gate electrode 20U that is a control electrode.
- the FWD element 14U has a cathode electrode that is also used as the collector electrode 16U and an anode electrode that is also used as the emitter electrode 18U.
- the lower arm portion 10L has the same configuration as the upper arm portion 10U.
- the lower arm portion 10L includes an n-channel type IGBT element 12L and a reflux FWD element 14L connected in reverse parallel to the IGBT element 12L.
- the IGBT element 12L and the FWD element 14L are also configured on the same semiconductor chip. However, the IGBT element 12L and the FWD element 14L may be configured in separate chips.
- the IGBT element 12L includes a collector electrode 16L and an emitter electrode 18L that are main electrodes, and a gate electrode 20L that is a control electrode.
- the FWD element 14L includes a cathode electrode that is also used as the collector electrode 16L, and an anode electrode that is also used as the emitter electrode 18L.
- the collector electrode 16U of the IGBT element 12U is electrically connected to the high potential power supply line 22 connected to the positive electrode of the DC power supply 108.
- the emitter electrode 18L of the IGBT element 12L is electrically connected to a low potential power supply line 24 (also referred to as a ground line) connected to the negative electrode of the DC power supply 108.
- the emitter electrode 18U of the IGBT element 12U and the collector electrode 16L of the IGBT element 12L are connected to an output line 26 for outputting from the inverter 102 to the motor 200.
- the microcomputer 106 is electrically connected to the gate terminals 28U and 28L via the driver 104, and outputs a drive signal (PWM signal) to control driving of the IGBT elements 12U and 12L.
- the microcomputer 106 includes a ROM that stores programs describing various control processes to be executed, a CPU that executes various arithmetic processes, a RAM that temporarily stores arithmetic processing results and various data, and the like. Yes.
- the microcomputer 106 receives a detection signal from a current sensor or a rotation sensor (not shown), and the microcomputer 106 drives the motor 200 based on the torque command value given from the outside and the detection signal of each sensor described above. A drive signal is generated. In response to this drive signal, the six IGBT elements 12U and 12L of the inverter 102 are driven, and a drive current is passed from the DC power source 108 to the motor 200 via the inverter 102. As a result, the motor 200 is driven so as to generate a desired driving torque. Alternatively, the current generated by the electric power generated by the motor 200 is rectified by the inverter 102 and the DC power source 108 is charged.
- the IV-IV line shown in FIG. 5 corresponds to the IV-IV line shown in FIG.
- the resin molded body is omitted, and the second heat sink is shown by a two-dot chain line.
- the resin molded body and the bonding wire are omitted.
- the semiconductor device 10 has two semiconductor chips, that is, a semiconductor chip constituting the upper arm portion 10U and a semiconductor chip constituting the lower arm portion 10L. That is, the semiconductor device 10 is a so-called 2 in 1 package including two IGBT elements 12U and 12L. These arm portions 10U and 10L correspond to the first semiconductor chip.
- the upper arm portion 10U has a collector electrode 16U that is a first main electrode on one surface in the Z direction.
- an emitter electrode 18U that is a second main electrode that forms a pair with the first main electrode and a control electrode 30U that includes a gate electrode 20U are provided on the surface opposite to the collector electrode formation surface.
- the lower arm portion 10L has a collector electrode 16L that is a main electrode on the high potential side on one surface in the Z direction.
- an emitter electrode 18L as a low potential side electrode and a control electrode 30L including the gate electrode 20L are provided on the surface opposite to the collector electrode formation surface.
- control electrodes 30U and 30L in addition to the gate electrodes 20U and 20L, electrodes (pads) for temperature sensing, current sensing, and Kelvin emitter are provided.
- the arm portions 10U and 10L have substantially rectangular shapes whose plane shapes are substantially equal to each other, and have substantially the same thickness in the Z direction. Further, they are arranged side by side in the X direction, and in the Z direction, they are arranged at substantially the same position, that is, in parallel, with the collector electrode forming surface being the same side.
- the semiconductor device 10 includes a resin molded body 32, a lead frame 34, terminals 46U and 46L, second heat sinks 48U and 48L, in addition to the arm portions 10U and 10L.
- Driver ICs 60U and 60L and a passive component 68 are provided.
- the resin molded body 32 is made of an electrically insulating resin material.
- the resin molded body 32 is molded by a transfer mold method using an epoxy resin.
- the resin molded body 32 has a substantially rectangular parallelepiped shape, and has one surface 32a and a back surface 32b opposite to the one surface 32a in the Z direction.
- the one surface 32a and the back surface 32b are flat surfaces substantially parallel to surfaces defined by the X direction and the Y direction, respectively.
- the arm portions 10U and 10L are sealed by the resin molded body 32.
- the lead frame 34 is formed by partially bending a metal plate, and has one surface 34a and a back surface 34b opposite to the one surface 34a in the Z direction. In the Z direction, one surface 32a, 34a and the back surface 32b, 34b are on the same side.
- a single plate may be used, or a plurality of metal plates may be crimped.
- the lead frame 34 is formed using at least a metal material.
- a metal material excellent in thermal conductivity and electrical conductivity such as copper, copper alloy, and aluminum alloy can be used.
- the lead frame 34 includes first heat sinks 36U and 36L, islands 38U and 38L, a main terminal 40, and control terminals 42U and 42L.
- the first heat sinks 36U and 36L perform a function for radiating heat generated by the arm portions 10U and 10L and an electrical connection function.
- the upper arm portion 10U is disposed on the first heat sink 36U so that the collector electrode forming surface faces the first heat sink 36U, and the first heat sink 36U is connected to the collector electrode 16U via the solder 44. It is connected.
- the lower arm portion 10L is disposed on the first heat sink 36L so that the collector electrode forming surface faces the first heat sink 36L.
- the first heat sink 36L is electrically and mechanically connected to the collector electrode 16L via the solder 44. Thermally connected.
- the first heat sinks 36U and 36L are substantially rectangular in plan and have substantially the same thickness. Each first heat sink 36U, 36L is larger in size along the plane defined by the X direction and the Y direction than the arm portions 10U, 10L so as to enclose the corresponding arm portions 10U, 10L. .
- the back surface 34b and the side surface facing the upper arm portion 10U are covered with the resin molded body 32.
- one surface 34 a is exposed from one surface 32 a of the resin molded body 32.
- one surface 34a is substantially flush with one surface 32a. Note that the flush surface means that two or more surfaces are located in the same plane and there is no step.
- the back surface 34b and the side surfaces facing the lower arm portion 10L are covered with the resin molded body 32.
- one surface 34 a is exposed from one surface 32 a of the resin molded body 32. Specifically, one surface 34a is substantially flush with one surface 32a.
- the first heat sinks 36U and 36L of the one surface 34a of the lead frame 34 are exposed portions 36Ua and 36La exposed from the one surface 32a of the resin molded body 32. That is, the exposed portions 36Ua and 36La are heat radiating surfaces.
- the solder 44 is also sealed with the resin molded body 32.
- second heat sinks 48U and 48L are arranged on the opposite sides of the arm portions 10U and 10L from the first heat sinks 36U and 36L via terminals 46U and 46L.
- the terminals 46U and 46L are for securing a predetermined interval between the arm portions 10U and 10L and the second heat sinks 48U and 48L in order to connect the bonding wires 62 to the control electrodes 30U and 30L. Since the terminals 46U and 46L relay the arm portions 10U and 10L and the second heat sinks 48U and 48L thermally and electrically, a metal material having at least thermal conductivity and electrical conductivity is used as a constituent material thereof. And good.
- Each terminal 46U, 46L has a shape and a size corresponding to the emitter electrodes 18U, 18L, and has a rectangular parallelepiped shape in this embodiment.
- the terminal 46U on the upper arm side is disposed to face the emitter electrode 18U of the upper arm portion 10U, and is connected to the emitter electrode 18U via the solder 50.
- the terminal 46L on the lower arm side is disposed to face the emitter electrode 18L of the lower arm portion 10L, and is connected to the emitter electrode 18L through the solder 50.
- the terminals 46U and 46L and the solder 50 are also sealed with the resin molded body 32.
- the upper arm side second heat sink 48U is connected to the surface of the upper arm side terminal 46U opposite to the upper arm portion 10U via the solder 52.
- the lower arm side second heat sink 48L is connected to the surface of the lower arm side terminal 46L opposite to the lower arm portion 10L via the solder 52.
- the second heat sinks 48U and 48L are also formed using at least a metal material in order to ensure thermal conductivity and electrical conductivity.
- a metal material excellent in thermal conductivity and electrical conductivity such as copper, copper alloy, and aluminum alloy can be used.
- the second heat sinks 48U and 48L have substantially the same thickness.
- Each second heat sink 48U, 48L has substantially the same shape and size as the first heat sinks 36U, 36L. That is, the entire arm portions 10U and 10L are arranged in the opposing region of the first heat sinks 36U and 36L and the second heat sinks 48U and 48L within the plane defined by the X direction and the Y direction.
- the facing surface and the side surface of the upper arm portion 10U (terminal 46U) are covered with the resin molded body 32.
- the surface opposite to the facing surface is exposed from the back surface 32 b of the resin molded body 32.
- the opposing surface and side surface of the second heat sink 48L facing the lower arm portion 10L (terminal 46L) are covered with the resin molded body 32.
- the surface opposite to the facing surface is exposed from the back surface 32 b of the resin molded body 32.
- the surfaces of the second heat sinks 48U and 48L opposite to the arm portions 10U and 10L are exposed portions 48Ua and 48La exposed from the resin molded body 32. That is, the exposed portions 48Ua and 48La are heat dissipation surfaces.
- the exposed portions 48Ua and 48La are substantially flush with the back surface 32b.
- the second heat sinks 48 ⁇ / b> U and 48 ⁇ / b> L have a substantially rectangular shape, and two sides of the rectangle are substantially parallel to the X direction and the remaining two sides are substantially parallel to the Y direction. Yes.
- the protrusion part 48Ub protrudes in the Y direction from one of the sides substantially parallel to the X direction in the second heat sink 48U on the upper arm side.
- the protrusion 48Lb protrudes from the second heat sink 48L on the lower arm side on the same side as the protrusion 48Ub.
- These protrusions 48Ub and 48Lb are portions that are electrically connected to a part of the plurality of main terminals 40.
- the protrusions 48Ub and 48Lb are thinner than the second heat sinks 48U and 48L and are sealed by the resin molded body 32.
- the first arm heat sink 36L on the lower arm side and the second heat sink 48U on the upper arm side are electrically connected by the relay portion 54.
- the protruding portion 54a protrudes from the end on the upper arm side in the X direction of the first heat sink 36L to the upper arm side.
- the protruding portion 54b protrudes from the lower arm side end of the second heat sink 48U in the X direction to the lower arm side.
- these protrusion parts 54a and 54b are connected via the solder 54c, and the relay part 54 is comprised.
- the relay part 54 electrically connects the emitter electrode 18U of the IGBT element 12U and the collector electrode 16L of the IGBT element 12L, and the upper and lower arms are substantially N-shaped as shown in FIG.
- the relay portion 54 is sealed with the resin molded body 32.
- the protrusion 54b on the second heat sink 48U side extends along the X direction.
- the protrusion 54a on the first heat sink 36L side extends in the X direction and is bent in the middle to extend in the Z direction.
- the main terminal 40 of the lead frame 34 is extended to the outside of the resin molded body 32 from one side surface 32c of the resin molded body 32 having a substantially planar shape. That is, a part thereof is sealed with the resin molded body 32.
- Each main terminal 40 extends in the Y direction and is arranged side by side in the X direction. Furthermore, in the Z direction, it is bent in the middle of the longitudinal direction so as to extend from a position between the one surface 32a and the back surface 32b.
- the main terminal 40 includes a power supply terminal 40p, a ground terminal 40n, and output terminals 40o1 and 40o2.
- the power supply terminal 40p is a terminal (so-called P terminal) for connecting the collector electrode 16U of the upper arm portion 10U to the high potential power supply line 22. As shown in FIGS. 5 and 6, the power terminal 40p is connected to the first heat sink 36U on the upper arm side, and extends in the Y direction from one side of the first heat sink 36U having a substantially planar shape. Yes.
- the ground terminal 40n is a terminal (so-called N terminal) for connecting the emitter electrode 18L of the lower arm portion 10L to the low potential power supply line 24.
- the ground terminal 40n is disposed next to the power supply terminal 40p.
- the ground terminal 40n is electrically connected to the protrusion 48Lb of the second heat sink 48L on the lower arm side through solder (not shown).
- the output terminal 40o1 is a terminal (so-called O terminal) for connecting the emitter electrode 18U of the upper arm portion 10U to the output line 26.
- the output terminal 40o1 is arranged next to the power supply terminal 40p so as to sandwich the power supply terminal 40p with the ground terminal 40n.
- the output terminal 40o1 is electrically connected to the protruding portion 48Ub of the second heat sink 48U on the upper arm side through solder (not shown).
- the output terminal 40o2 is a terminal (so-called O terminal) for connecting the collector electrode 16L of the lower arm portion 10L to the output line 26.
- the output terminal 40o2 is connected to the first heat sink 36L on the lower arm side, and extends in the Y direction from one side of the first heat sink 36L having a substantially rectangular planar shape.
- the control terminals 42U and 42L extend from the side surface 32d opposite to the side surface 32c of the resin molded body 32 to the outside of the resin molded body 32. That is, a part thereof is sealed with the resin molded body 32.
- the control terminals 42U and 42L are extended in the Y direction and arranged side by side in the X direction. Furthermore, in the Z direction, it is bent in the middle of the longitudinal direction so as to extend from a position between the one surface 32a and the back surface 32b.
- the control terminal 42U on the upper arm side in addition to the gate terminal 28U on the upper arm side, outputs a drive signal for the gate electrode 20U with a driver IC 60U for temperature sensing, current sensing, Kelvin emitter, power supply, test mode setting. It has input terminals for generating and error checking terminals.
- a part of the plurality of control terminals 42U is connected to the island 38U on the upper arm side.
- a total of ten control terminals 42U are provided, two of which are connected to the island 38U.
- the second and ninth control terminals 42U in the X direction are connected so as to sandwich the island 38U between both ends in the X direction.
- the control terminal 42L on the lower arm side in addition to the gate terminal 28L on the upper and lower arms side, outputs a drive signal for the gate electrode 20L with the driver IC 60L for temperature sensing, current sensing, Kelvin emitter, power supply, test mode setting. It has input terminals for generating and error checking terminals.
- a part of the plurality of control terminals 42L is connected to the island 38L on the lower arm side.
- a total of ten control terminals 42L are provided, two of which are connected to the island 38L.
- the second and ninth control terminals 42L in the X direction are connected so as to sandwich the island 38L in the X direction.
- connection terminals 42a the control terminals 42U and 42L connected to the islands 38U and 38L are referred to as connection terminals 42a.
- the islands 38U and 38L and the control terminals 42U and 42L have substantially the same thickness.
- symbol 56 shown in FIG.2, FIG.5 and FIG.6 is a suspension lead.
- the suspension lead 56 is a part that connects the first heat sinks 36U and 36L to the outer peripheral frame of the lead frame 34.
- a plurality of concave portions 32e are provided on the side surfaces 32c and 32d of the resin molded body 32.
- the recess 32e is provided in a portion between the adjacent main terminals 40.
- the concave portion 32e is provided in a portion between the control terminal 42U and the control terminal 42L, and a portion between the control terminals 42U and 42L and the suspension lead 56. For example, a creepage distance can be earned by the recess 32e.
- a driver IC 60U is mounted on the island 38U on the upper arm side via a solder 58, for example.
- a driver IC 60L is mounted on the island 38L on the lower arm side via a solder 58 (not shown).
- These driver ICs 60U and 60L constitute the driver 104, and a single-sided electrode element such as a MOSFET is formed on a semiconductor chip in order to control driving of elements formed in the corresponding arm portions 10U and 10L. .
- the driver ICs 60U and 60L are thicker than the arm portions 10U and 10L. These driver ICs 60U and 60L correspond to a second semiconductor chip.
- Electrodes are formed on the surfaces of the driver ICs 60U and 60L opposite to the islands 38U and 38L, and bonding wires 62 are connected to the electrodes.
- the control electrodes 30U and 30L of the arm portions 10U and 10L and the corresponding driver ICs 60U and 60L are connected by the bonding wires 62, respectively.
- This bonding wire 62 corresponds to a first bonding wire.
- the driver ICs 60U and 60L are connected to corresponding control terminals 42U and 42L via bonding wires 64.
- This bonding wire 64 corresponds to a second bonding wire.
- passive components 68 such as a chip resistor and a chip capacitor are mounted on the control terminals 42U and 42L via a joining member 66.
- the passive component 68 is mounted in each arm so as to electrically connect the plurality of control terminals 42U and 42L.
- the passive component 68 is a two-terminal chip component, and is mounted so as to bridge two adjacent control terminals 42U and 42L as shown in FIG. Specifically, the connecting terminal 42a and the control terminals 42U and 42L located adjacent to the connecting terminal 42a are mounted so as to be bridged.
- the passive component 68 is mounted in order to suppress noise transmitted from the control terminals 42U and 42L to the driver ICs 60U and 60L, for example. Therefore, it is preferable that the control terminals 42U and 42L are mounted in the vicinity of the driver ICs 60U and 60L.
- the passive component 68 has a small application area of the joining member 66, and when fluxless solder is used, the solder hardly spreads the electrodes of the passive component 68. For this reason, as the joining member 66, a material that can be joined by heating in the second reflow process, for example, solder containing flux or Ag paste can be used. In such a joining member 66, the scattering of flux, outgas, fume, and the like is not a little caused by heating. In the present embodiment, solder containing flux is used as the joining member 66. On the other hand, in the semiconductor device 10, flexless solder is used as the solders 44, 50, 52 and 58 to be joined before wire bonding.
- the semiconductor device 10 configured as described above is cooled by a cooler having a passage through which a refrigerant flows.
- coolers are disposed on both sides of the semiconductor device 10 in the Z direction, and the semiconductor device 10 is cooled from both sides 32a and 32b.
- An insulating sheet is attached to one surface 32a and the back surface 32b of the resin molded body 32 so as to cover the exposed portions 36Ua, 36La, 48Ua, and 48La, and the semiconductor device 10 is connected to the cooler via the insulating sheet. Sandwiched between.
- the lead frame 34 is formed by punching a metal plate into a predetermined shape and partially bending it. Specifically, the islands 38U and 38L are depressed in order to minimize the step in the Z direction between the control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L.
- the portions of the islands 38U and 38L are more than the portions of the first heat sinks 36U and 36L and the passive component mounting portions of the control terminals 42U and 42L. It is made to become a position near one side 32a. That is, in the back surface 34b, the islands 38U and 38L are recessed toward the one surface 32a side of the resin molded body 32 with respect to the first heat sinks 36U and 36L and the passive component mounting portions of the control terminals 42U and 42L. ing.
- control electrode forming surfaces of the arm portions 10U and 10L and the electrode forming surfaces of the driver ICs 60U and 60L are formed in the Z direction as illustrated in FIG. It is almost the same. Further, as shown in FIGS. 7 and 8, the connecting terminal 42a is bent so that the islands 38U and 38L are recessed toward the one surface 32a between the connecting ends of the islands 38U and 38L and the passive component mounting portion. Part 70.
- the passive component 68 is mounted on the control terminals 42U and 42L on the one surface 34a of the lead frame 34.
- the distance in the Z direction between one surface 34a of the lead frame 34 and one surface 32a of the resin molded body 32 is longer at the distance L1 at the passive component mounting portion of the control terminals 42U and 42L than at the distance L2 at the islands 38U and 38L. Yes. For this reason, a sufficient clearance is secured between the passive component 68 and the one surface 32a of the resin molded body 32 while adopting a structure in which the passive component 68 is mounted on the one surface 34a.
- each element constituting the semiconductor device 10 is prepared. Specifically, the arm portions 10U and 10L, the lead frame 34, the terminals 46U and 46L, the second heat sinks 48U and 48L, the driver ICs 60U and 60L, and the passive component 68 are prepared.
- a lead frame 34 having a first heat sink 36U, 36L, islands 38U, 38L, a main terminal 40, and control terminals 42U, 42L is prepared. Further, on the back surface 34b, the islands 38U and 38L are positioned closer to the one surface 32a of the resin molded body 32 than the first heat sinks 36U and 36L and the passive component mounting portions of the control terminals 42U and 42L.
- a bent lead frame 34 is prepared. That is, the lead frame 34 that is bent so that the step in the Z direction between the control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L is as small as possible is prepared. In particular, in the present embodiment, a lead frame 34 that is bent so as to hardly cause the step is prepared.
- Such a lead frame 34 is obtained, for example, by bending the islands 38U and 38L from the back surface 34b so as to push down the first heat sinks 36U and 36L and the passive component mounting portions of the control terminals 42U and 42L. Can do.
- the lead frame 34 described above can be obtained by bending between the connection end of the connection terminal 42a with the islands 38U and 38L and the passive component mounting portion.
- the bent portion of the connecting terminal 42a is the bent portion 70 described above.
- symbol 72 shown in FIG. 9 is an outer periphery frame of the lead frame 34, and the code
- the first reflow process is performed.
- the intervening solder 50 is reflowed.
- the solder 58 interposed between the driver ICs 60U and 60L and the corresponding islands 38U and 38L is also reflowed.
- the lead frame 34, the arm portions 10U and 10L, the terminals 46U and 46L, and the driver ICs 60U and 60L are integrated to form a connection body 76.
- solders 50 and 52 are preliminarily soldered (welding solder) to both surfaces of each terminal 46U and 46L.
- the solder 52 is arranged with a large margin.
- foil-like solder 44 is disposed on the back surface 34b of the lead frame 34 and on the first heat sinks 36U and 36L, respectively, and the collector electrodes 16U and 16L are opposed to the arm 44 with the collector electrodes 16U and 16L facing each other. , 10L.
- the terminals 46U and 46L are arranged so as to face the emitter electrodes 18U and 18L of the arm portions 10U and 10L, respectively.
- foil-like solder 58 is arranged, and driver ICs 60 U and 60 L are arranged on the solder 58, respectively.
- each solder 44,50,52,58 is reflowed.
- the solder 52 does not yet have the second heat sinks 48U and 48L to be connected, and therefore has a shape that rises with the centers of the terminals 46U and 46L as vertices due to surface tension.
- solders 44, 50, 52, 58 fluxless solder is used. For this reason, in the first reflow step, scattering of flux, outgas, fume and the like does not occur.
- solder 58 it is good to use the solder which does not melt
- solder that melts in the second reflow process may be used. Even when melted, the solder has a high viscosity and is supported by the bonding wire 62, so that the drop of the driver ICs 60U and 60L can be suppressed.
- the wire bonding process is performed.
- the control electrodes 30U and 30L of the arm portions 10U and 10L and the corresponding electrodes of the driver ICs 60U and 60L are connected by bonding wires 62, respectively.
- the electrodes of the driver ICs 60U and 60L and the corresponding control terminals 42U and 42L are connected by bonding wires 64, respectively.
- the step in the Z direction between the control electrode formation surface of the arm portions 10U and 10L and the electrode formation surface of the driver ICs 60U and 60L is reduced.
- the control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L are substantially flush with each other in the Z direction. For this reason, connection failure of the bonding wire 62 due to a step can be suppressed.
- the arm portions 10U and 10L and the driver ICs 60U and 60L can be brought closer in the Y direction even if the connection angle of the wire 62 is about 40 ° to 50 ° ideal. . Therefore, an increase in the size of the semiconductor device 10 in the Y direction can be suppressed.
- the connection bodies are placed on the second heat sinks 48U and 48L so that the terminals 46U and 46L face the corresponding second heat sinks 48U and 48L via the solder 52.
- 76 is arranged. That is, the connection body 76 is inverted from the state of the first reflow process (and the wire bonding process) and disposed on the second heat sinks 48U and 48L.
- the solder 54c is arrange
- solder containing flux for example, is disposed as the joining member 66 at a predetermined value of the control terminals 42U and 42L, and the passive component 68 is disposed on the joining member 66.
- the solder 44, 50, 52, 54c is reflowed.
- the connecting body 76 and the second heat sinks 48U and 48L are connected while the distance between the exposed portions of the first heat sinks 36U and 36L and the second heat sinks 48U and 48L is set to a predetermined distance. can do.
- the joining member 66 also reflows, and the passive component 68 is mounted on the control terminals 42U and 42L on the one surface 34a of the lead frame 34. Reflow may be performed while applying pressure from the first heat sinks 36U and 36L.
- a molding process for molding the resin molded body 32 is performed.
- the connection structure obtained in the second reflow process is placed in a mold (not shown), and resin is injected into the cavity of the mold to mold the resin molded body 32.
- the resin molded body 32 is molded by a transfer molding method using an epoxy resin.
- a cutting process is performed as necessary, and the outer peripheral frame 72 and the tie bar 74 of the lead frame 34 are removed, whereby the semiconductor device 10 can be obtained.
- the removal of unnecessary portions can also be performed before the cutting process.
- cutting of flattening the one surface 32a and the back surface 32b of the resin molded body 32, or cutting the heat sinks 36U, 36L, 48U, and 48L together with the resin molded body 32, is performed for each exposed portion 36Ua, 36La, 48Ua, and 48La.
- the one surface 32a and the back surface 32b may be flat.
- the cutting process is performed after the molding process.
- the heat sinks 36U, 36L, 48U, and 48L are cut together with the resin molded body 32, and the exposed surface 36Ua, 36La, 48Ua, and 48La are flattened on the one surface 32a and the back surface 32b. Therefore, the exposed portions 36Ua and 36La and the one surface 32a are substantially flush, and the exposed portions 48Ua and 48La and the back surface 32b are also substantially flush.
- the bonding wire 62 has a shape limitation. For example, when the connection angle is about 40 to 50 °, connection failure can be reduced. If the step difference in the Z direction between the control electrode formation surface of the arm portions 10U and 10L and the electrode formation surface of the driver ICs 60U and 60L is large, the control electrode formation surface and the electrode formation in the Y direction can be connected at a predetermined connection angle You must keep away from the surface. Therefore, the size of the semiconductor device 10 increases in the Y direction.
- the islands 38U and 38L are located closer to the one surface 32a of the resin molded body 32 than the first heat sinks 36U and 36L.
- a bent lead frame 34 is used.
- the connection surface of the bonding wire 62 can be brought close to the arm portions 10U and 10L and the driver ICs 60U and 60L. That is, the step difference between the control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L can be reduced. Therefore, an increase in the size of the semiconductor device 10 can be suppressed in the Y direction.
- control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L are brought close to each other in the Z direction, it is possible to suppress defects when the bonding wires 62 are connected. Furthermore, since the control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L are brought close to each other in the Z direction and the Y direction, the connection length of the bonding wire 62 can be shortened. Thereby, the defect which arises when the bonding wire 62 is pushed by resin in a shaping
- the driver ICs 60U and 60L are mounted on the back surface 34b of the lead frame 34, and the passive component 68 is mounted on the one surface 34a. Therefore, even if flux-containing solder, Ag paste, or the like is used as the joining member 66 of the passive component 68, it is possible to suppress the occurrence of poor connection of the bonding wires 62 and 64 due to the scattering of the flux or the like.
- the leads 38B and 38L are bent so that the portions closer to the one surface 32a of the resin molded body 32 than the passive component mounting portions of the control terminals 42U and 42L.
- Frame 34 is used. For this reason, the distance in the Z direction between the one surface 34a of the lead frame 34 and the one surface 32a of the resin molded body 32 is greater in the distance L1 in the passive component mounting portion of the control terminals 42U and 42L than in the distance L2 in the islands 38U and 38L. become longer.
- a predetermined clearance can be secured between the one surface 32a and the passive component 68, and the passive component 68 is exposed from the resin molded body 32, or the resin covering the passive component 68 is thin, and a void is generated. Can be suppressed. Therefore, the passive component 68 can be mounted on the one surface 34 a side of the lead frame 34.
- the one surface 34a of the lead frame 34 is located above the back surface 34b due to the inversion of the connecting body 76. Therefore, in the inverted connection body 76, the passive component 68 can be disposed on the one surface 34a of the control terminals 42U and 42L via the joining member 66. And the passive component 68 can be mounted by the heating of a 2nd reflow process. Thus, the passive component 68 can be mounted in the second reflow process without adding a manufacturing process. Further, since the passive component 68 is mounted after the wire bonding process, it is possible to more reliably suppress the occurrence of connection failure between the bonding wires 62 and 64 due to scattering of flux or the like.
- control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L are substantially flush with each other in the Z direction.
- step difference in the connection surfaces of the bonding wire 62 the increase in a physique can be suppressed more effectively.
- poor connection of the bonding wire 62 due to a step can be more effectively suppressed.
- defects caused by the bonding wire 62 being pressed by the resin in the molding process can be more effectively suppressed.
- the bonding wires are connected to the second heat sinks 48U and 48L. 62 may come into contact with each other, resulting in poor connection.
- the interval between the second heat sinks 48U and 48L and the arm portions 10U and 10L must be widened, and it is difficult to reduce the size in the Z direction.
- control electrode formation surfaces of the arm portions 10U and 10L and the electrode formation surfaces of the driver ICs 60U and 60L are substantially flush with each other in the Z direction, and thus the second heat sinks 48U and 48L.
- the size of the body can be reduced in the Z direction while suppressing the contact of the bonding wire 62.
- the exposed portions 36Ua and 36La of the first heat sinks 36U and 36L are exposed from the one surface 32a of the resin molded body 32. Therefore, the heat generated by the arm portions 10U and 10L can be efficiently radiated to the outside of the semiconductor device 10.
- the exposed portions 36Ua and 36La and the one surface 32a are substantially flush, and the exposed portions 48Ua and 48La and the back surface 32b are also substantially flush. Further, the exposed portions 36Ua and 36La and the exposed portions 48Ua and 48La are substantially parallel. Therefore, heat can be efficiently radiated to the coolers disposed on both sides of the semiconductor device 10.
- connection terminals 42a among the plurality of control terminals 42U and 42L are connected to the islands 38U and 38L.
- the connecting terminal 42a has a bent portion 70 for recessing the islands 38U, 38L between the connecting ends of the islands 38U, 38L and the mounting portion of the passive component 68.
- the lead frame 34 is provided in a bent portion in a portion other than the control terminals 42U and 42L, for example, the suspension lead, the control terminals 42U and 42L and the first heat sinks 36U and 36L must be disposed avoiding the suspension lead. I must. Therefore, according to the above, the size of the semiconductor device 10 can be reduced.
- the semiconductor device 10 has the terminals 46U and 46L.
- a configuration without the terminals 46U and 46L may be adopted.
- protrusions corresponding to terminals may be provided on the second heat sinks 48U and 48L.
- the main terminal 40 has the two output terminals 40o1 and 40o2 is shown.
- the heat sinks 36U, 36L, 48U, and 48L have the exposed portions 36Ua, 36La, 48Ua, and 48La is shown.
- the heat sinks 36U, 36L, 48U, and 48L may be completely sealed by the resin molded body 30, that is, the exposed portions 36Ua, 36La, 48Ua, and 48La may be covered by the resin molded body 32.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE112015001398.9T DE112015001398B4 (de) | 2014-03-26 | 2015-03-23 | Halbleitervorrichtung und Verfahren zum Herstellen derselben |
| CN201580015859.2A CN106133906B (zh) | 2014-03-26 | 2015-03-23 | 半导体装置及其制造方法 |
| US15/128,126 US9935074B2 (en) | 2014-03-26 | 2015-03-23 | Semiconductor device and method for manufacturing same |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014064193A JP6256145B2 (ja) | 2014-03-26 | 2014-03-26 | 半導体装置及びその製造方法 |
| JP2014-064193 | 2014-03-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2015146130A1 true WO2015146130A1 (ja) | 2015-10-01 |
Family
ID=54194680
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2015/001622 Ceased WO2015146130A1 (ja) | 2014-03-26 | 2015-03-23 | 半導体装置及びその製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9935074B2 (enExample) |
| JP (1) | JP6256145B2 (enExample) |
| CN (1) | CN106133906B (enExample) |
| DE (1) | DE112015001398B4 (enExample) |
| WO (1) | WO2015146130A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2024080226A (ja) * | 2022-12-02 | 2024-06-13 | 三菱電機株式会社 | 半導体装置および回路基板 |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6595325B2 (ja) * | 2015-12-04 | 2019-10-23 | トヨタ自動車株式会社 | 半導体装置 |
| JP6358296B2 (ja) * | 2016-08-05 | 2018-07-18 | トヨタ自動車株式会社 | 半導体モジュールの製造方法 |
| JP6610568B2 (ja) * | 2017-01-16 | 2019-11-27 | 株式会社デンソー | 半導体装置 |
| JP6512231B2 (ja) * | 2017-01-27 | 2019-05-15 | トヨタ自動車株式会社 | 半導体装置 |
| JP6874467B2 (ja) * | 2017-03-29 | 2021-05-19 | 株式会社デンソー | 半導体装置とその製造方法 |
| US10607857B2 (en) * | 2017-12-06 | 2020-03-31 | Indium Corporation | Semiconductor device assembly including a thermal interface bond between a semiconductor die and a passive heat exchanger |
| JP7147187B2 (ja) * | 2018-03-06 | 2022-10-05 | 株式会社デンソー | 半導体装置 |
| US10991670B2 (en) * | 2018-09-28 | 2021-04-27 | Semiconductor Components Industries, Llc | Semiconductor device assemblies including spacer with embedded semiconductor die |
| JP7109347B2 (ja) * | 2018-12-03 | 2022-07-29 | 三菱電機株式会社 | 半導体装置および電力変換装置 |
| JP7095632B2 (ja) * | 2019-03-11 | 2022-07-05 | 株式会社デンソー | 半導体装置 |
| DE212021000239U1 (de) * | 2020-10-14 | 2022-06-07 | Rohm Co., Ltd. | Halbleitermodul |
| DE112021002397T5 (de) | 2020-10-14 | 2023-02-09 | Rohm Co., Ltd. | Halbleitermodul |
| JP7594950B2 (ja) * | 2021-03-17 | 2024-12-05 | ローム株式会社 | 半導体装置 |
| JP7666175B2 (ja) * | 2021-06-30 | 2025-04-22 | 住友電気工業株式会社 | 半導体装置およびパッケージ |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006032470A (ja) * | 2004-07-13 | 2006-02-02 | Denso Corp | 電子装置 |
| JP2008027994A (ja) * | 2006-07-19 | 2008-02-07 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2008218688A (ja) * | 2007-03-05 | 2008-09-18 | Denso Corp | 半導体装置 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4037589B2 (ja) | 2000-03-07 | 2008-01-23 | 三菱電機株式会社 | 樹脂封止形電力用半導体装置 |
| US6744121B2 (en) * | 2001-04-19 | 2004-06-01 | Walton Advanced Electronics Ltd | Multi-chip package |
| TWI245399B (en) * | 2004-03-11 | 2005-12-11 | Advanced Semiconductor Eng | Leadframe with die pad |
| JP2006308543A (ja) * | 2005-03-31 | 2006-11-09 | Fujitsu Media Device Kk | 角速度センサ |
| JP4888085B2 (ja) | 2006-11-29 | 2012-02-29 | 株式会社デンソー | 半導体装置の製造方法 |
| JP5163069B2 (ja) | 2007-11-20 | 2013-03-13 | 株式会社デンソー | 半導体装置 |
| US20100193920A1 (en) * | 2009-01-30 | 2010-08-05 | Infineon Technologies Ag | Semiconductor device, leadframe and method of encapsulating |
| JP5380376B2 (ja) * | 2010-06-21 | 2014-01-08 | 日立オートモティブシステムズ株式会社 | パワー半導体装置 |
| US8497572B2 (en) | 2010-07-05 | 2013-07-30 | Denso Corporation | Semiconductor module and method of manufacturing the same |
| JP2012069640A (ja) * | 2010-09-22 | 2012-04-05 | Toshiba Corp | 半導体装置及び電力用半導体装置 |
| JP5582040B2 (ja) | 2011-01-12 | 2014-09-03 | 富士電機株式会社 | 半導体装置の製造方法、半導体装置およびイグナイタ装置 |
| CN102157500A (zh) * | 2011-03-04 | 2011-08-17 | 南通富士通微电子股份有限公司 | 半导体封装 |
| US9129931B2 (en) * | 2011-03-24 | 2015-09-08 | Mitsubishi Electric Corporation | Power semiconductor module and power unit device |
| JP5985877B2 (ja) * | 2012-04-27 | 2016-09-06 | ラピスセミコンダクタ株式会社 | 半導体装置及び計測機器 |
| US20140210062A1 (en) * | 2013-01-28 | 2014-07-31 | Texas Instruments Incorporated | Leadframe-Based Semiconductor Package Having Terminals on Top and Bottom Surfaces |
-
2014
- 2014-03-26 JP JP2014064193A patent/JP6256145B2/ja active Active
-
2015
- 2015-03-23 WO PCT/JP2015/001622 patent/WO2015146130A1/ja not_active Ceased
- 2015-03-23 US US15/128,126 patent/US9935074B2/en active Active
- 2015-03-23 DE DE112015001398.9T patent/DE112015001398B4/de active Active
- 2015-03-23 CN CN201580015859.2A patent/CN106133906B/zh active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006032470A (ja) * | 2004-07-13 | 2006-02-02 | Denso Corp | 電子装置 |
| JP2008027994A (ja) * | 2006-07-19 | 2008-02-07 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2008218688A (ja) * | 2007-03-05 | 2008-09-18 | Denso Corp | 半導体装置 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2024080226A (ja) * | 2022-12-02 | 2024-06-13 | 三菱電機株式会社 | 半導体装置および回路基板 |
Also Published As
| Publication number | Publication date |
|---|---|
| DE112015001398T5 (de) | 2016-12-22 |
| US20170103962A1 (en) | 2017-04-13 |
| CN106133906A (zh) | 2016-11-16 |
| CN106133906B (zh) | 2018-11-09 |
| US9935074B2 (en) | 2018-04-03 |
| DE112015001398B4 (de) | 2022-11-10 |
| JP2015185832A (ja) | 2015-10-22 |
| JP6256145B2 (ja) | 2018-01-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6256145B2 (ja) | 半導体装置及びその製造方法 | |
| JP5279632B2 (ja) | 半導体モジュール | |
| JP4581885B2 (ja) | 半導体装置 | |
| US9673118B2 (en) | Power module and method of manufacturing power module | |
| CN108565254B (zh) | 半导体模块 | |
| US9831160B2 (en) | Semiconductor device | |
| JP7100569B2 (ja) | 半導体モジュール、電力変換装置および半導体モジュールの製造方法 | |
| JP6295768B2 (ja) | 半導体装置の製造方法 | |
| JP5659938B2 (ja) | 半導体ユニットおよびそれを用いた半導体装置 | |
| WO2012137685A1 (ja) | 半導体装置およびその製造方法 | |
| JP6685470B2 (ja) | 半導体装置およびその製造方法、ならびに電力変換装置 | |
| CN103534796A (zh) | 半导体装置和半导体装置的制造方法 | |
| WO2018131276A1 (ja) | 半導体装置 | |
| JP6230238B2 (ja) | 半導体装置及びその製造方法 | |
| JP7074046B2 (ja) | 半導体装置とその製造方法 | |
| CN114503255B (zh) | 半导体装置 | |
| CN107112319B (zh) | 功率模块 | |
| JP2013094824A (ja) | 半導体装置 | |
| WO2020166255A1 (ja) | 半導体装置 | |
| JP6787118B2 (ja) | 半導体装置、電力変換装置、リードフレーム、および半導体装置の製造方法 | |
| JP4339660B2 (ja) | 半導体装置 | |
| JP7643186B2 (ja) | 半導体モジュールおよび半導体モジュールの製造方法 | |
| JP4978445B2 (ja) | リードフレームおよび半導体装置の製造方法 | |
| JP2022067902A (ja) | 電子装置および電子装置の製造方法 | |
| JP2023028804A (ja) | 半導体装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 15768127 Country of ref document: EP Kind code of ref document: A1 |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 15128126 Country of ref document: US |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 112015001398 Country of ref document: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 15768127 Country of ref document: EP Kind code of ref document: A1 |