JP6874467B2 - 半導体装置とその製造方法 - Google Patents
半導体装置とその製造方法 Download PDFInfo
- Publication number
- JP6874467B2 JP6874467B2 JP2017065283A JP2017065283A JP6874467B2 JP 6874467 B2 JP6874467 B2 JP 6874467B2 JP 2017065283 A JP2017065283 A JP 2017065283A JP 2017065283 A JP2017065283 A JP 2017065283A JP 6874467 B2 JP6874467 B2 JP 6874467B2
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- Prior art keywords
- jig
- semiconductor chip
- convex portion
- electrode
- lead frame
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- 239000004065 semiconductor Substances 0.000 title claims description 109
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 238000005304 joining Methods 0.000 claims description 28
- 229910000679 solder Inorganic materials 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 25
- 239000011347 resin Substances 0.000 claims description 24
- 229920005989 resin Polymers 0.000 claims description 24
- 238000012986 modification Methods 0.000 description 12
- 230000004048 modification Effects 0.000 description 12
- 230000017525 heat dissipation Effects 0.000 description 11
- 230000002093 peripheral effect Effects 0.000 description 10
- 239000000758 substrate Substances 0.000 description 9
- 238000007796 conventional method Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 239000011265 semifinished product Substances 0.000 description 3
- 235000014676 Phragmites communis Nutrition 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000012447 hatching Effects 0.000 description 2
- 238000005336 cracking Methods 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
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- Engineering & Computer Science (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Die Bonding (AREA)
Description
14 :ダイパッド
16 :放熱板
18 :位置決め用凸部
20 :接合用凸部
22 :タイバー
23 :吊りリード
26 :信号端子
28a〜28c:主端子
30 :治具
40 :半導体チップ
42 :半導体基板
44 :エミッタ電極
46 :信号電極
48 :コレクタ電極
50 :はんだ層
60 :コレクタ端子
70 :絶縁樹脂層
Claims (6)
- 治具を用いて半導体チップをリードフレームに接続することによって半導体装置を製造する方法であって、
前記半導体チップが、一つの面に主電極を有し、
前記リードフレームが、接合用凸部と、前記接合用凸部の周囲に配置された凸形状または凹形状によって構成された位置決め部を有し、
前記方法が、
前記接合用凸部と前記治具の間に間隔を開けた状態で前記治具を前記位置決め部に係合させる工程と、
前記治具を前記半導体チップに係合させる工程と、
前記治具が前記位置決め部と前記半導体チップに係合された状態で、前記接合用凸部を前記半導体チップの前記主電極にはんだを介して接続する工程、
を有する方法。 - 前記位置決め部が前記凸形状であり、
前記治具を前記位置決め部に係合させる前記工程では、前記治具の側面を前記凸形状の側面に接触させる、請求項1の方法。 - 前記位置決め部が前記凹形状であり、
前記治具を前記位置決め部に係合させる前記工程では、前記治具の側面を前記凹形状の側面に接触させる、請求項1の方法。 - 前記治具が前記位置決め部と前記半導体チップに係合された状態において、前記半導体チップと前記リードフレームの積層方向に沿って見たときに、前記接合用凸部の前記はんだに接続される領域全体が、前記主電極の輪郭の内側に配置される、請求項1〜3のいずれか一項の方法。
- 前記治具を前記位置決め部に係合させる前記工程の後に、前記治具を前記半導体チップに係合させる前記工程を実施する請求項1〜4のいずれか一項の方法。
- 前記主電極が、エミッタ電極であり、
前記半導体チップが、前記エミッタ電極と同一の面に設けられた信号電極と、前記エミッタ電極の反対側に位置する裏面に設けられたコレクタ電極を有し、
前記リードフレームが、前記接合用凸部と前記位置決め部を有する本体部と、前記本体部から伸びる信号端子を有しており、
前記方法が、
前記信号端子を前記信号電極に接続する工程と、
前記コレクタ電極にコレクタ端子を接続する工程と、
前記接合用凸部、前記信号端子及び前記コレクタ端子を前記半導体チップに接続した後に、前記半導体チップを覆う絶縁樹脂層を形成する工程と、
前記絶縁樹脂層を形成した後に、前記信号端子を前記本体部から切り離す工程、
をさらに有する請求項1〜5のいずれか一項の方法。
Priority Applications (9)
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JP2017065283A JP6874467B2 (ja) | 2017-03-29 | 2017-03-29 | 半導体装置とその製造方法 |
JP2018512232A JP7156025B2 (ja) | 2017-03-29 | 2018-02-16 | 半導体装置 |
PCT/JP2018/005584 WO2018179981A1 (ja) | 2017-03-29 | 2018-02-16 | 半導体装置 |
DE112018001743.5T DE112018001743T5 (de) | 2017-03-29 | 2018-02-16 | Halbleitervorrichtung |
CN201880021615.9A CN110520983A (zh) | 2017-03-29 | 2018-02-16 | 半导体装置 |
US16/491,328 US20200035588A1 (en) | 2017-03-29 | 2018-02-16 | Semiconductor device |
US15/902,479 US20180286702A1 (en) | 2017-03-29 | 2018-02-22 | Semiconductor device and method of manufacturing the same |
DE102018204668.9A DE102018204668A1 (de) | 2017-03-29 | 2018-03-27 | Halbleitervorrichtung und Verfahren einer Herstellung derselben |
CN201810263524.8A CN108695177B (zh) | 2017-03-29 | 2018-03-28 | 半导体装置及其制造方法 |
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US10541223B2 (en) * | 2017-05-05 | 2020-01-21 | Kulicke And Soffa Industries, Inc. | Methods of operating a wire bonding machine to improve clamping of a substrate, and wire bonding machines |
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JP6256145B2 (ja) * | 2014-03-26 | 2018-01-10 | 株式会社デンソー | 半導体装置及びその製造方法 |
JP6485397B2 (ja) * | 2016-04-04 | 2019-03-20 | 株式会社デンソー | 電子装置及びその製造方法 |
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JP6610590B2 (ja) * | 2017-03-21 | 2019-11-27 | トヨタ自動車株式会社 | 半導体装置とその製造方法 |
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- 2018-02-16 US US16/491,328 patent/US20200035588A1/en not_active Abandoned
- 2018-02-16 DE DE112018001743.5T patent/DE112018001743T5/de active Granted
- 2018-02-16 CN CN201880021615.9A patent/CN110520983A/zh active Pending
- 2018-02-16 WO PCT/JP2018/005584 patent/WO2018179981A1/ja active Application Filing
- 2018-02-16 JP JP2018512232A patent/JP7156025B2/ja active Active
- 2018-02-22 US US15/902,479 patent/US20180286702A1/en not_active Abandoned
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Also Published As
Publication number | Publication date |
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US20180286702A1 (en) | 2018-10-04 |
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CN110520983A (zh) | 2019-11-29 |
JP7156025B2 (ja) | 2022-10-19 |
DE112018001743T5 (de) | 2019-12-19 |
JP2018170348A (ja) | 2018-11-01 |
CN108695177B (zh) | 2021-11-02 |
US20200035588A1 (en) | 2020-01-30 |
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