WO2012137685A1 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- WO2012137685A1 WO2012137685A1 PCT/JP2012/058627 JP2012058627W WO2012137685A1 WO 2012137685 A1 WO2012137685 A1 WO 2012137685A1 JP 2012058627 W JP2012058627 W JP 2012058627W WO 2012137685 A1 WO2012137685 A1 WO 2012137685A1
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- circuit board
- lead frame
- terminal case
- terminal
- resin
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49537—Plurality of lead frames mounted in one device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/165—Containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Definitions
- the present invention relates to a semiconductor device in which a plurality of power semiconductor elements and a control integrated circuit for controlling the power semiconductor elements are mounted on an insulating circuit substrate, and a method for manufacturing the same.
- the present invention relates to a power semiconductor module formed by integrally packaging a circuit.
- Power semiconductor modules packaged independently from the main unit are used for semiconductor devices that electronically control inverter devices, uninterruptible power supply devices, machine tools, industrial robots, and the like.
- This power semiconductor module mounts a semiconductor chip as various power semiconductor elements such as an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor: hereinafter referred to as “IGBT”) constituting an electric power conversion circuit on an insulating circuit substrate.
- IGBT Insulated Gate Bipolar Transistor
- an integrated circuit for control for controlling the power semiconductor element is also mounted on an insulating circuit board and provided in the package, so that it is configured as an intelligent power module (IPM: Intelligent Power Module) (see, for example, Patent Document 1). .
- IPM Intelligent Power Module
- Such a power semiconductor module is generally configured as follows. First, a semiconductor chip is mounted on a circuit pattern on an insulating circuit board by soldering. Further, one end of the external terminal integrally formed with the terminal case is also joined to the circuit pattern on the insulating circuit board. Wire bonding is performed between the semiconductor chip and the circuit pattern, between the circuit pattern and the external terminal, or between the semiconductor chip and the external terminal using a metal wire, and a resin is injected into the terminal case and sealed. It is packaged by. In addition, the heat radiation surface provided on the opposite side of the terminal case to the mounting portion of the external terminal comes into contact with the heat radiation fins, so that the heat generated in the power semiconductor element can be radiated to the outside.
- a power semiconductor element semiconductor chip
- a control integrated circuit hereinafter referred to as a control IC
- a terminal case in which the lead frame is integrally formed by insert molding is prepared by setting the lead frame forming body in a predetermined mold and resin injection molding.
- an internal terminal and an external terminal are formed on each lead in advance by press working.
- the external terminals and the internal terminals of the integrally formed lead frame are connected to the terminal case with the control circuit (hereinafter referred to as a control IC) and an insulating circuit board on which a power semiconductor chip is mounted.
- a reflow soldering process is performed in contact with the solder layer. Therefore, by this single reflow soldering, the semiconductor chip is soldered onto the insulating circuit substrate, and at the same time, soldering to the internal terminals of each lead can be performed without performing wire bonding (Patent Document 1). reference).
- JP 2006-93255 A paragraph numbers [0009] to [0017], FIG. 1)
- the size of the insulating circuit board for mounting them is further reduced. For this reason, since the circuit pattern arrangement formed on the insulating circuit board is also changed, the soldering position for connecting the lead frame to the control IC and the power semiconductor chip is changed.
- the position of the internal terminal of the lead frame is changed according to the change in the circuit pattern arrangement of the insulating circuit board. Be changed. For this reason, the shape of the lead frame punched out by pressing is changed, and the position where the external terminal is led out must be changed accordingly. Therefore, there has been a problem that the position change occurs in the process of attaching the external terminal of the power semiconductor element to a control circuit board such as an inverter device, an uninterruptible power supply, a machine tool, or an industrial robot.
- a control circuit board such as an inverter device, an uninterruptible power supply, a machine tool, or an industrial robot.
- the present invention has been made in view of the above points, and a power semiconductor chip and a lead frame are simultaneously soldered on an insulating circuit board by a single reflow soldering, and a lead frame led out to the outside.
- An object is to provide a semiconductor device whose position is not changed.
- Another object of the present invention is to provide a method of manufacturing a semiconductor device that can efficiently manufacture a semiconductor device that includes a plurality of power semiconductor chips and in which a control integrated circuit is mounted on a control circuit board of a main body device. .
- an insulating circuit board on which a plurality of power semiconductor elements and a control integrated circuit for controlling the power semiconductor elements are mounted, one end side constitutes an external terminal, and the other end side is a semiconductor chip.
- a lead frame that constitutes an internal terminal connected to the terminal frame, and a terminal case that holds the internal terminal side of the lead frame, and the terminal case includes the insulating circuit board and the internal terminal side of the lead frame.
- a semiconductor device is provided which is accommodated and sealed in the terminal case with resin.
- a resin filling portion for resin-sealing is formed on the terminal case including a connection surface with the lead frame of the insulating circuit board, and the lead frame is connected to the inner surface of the resin filling portion.
- the lead-out position of the external terminal is held constant regardless of the connection position between the insulating circuit board and the lead frame in the terminal case.
- a method of manufacturing a semiconductor device comprising: mounting a plurality of power semiconductor elements and a control integrated circuit for controlling the power semiconductor elements on an insulating circuit board;
- the terminal case includes a substrate housing portion to which the insulating circuit substrate is attached, and a resin filling portion that is filled with resin.
- the semiconductor device and the manufacturing method thereof of the present invention even when the insulating circuit board is downsized, it is possible to cope without changing the size of the lead frame itself.
- the semiconductor device can be configured by incorporating insulating circuit boards of different sizes without changing the lead-out position of the lead frame, it is not necessary to change the position in the step of attaching it to the control circuit board.
- 2 is a flowchart showing an outline of a manufacturing process of a semiconductor device. It is a top view which shows the reflow soldering process which adhere
- FIG. 1 It is a figure which shows the shape of the terminal case for mounting
- FIG. 1 is a plan view showing a shape of an insulated circuit board on which a circuit pattern of a semiconductor device according to an embodiment is formed, and a front view thereof.
- the insulated circuit board 1 constituting the power semiconductor module a metal insulated board made of aluminum or copper is used as the main board.
- the planar shape of the insulated circuit board is not particularly limited, but in this example, it has a rectangular shape with a lateral width W1 and a longitudinal length W2 (> W1). This is adopted in order to increase the degree of freedom of arrangement of the lead frame as the external terminal by setting the side where the notch portions 1a and 1b described later are not provided in the long side direction. Further, if a predetermined distance (insulating distance) from the notch can be secured, the side where the notches 1a and 1b are provided may be the long side direction.
- An insulating layer is formed on the upper surface of the main body substrate.
- an insulating resin layer made of an epoxy resin containing a filler having a good thermal conductivity (powder such as aluminum nitride or silicon dioxide) is formed.
- the several metal pattern which consists of copper foil which comprises an electrode part and a wiring layer is formed on it.
- circuit components constituting the semiconductor device for example, a power semiconductor chip and its control IC are arranged at a predetermined position.
- Recessed notches 1a and 1b are formed on the two short sides of the insulating circuit board 1 in the front and rear, respectively, and these correspond to screw insertion holes of a terminal case (FIG. 7) described later. Further, in FIG. 1, since the electrodes and the wiring itself do not constitute the gist of the present invention, the metal pattern is shown in an example with a simplified shape, and the arrangement of the metal pattern can be changed as appropriate.
- the insulated circuit board 1 showed the example comprised as a metal insulation board
- a DCB (Direct Copper Bond) insulating substrate on which the circuit pattern is arranged may be used.
- FIG. 2 is a flowchart showing an outline of the manufacturing process of the semiconductor device.
- step numbers hereinafter, referred to as “S” indicating the respective manufacturing steps in FIG.
- S11 a power semiconductor chip and its control IC are prepared.
- a solder layer is screen-printed at a predetermined position on the metal pattern of the insulated circuit board 1.
- the power semiconductor chip and the control IC prepared in Step S11 are mounted at predetermined positions on the insulating circuit board 1.
- step S16 the pair of lead frame forming bodies 2a and 2b created in step S13 are arranged on the electrode parts arranged along the long side of the insulated circuit board 1.
- step S17 the process proceeds to step S17 to perform reflow soldering.
- steps S17 to S24 will be sequentially described with reference to FIGS.
- FIG. 3 is a plan view showing a reflow soldering process for bonding a lead frame or the like to an insulating circuit board.
- IGBTs 311 to 316, FWDs (Free Wheeling Diodes) 321 to 326 connected to the IGBTs in antiparallel, and four large and small control ICs 41 to 44 are respectively provided on the insulating circuit board 1. They are arranged separately on the left and right sides, and each is surface mounted.
- the lead frame forming body 2a is in a state where its internal terminal side is in contact with an electrode in the vicinity of the long side on the power semiconductor chip (IGBT 311 to 316, FWD 321 to 326) side.
- the frame forming bodies 2b are arranged in a state where the internal terminal side thereof is in contact with the electrodes near the long sides on the control ICs 41 to 44 side, and are reflow soldered.
- the insulating circuit board 1, the power semiconductor chips (IGBTs 311 to 316, FWDs 321 to 326), and the control ICs 41 to 44 are soldered, and at the same time, the insulating circuit board 1 and the lead frame forming bodies 2a and 2b are soldered. Is done.
- the back electrodes (not shown) of the IGBTs 311 to 316 and the FWDs 321 to 326 are connected to the metal pattern.
- the control ICs 41 to 44 molded ICs may be used, or bare chips may be mounted. At present, three control ICs 41 to 43 for the high side and one control IC 44 for the low side are used. However, the number of control ICs can be reduced by using a high voltage IC for them.
- FIG. 4 is a front view showing a bonding position relationship between the lead frame and the insulating circuit board in the reflow soldering process.
- the lead frame forming bodies 2a and 2b have a flat plate shape, and are bent at an angle of about 30 ° to 45 ° in advance at each internal terminal (inner lead) as shown in FIG. Further, as shown in FIG. 3, each of the pair of lead frame forming bodies 2a and 2b has a plurality of leads connected to each other by a tie bar 20 on the external terminal (outer lead) side.
- the reason why the soldered portions of the lead frame formed bodies 2a and 2b are slightly bent in advance is to prevent cracks from being generated in the bent portion during the primary bending process in step S20 described later.
- FIG. 5 is a plan view showing a wire bonding process.
- the metal patterns of the insulating circuit board 1 and the metal pattern and the power semiconductor chip are continuously connected by bonding wires.
- the IGBT 311 and the FWD 321 in succession, an antiparallel circuit of the IGBT 311 and the FWD 321 is formed.
- the IGBTs 312 to 316 and the FWDs 322 to 326 are continuously connected by bonding wires.
- signal system wires 51 to 56 and power system wires 61 to 66 have different diameters.
- the wire bonding of the signal system wires 51 to 56 having a small diameter is first performed, and then the power system terminals and the electrode pads are bonded to the power system wires 61 to 66 having a large diameter. This is because the static electricity accumulated in the gate terminals of the IGBTs 311 to 316 is released in advance by wire bonding. Further, it is preferable to bend at a certain angle rather than linearly connecting wires during bonding.
- FIG. 6 is a diagram showing an equivalent circuit of the power conversion circuit diagram configured on the insulating circuit board shown in FIG.
- the circuit shown in FIG. 6 is configured by the above soldering and wire bonding.
- INHU to INHV are input terminals to the high-side control ICs 41 to 43, to which control signals of the IGBTs 311 to 313 are input, respectively.
- INLU to INLW are input terminals to the control 44 for the low side, and control signals for the IGBTs 314 to 316 are input thereto.
- P and N are terminals connected to the positive and negative electrodes of the input DC power supply, U, V and W are output terminals.
- U, V and W are output terminals.
- FIG. 6 the power supply terminals, ground terminals, and other control terminals for the control ICs 41 to 44 are not shown, so the number of terminals does not match the plan view shown in FIG. 7A and 7B are diagrams showing the shape of a terminal case for mounting an insulated circuit board, where FIG. 7A is a plan view thereof, and FIG. 7B is a cross-sectional view taken along line BB in FIG. FIG.
- the terminal case 7 has a rectangular outer shape larger than that of the insulated circuit board 1 (indicated by an imaginary line in FIG. 1A), and a resin filling portion 71 and a substrate housing portion 72 are provided at the center of the main body 70. It is provided as a through hole 73 having a step shape in the direction. That is, the resin filling portion 71 and the substrate housing portion 72 are respectively formed on the upper and lower surfaces of the terminal case 7 and are connected by the through hole 73. Further, as shown in FIG. 7B, the width of the upper resin filling portion 71 is formed to be slightly larger than the width of the substrate housing portion 72, and the insulated circuit board 1 is accommodated in the state shown in FIG. I am doing so.
- the resin filling portion 71 of the terminal case 7 has grooves 70a and 70b each having an L-shaped cross section with a size corresponding to the thickness of the leads of the lead frame forming bodies 2a and 2b on the inner surfaces of the long sides.
- the insulating circuit board 1 is formed at a position corresponding to each lead position.
- the size of the board accommodating portion 72 of the terminal case 7 has a shape commensurate with the lateral width W1 and the longitudinal length W2 (see FIG. 1) of the insulating circuit board 1 attached thereto. Therefore, the insulation circuit board 1 is press-fitted into the board housing portion 72 of the terminal case 7 so that it can be firmly fitted without using an adhesive.
- the main body 70 of the terminal case 7 is formed with screw insertion holes 74a and 74b penetrating from the upper surface to the lower surface on a pair of opposing sides at positions aligned with the notches 1a and 1b of the insulating circuit board 1. ing.
- the temperature expansion coefficient of the terminal case 7 is formed with a material having a value larger than that of the insulating circuit board 1 at least. This is to prevent deformation of the insulating circuit board 1 press-fitted into the board housing portion 72 of the terminal case 7 after being assembled as a semiconductor device. Further, even if the terminal case 7 expands when the temperature rises to a temperature different from the assembly time (normal temperature), the adhesion strength with the insulating circuit board 1 is maintained by the resin filled as will be described later.
- FIG. 8 is a plan view showing the insulated circuit board after the primary bending process of bending the lead frame vertically.
- the lead frame forming bodies 2a and 2b are bent in the vicinity of the soldered portions of the respective internal terminals so as to be substantially perpendicular to the main surface of the insulated circuit board 1. Therefore, as shown in FIG. 9, when the insulating circuit board 1 is press-fitted into the board housing portion 72 formed on the lower surface of the terminal case 7, the external terminal (outer lead) side is moved from the resin filling portion 71 to the upper surface.
- the lead frame forming bodies 2a and 2b are arranged in a protruding state.
- FIG. 9 is a front view showing a process of attaching an insulating circuit board having a lead frame bonded to a terminal case.
- FIG. 9 shows a state immediately before the insulated circuit board 1 to which the lead frame forming bodies 2 a and 2 b are bonded is press-fitted into the board housing portion 72 of the terminal case 7.
- FIG. 10 is a front view showing a secondary bending step of bending the lead frame along the inner surface of the terminal case.
- step S22 the lead frame forming bodies 2a and 2b are subjected to secondary bending.
- step S22 of the secondary bending process it is further bent twice along the L-shaped grooves 70a and 70b formed on the inner surface of the resin filling portion 71 of the terminal case 7 from that state.
- the groove portions 70a and 70b of the terminal case 7 are bent in a direction parallel to the main surface of the insulated circuit board 1 to reach the L-shaped horizontal portion of the groove portions 70a and 70b, and then bent along the horizontal direction.
- the tips of the grooves 70a and 70b are bent in the vertical direction again by the L-shaped vertical portions.
- the lead frame forming bodies 2a and 2b whose tips rise vertically are constrained by the grooves 70a and 70b because the inner terminal side is fitted in the grooves 70a and 70b of the terminal case 7. For this reason, it is possible to prevent the internal terminal from falling in the long side direction of the terminal case (the front direction or the back direction with respect to the paper surface of FIG. 10).
- the lead frame forming bodies 2a and 2b are defined by the groove portions 70a and 70b of the terminal case 7 on the external terminal (outer lead) side, and the interval W0 ( ⁇ W1) at the bonding position is shown in FIG. It is deformed to a vertically upright state in a state of being separated to the interval W3 (> W1). Thereafter, the process proceeds to step S23, and the molten resin is filled in the resin filling portion 71 of the terminal case 7, whereby the metal pattern on the insulating circuit board 1, the signal wires 51 to 56, the power wires 61 to 66, etc. Protected and protected from outside air.
- the portions of the lead frame forming bodies 2a and 2b that are vertically raised from the insulated circuit board 1 are on the side walls of the portion connecting the resin filling portion 71 and the substrate housing portion 72 of the main body 70 of the terminal case 7. You will be in contact. Therefore, during the above-described secondary bending process, the lead frame forming bodies 2a and 2b are connected to the terminal case while keeping the bending angle (right angle) of the bent portion closest to the insulating circuit board 1 of the lead frame forming bodies 2a and 2b. 7 can be bent along.
- FIG. 11 is a front view showing a secondary bending process performed in the relationship of W0 ⁇ W4, and FIG. 12 is a cross-sectional view showing a state where the surface of the insulating circuit board in the terminal case is sealed with resin.
- the lead frame forming body may be configured as shown in FIGS. 9 and 10 as described above, but as shown in FIGS. 11 and 12, the lead frame forming body has a relationship of W0 ⁇ W4.
- 2a and 2b may be arranged on the insulated circuit board 1 and inserted into the main body 70 of the terminal case 7.
- the inner terminal portions of the lead frame forming bodies 2 a and 2 b raised vertically by the primary bending process are again tilted outward from the vicinity of the joint portion to the insulated circuit board to Bending is performed while being applied to the main body 70.
- the L-shaped step portion formed on the inner surface of the resin filling portion 71 of the terminal case 7 is a lower mold, and the upper mold (not shown) is pressed against the lead frame, whereby the lead frame is moved to the L-shaped step. It can be bent along the part.
- the lead frame forming bodies 2a and 2b are resin-sealed in the L-shaped grooves 70a and 70b, the lead frame forming bodies 2a and 2b have a resistance against the force to be pulled out from the terminal case 7.
- the horizontal portion bears the stress, and the stress in the direction of pulling out from the insulated circuit board 1 is not transmitted to the soldered portion of the inner lead.
- soldering of the inner lead is performed. The stress in the direction of pushing directly into the part is not transmitted.
- FIG. 13 is a cross-sectional view showing a state where the surface of the insulated circuit board in the terminal case is sealed with resin.
- a molten thermosetting resin for example, the epoxy resin 8 is injected into the inside of the resin filling portion 71 of the terminal case 7.
- a slight gap is formed between the insulating circuit board 1 and the board housing portion 72 of the terminal case 7 so that the insulating circuit board is put in the terminal case 7 by the epoxy resin 8 filled in the gap. 1 can be held stably.
- the epoxy resin 8 is cured by curing in a furnace.
- the epoxy resin 8 is stably held by the resin filling portion 71 of the terminal case 7.
- the epoxy resin 8 has substantially the same thermal expansion coefficient as that for preventing it from being peeled off from the power semiconductor chips 311 to 316 and 321 to 326 and the lead frame forming bodies 2a and 2b due to thermal expansion. Is preferably selected.
- FIG. 14 is a plan view, a front view, and a side view showing the outer shape of the completed semiconductor device.
- the external terminals 2 of the lead frame forming bodies 2a and 2b are pressed up and down, and the tie bar 20 is cut off to cut and separate the leads, thereby forming the external terminals 2 as shown in FIG. That is, both the external terminals 2 are constituted by one end portions of the lead frame forming bodies 2a and 2b.
- an insulating circuit board 1, a power semiconductor chip mounted on the insulating circuit board 1 and a control IC, and an external terminal 2 for connecting these and the control circuit board are accommodated in a terminal case 7.
- the inside of the terminal case 7 is sealed with an epoxy resin 8.
- the heat dissipation surface of the insulating circuit board 1 is brought into contact with a cooling fin or the like.
- the inside of the terminal case 7 is sealed with the epoxy resin 8, in the same figure, an insulated circuit board, a semiconductor chip, etc. do not appear.
- the epoxy resin 8 is used as the insulating sealant, but a gel filler such as silicone gel may be injected into the terminal case 7 and cured.
- the epoxy resin is preferable in that it has excellent thermal conductivity and heat resistance and high rigidity.
- a gel filler it is necessary to devise such as pressing the upper surface with a resin plate or the like.
- the external terminal 2 is configured in a DIP type shape that extends to both side surfaces of the terminal case 7, but the SIP type that extends to one side surface, the QFP type that extends to the upper surface, and the like. It can also be configured in a shape.
- FIGS. 15 and 16 are front views showing the semiconductor device according to the embodiment assembled by using an insulating circuit board having a size different from those of FIGS. 13 and 12, respectively.
- the outer dimensions of the terminal case 7 correspond to the terminal case 7 used in the secondary bending of the lead frame forming bodies 2a and 2b shown in FIG.
- the lateral width W1s of the insulated circuit board 1s becomes smaller than that in FIG.
- the length of the insulated circuit board 1s in the vertical direction is also smaller than W2.
- the insulated circuit board 1 shown in FIG. 1 has a rectangular shape with a lateral width W1 and a longitudinal length W2 (> W1).
- the lateral width W1s is insulated.
- the circuit board 1 is formed smaller than the lateral width W1.
- the width W1s ( ⁇ W1) of the board accommodating portion 72 provided in the terminal case 7 and the interval W0 of the bonding position of the lead frame forming bodies 2a and 2b with the insulated circuit board 1s are also reduced. Therefore, if the size of the resin filling portion 71 of the terminal case 7 in FIG. 15 is formed to the same size as that of FIG.
- the L shape of the L-shaped grooves 70 a and 70 b formed on the inner surface of the resin filling portion 71 By simply forming the horizontal portion long, the interval W3 (> W1s) between the lead frame forming bodies 2a and 2b protruding from the resin filling portion 71 of the terminal case 7 is kept at the same distance.
- the external terminal portion perpendicular to the insulating circuit board
- the lead-out position of the external terminal for example, the position and interval of each external terminal with reference to the screw insertion holes 74a and 74b
- the external terminal 2 constituted by the lead frame forming bodies 2a and 2b is not changed regardless of the size change of the insulating circuit board 1. It can be derived to the outside from the same position. Therefore, even when the insulated circuit board is downsized, it is possible to cope with the change without changing the size of the lead frame itself.
- the semiconductor device can be configured by incorporating insulating circuit boards of different sizes without changing the lead-out position of the lead frame, it is not necessary to change the position in the step of attaching it to the control circuit board.
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- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Abstract
Description
S11では、パワー半導体チップやその制御ICが用意される。
S13では、所定の長方形状の銅板をプレス加工により打ち抜いて、後述するリードフレーム形成体(図3)を作成する。これらのステップS11~S13は、並行して実施される。
ここでは、パワー半導体チップとして、IGBT311~316とこのIGBTにそれぞれ逆並列に接続されるFWD(Free Wheeling Diode)321~326と、大小4個の制御IC41~44が、絶縁回路基板1上でそれぞれ左右側に分かれて配置され、それぞれ面実装される。また、絶縁回路基板1上には、リードフレーム形成体2aがその内部端子側をパワー半導体チップ(IGBT311~316、FWD321~326)側の長辺近傍の電極に当接させた状態で、またリードフレーム形成体2bがその内部端子側を制御IC41~44側の長辺近傍の電極に当接させた状態でそれぞれ配置され、リフロー半田付けされる。これにより、絶縁回路基板1とパワー半導体チップ(IGBT311~316、FWD321~326)、制御IC41~44とが半田付けされると同時に、絶縁回路基板1とリードフレーム形成体2a,2bとが半田付けされる。
制御IC41~44は、モールドされたものを用いてもよいし、ベアチップを実装してもよい。また、現状ではハイサイド用に3つの制御IC41~43、ローサイド用に1つの制御IC44を用いているが、それらに高耐圧ICを用いることで、制御ICの数を削減できる。
リードフレーム形成体2a,2bは平板状をなし、図4に示すように、それぞれの内部端子(インナーリード)で予め30°ないし45°程度の角度で屈曲されている。また、図3に示すように、これら1対のリードフレーム形成体2a,2bは、いずれも複数本のリードがそれぞれ外部端子(アウターリード)側でタイバー20によって繋がれている。
図5は、ワイヤボンディング工程を示す平面図である。
ステップS18のワイヤボンディング工程では、絶縁回路基板1の金属パターン間および金属パターンとパワー半導体チップとの間をボンディングワイヤにより連続して接続している。金属パターンとIGBT311とFWD321を連続して接続することにより、IGBT311とFWD321との逆並列回路を形成する。IGBT312~316とFWD322~326についても同様に、ボンディングワイヤにて連続して接続する。ボンディングワイヤには、信号系ワイヤ51~56とパワー系ワイヤ61~66とでそれぞれ径が異なるワイヤを用いている。
図6において、INHU~INHVは、ハイサイド用の制御IC41~43への入力端子であり、ここにそれぞれIGBT311~313の制御信号が入力される。同様に、INLU~INLWはローサイド用の制御44への入力端子であり、ここにIGBT314~316の制御信号が入力される。
図7は、絶縁回路基板を装着するための端子ケースの形状を示す図であって、(A)はその平面図、(B)は(A)のB-B線に沿って示す矢視断面図である。
図8は、リードフレームを垂直に曲げる一次曲げ工程後の絶縁回路基板を示す平面図である。
図9は、端子ケースにリードフレームが接着された絶縁回路基板を取り付ける工程を示す正面図である。
ステップS22では、リードフレーム形成体2a,2bの二次曲げ加工が行われる。
二次曲げ工程では、前述した図9、および図10に示すように構成されていてもよいが、図11、および図12に示すように、W0<W4の関係となるようにリードフレーム形成体2a,2bを絶縁回路基板1上に配置して、端子ケース7の本体70に挿入するとよい。このようにすると、リードフレーム形成体2a,2bの絶縁回路基板1への接合工程での微小な位置ずれがあった場合、あるいは一次曲げ加工の際の曲げ精度に微小なばらつきがあった場合でも、絶縁回路基板1を端子ケース7の本体70の基板収容部72にはめ込む際に、リードフレーム形成体2a,2bが、端子ケースに当たるのを防ぐことができる。そして、組み立て作業が容易となり、リードフレーム形成体2a,2bが変形することを防ぐことができる。
ここでは、端子ケース7のプレヒートを行った上で、端子ケース7の樹脂充填部71の内側に溶融した熱硬化性樹脂、例えばエポキシ樹脂8が注入される。このとき、絶縁回路基板1と端子ケース7の基板収容部72との間には僅かに隙間を形成しておくことにより、この隙間に充填されたエポキシ樹脂8によって端子ケース7内に絶縁回路基板1を安定に保持できる。
図14は、完成された半導体装置の外形形状を示す平面図、正面図、および側面図である。
ここでは、端子ケース7の外形寸法は、図10に示すリードフレーム形成体2a,2bの二次曲げ加工で使用されている端子ケース7と対応している。しかし、絶縁回路基板1sに半田付けされるパワー半導体チップや制御ICが小型化することで、絶縁回路基板1sの横幅W1sが、図1のものに比較して小さくなる。また、図15には示されていないが、絶縁回路基板1s縦方向長さもW2より小さくなる。
1a,1b 切り欠き部
2 外部端子
2a,2b リードフレーム形成体
7 端子ケース
8 エポキシ樹脂
10 パワー半導体モジュール
20 タイバー
311~316 IGBT(絶縁ゲート型バイポーラトランジスタ)
321~326 FWD
41~44 制御IC
51~56 信号系ワイヤ
61~66 パワー系ワイヤ
70 端子ケースの本体
70a,70b 溝部
71 樹脂充填部
72 基板収容部
73 貫通孔
74a,74b ねじ挿通孔
Claims (6)
- 複数のパワー半導体素子と該パワー半導体素子を制御する制御用集積回路を実装する絶縁回路基板と、
一端側が外部端子を構成し、他端側が半導体チップに接続される内部端子を構成するリードフレームと、
前記リードフレームの前記内部端子側を保持する端子ケースと、を備え、
前記端子ケースに前記絶縁回路基板と、前記リードフレームの前記内部端子側を収容し、前記端子ケース内を樹脂で封止した半導体装置において、
前記端子ケースに、前記絶縁回路基板の前記リードフレームとの接続面を含んで樹脂封止するための樹脂充填部を形成し、
前記リードフレームを、前記樹脂充填部の内側面に向かってL字状に屈曲して、
前記端子ケース内で前記絶縁回路基板と前記リードフレームとの接続位置にかかわらず、前記外部端子の導出位置を一定に保持したことを特徴とする半導体装置。 - 前記端子ケースの樹脂充填部の内側面はL字状をなし、前記リードフレームは、該L字状の内側面に沿って屈曲されていることを特徴とする請求の範囲第1項記載の半導体装置。
- 前記端子ケースの樹脂充填部の内側面には、前記リードフレームの導出位置に対応して、複数の溝部が形成され、前記リードフレームの前記外部端子につながる前記絶縁回路基板と垂直の部分は、前記溝部に嵌合していることを特徴とする請求の範囲第2項記載の半導体装置。
- 前記L字状に屈曲されたリードフレームは、前記絶縁回路基板に対して垂直をなし、かつ前記外部端子につながる部分が、前記絶縁回路基板の外周端部を上方へ投影した位置より外側に位置することを特徴とする請求の範囲第1項ないし第3項の何れかに記載の半導体装置。
- 複数のパワー半導体素子と該パワー半導体素子を制御する制御用集積回路を絶縁回路基板に実装し、該絶縁回路基板をそこに接続されるリードフレームの内部端子側とともに端子ケースに収容し、該端子ケース内を樹脂封止してなる半導体装置の製造方法において、
前記端子ケースは、前記絶縁回路基板を取り付ける基板収容部、樹脂を充填する樹脂充填部、および前記基板収容部と前記樹脂充填部とを連通する貫通孔を備えており、
前記パワー半導体素子と前記制御用集積回路とリードフレーム形成体とを前記絶縁回路基板に半田接合する工程と、
前記リードフレームを、前記貫通孔より内側で前記絶縁回路基板の主面に対して垂直に曲げる一次曲げ工程と、
前記絶縁回路基板を前記端子ケースに取り付ける工程と、
前記端子ケースの前記樹脂充填部の内側面に沿わせて曲げる二次曲げ工程と、
前記樹脂充填部に封止樹脂を充填する工程と、
からなることを特徴とする半導体装置の製造方法。 - 前記二次曲げ工程は、前記一次曲げ工程で垂直に立ち上げた前記リードフレームを外側へ広げるように曲げる工程と、前記端子ケースの前記樹脂充填部の内側面に形成されたL字状の段差を下型とし、上型を前記リードフレームに押し当てて、該リードフレームを前記端子ケースの前記L字状の段差に沿わせて屈曲させる工程からなることを特徴とする請求の範囲第5項記載の半導体装置の製造方法。
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JP2013251429A (ja) * | 2012-06-01 | 2013-12-12 | Sumitomo Electric Ind Ltd | 半導体モジュール及び半導体モジュールの製造方法 |
WO2015107997A1 (ja) * | 2014-01-14 | 2015-07-23 | 住友ベークライト株式会社 | モジュール基板 |
JP2019021671A (ja) * | 2017-07-12 | 2019-02-07 | 三菱電機株式会社 | パワーモジュール |
JP2021034657A (ja) * | 2019-08-28 | 2021-03-01 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
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