WO2015008351A1 - 電子部品及びその製造方法 - Google Patents
電子部品及びその製造方法 Download PDFInfo
- Publication number
- WO2015008351A1 WO2015008351A1 PCT/JP2013/069419 JP2013069419W WO2015008351A1 WO 2015008351 A1 WO2015008351 A1 WO 2015008351A1 JP 2013069419 W JP2013069419 W JP 2013069419W WO 2015008351 A1 WO2015008351 A1 WO 2015008351A1
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- WIPO (PCT)
- Prior art keywords
- electronic component
- circuit board
- frame member
- main surface
- electrically connected
- Prior art date
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 43
- 239000000758 substrate Substances 0.000 claims description 65
- 238000000034 method Methods 0.000 claims description 24
- 238000005192 partition Methods 0.000 claims description 22
- 230000002093 peripheral effect Effects 0.000 claims description 11
- 239000004020 conductor Substances 0.000 claims description 6
- 238000000605 extraction Methods 0.000 description 13
- 239000002184 metal Substances 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 12
- 229920005989 resin Polymers 0.000 description 11
- 239000011347 resin Substances 0.000 description 11
- 238000010897 surface acoustic wave method Methods 0.000 description 6
- 238000000206 photolithography Methods 0.000 description 5
- 238000007747 plating Methods 0.000 description 5
- 238000007789 sealing Methods 0.000 description 5
- 238000009713 electroplating Methods 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 230000020169 heat generation Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 238000000638 solvent extraction Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
- H03H9/1092—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a cover cap mounted on an element forming part of the surface acoustic wave [SAW] device on the side of the IDT's
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/08—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/02535—Details of surface acoustic wave devices
- H03H9/02818—Means for compensation or elimination of undesirable effects
- H03H9/02913—Measures for shielding against electromagnetic fields
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
- H03H9/1071—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the SAW device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
- H03H9/1078—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a foil covering the non-active sides of the SAW device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/46—Filters
- H03H9/54—Filters comprising resonators of piezoelectric or electrostrictive material
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/46—Filters
- H03H9/64—Filters using surface acoustic waves
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0007—Casings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/88—Mounts; Supports; Enclosures; Casings
- H10N30/883—Additional insulation means preventing electrical, physical or chemical damage, e.g. protective coatings
Definitions
- the present invention relates to an electronic component having a functional circuit formed on a circuit board and a method for manufacturing the same, and more particularly to an electronic component having an electromagnetic shield structure and a method for manufacturing the same.
- Patent Document 1 discloses a surface acoustic wave device as an example of such an electronic component.
- an electrode structure including an IDT InterDigital Transducer
- a functional circuit for functioning as a surface acoustic wave element is realized.
- the electronic component described in Patent Document 1 is mounted on a mounting substrate by flip chip bonding. In this case, it arrange
- a method of forming a sealing layer with a conductive resin material so as to cover an electronic component is also known.
- the functional circuit portion in the electronic component can be electromagnetically shielded on the electronic component side.
- An object of the present invention is to provide an electronic component that is excellent in electromagnetic shielding performance as a single electronic component and that can reduce the size of the electronic component itself, and a method for manufacturing the same.
- the electronic component according to the present invention includes a circuit board, a functional circuit, a signal wiring, a ground wiring, a frame member, and a shield member.
- the circuit board has first and second main surfaces facing each other and a side surface connecting the first and second main surfaces.
- the functional circuit is formed on the first main surface of the circuit board.
- the signal wiring is formed on the first main surface of the circuit board and is electrically connected to the functional circuit.
- the ground wiring has a wiring portion formed on the first main surface of the circuit board, is electrically connected to the functional circuit, and is electrically connected to a ground potential.
- the frame member is provided so as to secure an area between the outer peripheral edge of the first main surface of the circuit board and to surround the functional circuit.
- the ground wiring is provided so as to extend from the inside to the outside of the frame member.
- the shield member is provided so as to reach the region outside the frame member on the first main surface of the circuit board through the side surface from the second main surface of the circuit board, and the frame.
- the region outside the member is electrically connected to the ground wiring and includes a conductive material.
- a partition wall provided to extend from the outer peripheral edge of the frame member toward the outer peripheral edge of the first main surface is further provided.
- the partition wall divides the region outside the frame member into a first partition and a second partition.
- the ground wiring is disposed in the first section, and the signal wiring is provided so as to be continuous with the second section.
- the shield member is provided so as to cover the entire second main surface and the side surface of the circuit board.
- a lid member joined to the frame member is further provided so as to close the opening of the frame member.
- the frame member has a first through-hole through which the signal wiring faces and a second through-hole through which the ground wiring faces, First and second conductive members filled in the second through hole are further provided.
- the lid member has third and fourth through holes that are continuous with the first and second through holes, and the first and second conductive members are provided. Are formed to be continuous with the third and fourth through holes, respectively.
- the method for manufacturing an electronic component according to the present invention includes the following steps.
- A preparing a circuit board having first and second main surfaces that oppose each other and side surfaces connecting the first and second main surfaces;
- B forming a functional circuit on the first main surface of the circuit board;
- C forming a signal wiring electrically connected to the functional circuit and a ground wiring electrically connected to the functional circuit and connected to the ground potential on the first main surface of the circuit board;
- D forming a frame member on the first main surface of the circuit board so as to surround the functional circuit and to secure a region between the outer peripheral edge of the circuit board;
- E Conductive so as to extend from the second main surface of the circuit board through the side surface to an area outside the frame member of the first main surface and to be electrically connected to the ground wiring.
- steps (A) to (E) are performed on a mother circuit board, and a plurality of electronic component forming portions are formed on the mother circuit board with a shield member. It is formed so as to reach between adjacent electronic component constituent parts, and is cut into individual electronic parts while cutting the mother circuit board on which the plurality of electronic part forming parts are formed and the shield member.
- the method further includes a step of forming a lid member so as to close the opening of the frame member.
- a partition wall extending from the frame member toward the outer peripheral edge of the first main surface of the circuit board is used to define the region by the partition wall. And a step of partitioning into the second space.
- the partition wall is formed so that the ground wiring is positioned in the first section and the signal wiring is positioned in the second section.
- the frame member is provided so as to surround the functional circuit, and the shield member is provided from the second main surface to the outside region of the frame member as described above. Therefore, the functional circuit can be effectively electromagnetically shielded without increasing the size of the electronic component. Therefore, it is not necessary to provide a shield member for electromagnetically shielding the electronic component on the mounting substrate side.
- FIG. 1A is a plan view for explaining a manufacturing process according to the first embodiment of the present invention.
- FIGS. 1B and 1C are cross-sectional views along line B1-B1 in FIG.
- FIG. 6 is a cross-sectional view taken along line C1-C1.
- FIG. 2A is a plan view for explaining a manufacturing process according to the first embodiment of the present invention.
- FIGS. 2B and 2C are lines B2-B2 in FIG. 2A.
- FIG. 6 is a cross-sectional view taken along line C2-C2.
- FIG. 3A is a plan view for explaining a manufacturing process according to the first embodiment of the present invention
- FIG. 3B is a cross-sectional view taken along line B3-B3 in FIG. It is.
- FIG. 4B are front cross-sectional views for explaining each step of the electronic component manufacturing method according to the first embodiment of the present invention.
- FIG. 5A and FIG. 5B are front cross-sectional views for explaining each process of the electronic component manufacturing method according to the first embodiment of the present invention.
- FIG. 6A and FIG. 6B are front cross-sectional views for explaining each process of the electronic component manufacturing method according to the first embodiment of the present invention.
- FIG. 7 is a plan view for explaining the electronic component manufacturing method according to the first embodiment of the present invention.
- 8A and 8B are cross-sectional views taken along the lines A4-A4 and B4-B4 in FIG.
- FIG. 9 is a plan view for explaining the electronic component manufacturing method according to the first embodiment of the present invention.
- FIG. 10A is a plan view for explaining the manufacturing process of the electronic component according to the first embodiment of the present invention
- FIGS. 10B and 10C are FIGS. It is each sectional drawing which follows the B5-B5 line and C5-C5 line in the inside.
- FIG. 11A is a plan view for explaining a manufacturing process of an electronic component according to the second embodiment of the present invention.
- FIGS. 11B and 11C are FIGS.
- FIG. 6 is a cross-sectional view taken along line B6-B6 and line C6-C6.
- FIG. 12A is a plan view for explaining an electronic component manufacturing method according to the second embodiment of the present invention
- FIGS. 12B and 12C are views in FIG. FIG.
- FIG. 5 is a cross-sectional view taken along line B7-B7 and line C7-C7.
- FIG. 13: is sectional drawing for demonstrating the manufacturing process of the electronic component which concerns on the 2nd Embodiment of this invention.
- FIG. 14A and FIG. 14B are front sectional views for explaining a method for manufacturing an electronic component according to the second embodiment of the present invention.
- FIG. 15A and FIG. 15B are front sectional views for explaining a method for manufacturing an electronic component according to the second embodiment of the present invention.
- FIGS. 16A and 16B are front sectional views for explaining a method of manufacturing an electronic component according to the second embodiment of the present invention.
- FIG. 17A and FIG. 17B are front sectional views for explaining a method for manufacturing an electronic component according to the second embodiment of the present invention.
- FIG. 18A is a plan view for explaining a method of manufacturing an electronic component according to the third embodiment of the present invention.
- FIGS. 18B and 18C are views in FIG.
- FIG. 5 is a cross-sectional view taken along line B8-B8 and line C8-C8.
- FIG. 19 is a plan view for explaining the electronic component manufacturing method according to the fourth embodiment of the present invention.
- 20A to 20C are cross-sectional views taken along the lines A9-A9, B9-B9 and C9-C9 in FIG.
- FIG. 21 is a plan view for explaining the method for manufacturing an electronic component according to the fourth embodiment of the present invention.
- FIG. 22 (a) to 22 (c) are cross-sectional views taken along lines A10-A10, B10-B10, and C10-C10 in FIG.
- FIG. 23 is a plan view for explaining the electronic component manufacturing method according to the fourth embodiment of the present invention.
- 24 (a) to 24 (c) are cross-sectional views taken along lines A11-A11, B11-B11, and C11-C11 in FIG.
- FIG. 25 is a plan view for explaining the electronic component manufacturing method according to the fourth embodiment of the present invention.
- FIG. 26 is a plan view for explaining the method for manufacturing an electronic component according to the fifth embodiment of the present invention.
- FIGS. 28B and 28C are views in FIG. It is each sectional drawing which follows the B13-B13 line and the C13-C13 line.
- the surface acoustic wave device shown in FIG. 10 is created as an electronic component.
- a mother piezoelectric substrate 1 is prepared.
- a piezoelectric substrate made of an appropriate piezoelectric material such as LiTaO 3 can be used.
- a metal film made of Al or the like is formed on the entire upper surface, which is the first main surface of the mother piezoelectric substrate 1, and is patterned by photolithography. Thereby, the electrode structure shown in FIGS. 1A to 1C is formed.
- This electrode structure includes an IDT 2 composed of a pair of comb-shaped electrodes, a wiring electrode 3, and pad electrodes 4a and 4b.
- the wiring electrode 3 includes a signal wiring 3a and a ground wiring 3b.
- the shield wiring 5 is formed so as to surround one surface acoustic wave element including a plurality of IDTs 2 as a functional circuit.
- first and second conductive members 8a and 8b used as bumps are formed on the pad electrodes 4a and 4b. That is, the pad electrodes 4a and 4b function as a bonding layer serving as an under bump metal layer.
- a photosensitive resin is applied to the upper surface of the piezoelectric substrate 1 and patterned by photolithography.
- the photosensitive resin an appropriate photosensitive resin such as a photosensitive polyimide resin can be used.
- the frame member 7 shown in FIGS. 2A to 2C is formed.
- the frame member 7 has a rectangular frame shape.
- a first through hole 7 a and a second through hole 7 b are formed in the corner portion of the frame member 7.
- At least a part of the pad electrode 4a is exposed inside the first through hole 7a.
- the pad electrode 4 a is connected to the signal wiring 3 a connected to the signal potential among the wiring electrodes 3.
- at least a part of the pad electrode 4b is exposed inside the second through hole 7b.
- the pad electrode 4b is connected to the ground wiring 3b connected to the ground potential.
- first and second through holes 7a and 7b are covered with a resist. Thereafter, the first and second through holes 7a and 7b are filled with metal by plating.
- the metal an appropriate metal such as an alloy containing Ni or Cu as a main component can be used. Thereafter, the resist is peeled off.
- the first and second functions as the bump or under bump metal layers inside the first and second through holes 7a and 7b.
- Conductive members 8a and 8b are formed.
- the electronic component finally obtained can be easily mounted by flip chip bonding.
- FIG. 4A a dicing tape 9 is attached from the upper surface side of the piezoelectric substrate 1.
- FIG. 4 (a) the same part as the cross-sectional part shown in FIG. 3 (b) is shown.
- FIG.4 (b) the cross-sectional part corresponded in the part in alignment with FIG.2 (c) is shown in figure.
- dicing tape 9 As the dicing tape 9, a known dicing tape in which the lower surface, which is one of the main surfaces, is an adhesive surface can be used.
- the lower surface of the dicing tape 9 is attached to the first and second conductive members 8 a and 8 b and the frame member 7.
- a space X and a space Y are formed between the lower surface of the dicing tape 9 and the mother piezoelectric substrate 1 and the frame member 7.
- the dicing tape 9 is not diced, and the mother piezoelectric substrate 1 is diced into individual electronic components.
- the mother piezoelectric substrate 1 is divided into individual electronic component unit piezoelectric substrates 1A.
- the piezoelectric substrate 1A corresponds to a circuit board.
- the conductive paste is applied from the lower surface side of the piezoelectric substrate 1A without peeling off the dicing tape 9, and the conductive paste is disposed on the space Y, the dicing surface of the piezoelectric substrate 1A and the lower surface which is the second main surface. Curing by heating or cooling.
- the shield member 10 can be formed at a time at predetermined positions of a plurality of electronic components.
- a composition in which a conductive material is contained in a thermosetting resin, a thermoplastic resin, or various chemical curable resins can be used.
- FIGS. 5 (a) and 5 (b) are cross-sectional views of a portion corresponding to FIGS. 5 (a) and 5 (b).
- the shield member 10 covers the lower surface as the second main surface of the piezoelectric substrate 1A.
- the shield member 10 is filled in a gap between the adjacent piezoelectric substrates 1A and 1A. Accordingly, the shield member 10 extends from the lower surface of the piezoelectric substrate 1A through the side surface to the upper surface 1a.
- the shield member 10 reaches the region 1c outside the portion where the frame member 7 is provided on the upper surface 1a as the first main surface of the piezoelectric substrate 1A. However, the shield member 10 does not reach the region 1d inside the frame member 7.
- the shield member 10 is electrically connected to the ground wiring 3b and the shield wiring 5 connected to the ground potential. Note that the pad electrode 4 a connected to the signal wiring 3 a is not exposed in the space Y outside the frame member 7 and is not electrically connected to the shield member 10.
- the shield member 10 is diced into individual electronic component units.
- the dicing tape 9 is preferably not peeled from the electronic component. That is, as shown in FIGS. 8A and 8B, the shield member 10 is diced between the adjacent piezoelectric substrates 1A and 1A. In this way, the shield member 10A for each electronic component unit is formed.
- FIG. 9 is a plan view schematically showing a state after dicing the shield member 10 into a plurality of shield members 10A. Here, illustration of the dicing tape 9 is omitted.
- the electronic components are peeled off from the dicing tape 9.
- the electronic component 11 of the first embodiment shown in FIGS. 10A to 10C can be obtained.
- a functional circuit having a plurality of IDTs 2 is formed on the upper surface 1a of the piezoelectric substrate 1A as a circuit board.
- a filter having a ladder circuit configuration is formed.
- the shield member 10A covers the entire surface of the lower surface 1b, which is the second main surface of the piezoelectric substrate 1A, with the upper surface of the piezoelectric substrate 1A on which the functional circuit is configured. The entire four side surfaces of the piezoelectric substrate 1A are also covered with the shield member 10A.
- a shield member 10A is formed on the upper surface 1a of the piezoelectric substrate 1A so as to reach the region 1c. Therefore, the functional circuit can be reliably electromagnetically shielded from the outside by the shield member 10A.
- the electronic component 11 when the electronic component 11 is mounted, the electronic component 11 can be reversed from the orientation shown in FIGS. 10B and 10C and mounted on the mounting substrate by a flip chip bonding method.
- the functional circuit is surrounded by the shield member 10A in the mounted state without providing the shield member on the mounting substrate side. Therefore, it is not necessary to prepare a mounting substrate having a complicated structure as the mounting substrate, and it is not necessary to provide a shield member that covers the electronic component 11 separately from the electronic component 11.
- the shield member 10A is formed lower than the upper end of the frame member 7 on the surface side where the functional circuit of the piezoelectric substrate 1A is formed. Therefore, even if the shield member 10A is provided, the thickness of the electronic component 11 does not increase so much. Therefore, the electronic component 11 can be reduced in height.
- FIG. 11A is a plan view of the second embodiment of the present invention
- FIGS. 11B and 11C are cross sections taken along lines B6-B6 and C6-C6 in FIG. 11A, respectively.
- FIG. 11A In the electronic component 21 of the present embodiment, the lid member 22 is formed above the piezoelectric substrate 1A.
- the shield member 10B is provided on the upper surface 1a side of the piezoelectric substrate 1A so as to reach the region 1c as in the first embodiment.
- the shield member 10B is formed to have a protruding frame 10B1 protruding upward from a portion covering the side surface of the piezoelectric substrate 1A.
- a lid member 22 is formed in a region surrounded by the protruding frame 10B1.
- the upper surface of the lid member 22 is set lower than the upper ends of the first and second conductive members 8a and 8b. Further, the lower surface of the lid member 22 is in contact with the upper end of the frame member 7.
- the lid member 22 is made of an insulating resin. Since the sealing space surrounded by the piezoelectric substrate 1, the frame member 7, and the lid member 22 is provided, in this embodiment, moisture resistance and the like in the electronic component 21 can be improved, and the functional circuit in the sealing space It is possible to stabilize the electrical characteristics.
- the heat transfer by the ground wiring 3b can suppress the temperature rise of the functional circuit formed on the first main surface of the piezoelectric substrate 1A, and can stabilize the fluctuation of the electrical characteristics due to the temperature of the electronic component 11.
- the thermal conductivity of the ground wiring 3b is higher than the thermal conductivity of the piezoelectric substrate 1A.
- the height can be reduced and a good electromagnetic shielding function can be achieved.
- the electrode structure and the frame member 7 are formed on the mother piezoelectric substrate 1 as in the first embodiment. Thereafter, a photosensitive resin sheet is bonded onto the frame member 7 and patterned by photolithography. Thereby, the lid member 22 can be formed. In the lid member 22, the above patterning is performed so as to form the third and fourth through holes 22a and 22b (see FIG. 13) connected to the first and second through holes 7a and 7b.
- the first and second through holes 7a and 7b are filled with metal by a plating method.
- the first and second conductive members 8a and 8b can be formed as shown in FIG.
- a dicing tape 9 is attached to the upper surface. Thereafter, the dicing tape 9 is not diced, and the piezoelectric substrate 1 is diced into individual electronic component units.
- the mother piezoelectric substrate is divided into a plurality of piezoelectric substrates 1A.
- the shield member 10 is applied from the lower surface side of the piezoelectric substrate 1A and cured.
- each electronic component is divided by dicing.
- the electronic component is peeled from the dicing tape 9. In this way, the electronic component 21 of the second embodiment can be obtained.
- FIG. 18A is a plan view showing an electronic component 31 according to the third embodiment of the present invention, and FIGS. 18B and 18C are B8-B8 line and C8 in FIG. 18A, respectively.
- FIG. 10 is a cross-sectional view taken along line -C8.
- This embodiment is different from the second embodiment in that the lid member 32 is extended to the outer peripheral edge of the electronic component 31. That is, in the second embodiment, the shield member 10B has the protruding frame 10B1, and the lid member 22 is disposed in the protruding frame 10B1. On the other hand, the protruding frame 10B1 is not formed.
- the electronic component 1 according to the first embodiment corresponds to a structure in which the lid member 32 is added.
- the manufacturing process of the electronic component 31 of the third embodiment can be performed in substantially the same manner as in the second embodiment. However, when dicing the shield member 10 into the shield member 10B of each electronic component unit, the mother lid member is also diced to form the lid member 32. In this embodiment, since the side surfaces of the first and second conductive members 8a and 8b that are electrically connected to the outside are covered with the lid member 32, an undesired short circuit can be suppressed.
- FIG. 19 is a plan view showing the electronic component 41 of the fourth embodiment, and FIGS. 20A to 20C are taken along lines A9-A9, B9-B9 and C9-C9 in FIG. 19, respectively. It is sectional drawing which follows. A method for manufacturing the electronic component 41 will be described first with reference to FIGS.
- an electrode structure is formed on a mother piezoelectric substrate in the same manner as in the first embodiment. As shown in FIG. 21, this electrode structure has a plurality of IDTs 2, a signal wiring 3a, a ground wiring 3b, and pad electrodes 4a and 4b.
- a rectangular frame-shaped power supply line 42c is formed as an electrode structure.
- the signal power supply line 42a is formed so as to be connected from the rectangular frame-shaped power supply line 42c to the pad electrode 4a serving as a signal terminal.
- the ground power supply line 42b extends from the power supply line 42c toward the pad electrode 4b connected to the ground potential.
- an extraction electrode 43 is formed so as to be electrically connected to the ground power supply line 42b.
- the signal power supply line 42a is electrically connected to the lead electrode 43 via the power supply line 42c and the ground power supply line 42b.
- the lead electrode 43 extends in parallel with a pair of opposing sides of the rectangular frame-shaped power supply line 42c.
- the direction in which the extraction electrode 43 extends is defined as the Y direction, and the direction in the piezoelectric substrate plane perpendicular to the Y direction is defined as the X direction.
- the signal power supply line 42a is not provided on the pair of sides facing each other. That is, the signal power supply line 42a is electrically connected to a part of the power supply line 42c located on the remaining pair of sides.
- the electrode structure including the signal power supply line 42a, the ground power supply line 42b, and the lead electrode 43 can be formed by patterning by photolithography, as in the first embodiment.
- a frame member 7C is formed by patterning a photosensitive resin in the same manner as in the first embodiment.
- the frame member 7C has a rectangular frame-shaped frame member main body.
- the rectangular frame-shaped frame member body is provided so as to surround the functional circuit.
- first and second through holes 7a and 7b are formed at the corners of the rectangular frame-shaped frame member main body, as in the first embodiment.
- a partition wall 7C1 protruding in the Y direction is formed.
- the partition wall 7 ⁇ / b> C ⁇ b> 1 extends from the corner portion of the rectangular frame-shaped frame member main body to the edge of the mother piezoelectric substrate 1.
- the partition wall 7C1 Since the partition wall 7C1 is provided, the area outside the frame member body of the frame member 7 is partitioned into a first area D and a second area E.
- the first region D is a region between the partition walls 7C1 and 7C1 extending in the Y direction.
- the second region E is a region outside the partition wall 7C1 extending in the Y direction.
- the extraction electrode 43 connected to the above-described ground potential is disposed. That is, in the second region E, the ground power supply line 42 b and the extraction electrode 43 are electrically connected. In other words, the wiring portion connected to the ground potential is formed so as to extend from the inside to the outside of the frame member 7C.
- the shield member 10 containing a conductive material does not reach the first region D as will be described later. Therefore, an undesired short circuit can be prevented.
- the frame member 7 is formed in the same manner as in the second and third embodiments. However, the frame member 7 including the partition wall 7C1 is formed.
- the first and second conductive members 8a and 8b are formed by electroplating using the signal power supply line 42a and the ground power supply line 42b. Since this electroplating method is used, the thick first and second conductive members 8a and 8b can be easily formed.
- a dicing tape is stuck from the upper surface.
- the mother piezoelectric substrate is diced.
- dicing is not performed on the portion surrounded by the dashed lines G1 and G2 among the portions surrounded by the broken lines F1 and F2 in FIG.
- the region surrounded by the alternate long and short dash lines G1 and G2 is removed by dicing. That is, a portion between adjacent extraction electrodes 43 of adjacent electronic components is removed. The lead electrode 43 is exposed on the diced cut surface.
- the conductive paste is applied from the lower surface side and cured in the same manner as in the first to third embodiments without peeling from the dicing tape. In this way, a shield member is formed. Thereafter, the shield member portion and the lid member between adjacent electronic components are cut by dicing. As described above, the electronic component 41 shown in FIGS. 19 and 20 can be obtained.
- the lid member since the lid member is provided, an undesired short circuit between the first and second conductive members 8a and 8b can be effectively prevented.
- the shield member 10 since the shield member 10 is formed in the same manner as in the first embodiment, the functional circuit can be reliably electromagnetically shielded. However, as shown in FIG. 20C, the shield member 10 is not formed on the side surface extending in the X direction described above. Even in that case, since the other two side surfaces are covered with the shield member 10, the functional circuit can be sufficiently electromagnetically shielded.
- 26 and 27 (a) to 27 (c) are plan views showing an electronic component 51 according to the fifth embodiment of the present invention, and the A12-A12 line, B12-B12 line, and C12-C12 line in FIG. FIG. Also in the present embodiment, the first and second conductive members 8a and 8b can be formed by electroplating, as in the fourth embodiment.
- An electrode structure is formed on the mother piezoelectric substrate 1 in the same manner as in the first embodiment.
- the extraction electrode 53 also serves as a part of the power supply line 52. That is, the extraction electrode 53 is formed so as to reach the upper end in the Y direction in FIG.
- the lead electrode 53 is formed so as to straddle between adjacent electronic components.
- the feed line 52 has a feed line portion 52a extending in the X direction.
- One end of the power supply line portion 52a is provided to connect the pair of lead electrodes 53.
- the power supply line portion 52a and the lead electrode 53 form a rectangular frame-shaped power supply line.
- a signal power supply line 42a is connected to the power supply line portion 52a. This is the same as in the case of the fourth embodiment.
- a ground power supply line 42 b is connected to the extraction electrode 53.
- the fifth embodiment is the same as the fourth embodiment except that the structure of the feed line is different as described above.
- the frame member 7C is formed in the same manner as in the fourth embodiment. Also in the present embodiment, the frame member 7C is formed so as to have the partition wall 7C1 as in the fourth embodiment.
- a frame member is formed by photolithography in the same manner as in the fourth embodiment.
- a metal is deposited on the pad electrodes 4a and 4b and the extraction electrode 53 by a plating method. Thereby, the first and second conductive members 8a and 8b are formed. Further, a metal film 54 shown in FIGS. 27A and 27B is formed on the extraction electrode 53 in the plating step.
- the plating metal film is formed so that the portions other than the portions where the first and second conductive members 8a and 8b are located are covered with a resist, and the first and second conductive members 8a and 8b are further thickened. Are laminated. In FIG. 27A, this plated metal film is not particularly shown.
- a dicing tape is attached from the upper surface, and the mother piezoelectric substrate is diced in the same manner as in the fourth embodiment.
- dicing is performed so as to remove a part of the extraction electrode 53 straddling between adjacent electronic components. Therefore, the extraction electrode 53A is exposed on the cut surface.
- a conductive paste is applied from the lower surface side and is thermally cured to form a shield member. Thereafter, the shield member portion and the lid member between adjacent electronic components are cut by dicing. Thus, the electronic component of this embodiment can be obtained.
- first and second conductive members 8a and 8b can be formed by electroplating similarly to the fourth embodiment.
- the functional circuit is provided so as to constitute a ladder type filter.
- the functional circuit is not limited to such a filter, but a longitudinally coupled resonator.
- the filter may be a combination of a type filter, a laterally coupled resonator type filter, and the like as appropriate, and is not limited to a functional circuit portion using an elastic wave such as a surface acoustic wave. That is, the present invention can be applied to portions having various functional circuits that require electromagnetic shielding.
- the present invention can be applied not only to the piezoelectric substrate 1 described above as a circuit board but also to an electronic component using an insulating substrate or a semiconductor substrate.
- Electronic component 32 ... Lid member 41 ... Electronic component 42a ... Signal feed line 42b ... Ground feed line 42c ... Feed line 43 ... Lead electrode 52 ; Feed line 52a ... Feed line portion 53 ... Lead electrode 53A ... Lead electrode 54 ... Metal film
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Abstract
Description
(B)前記回路基板の前記第1の主面上に、機能回路を形成する工程と、
(C)前記回路基板の前記第1の主面上に、機能回路と電気的に接続される信号配線及び機能回路と電気的に接続され、かつグラウンド電位に接続されるグラウンド配線を形成する工程と、
(D)前記回路基板の前記第1の主面に、前記機能回路を囲むように、かつ前記回路基板の外周縁との間に領域を確保するように枠部材を形成する工程と、
(E)前記回路基板の第2の主面から前記側面を経て、前記第1の主面の枠部材の外側の領域に至るように、かつ前記グラウンド配線に電気的に接続されるように導電性材料を含むシールド部材を形成する工程。
1A…圧電基板
1a…上面
1b…下面
1c…領域
1d…領域
2…IDT
3…配線電極
3a…信号配線
3b…グラウンド配線
4a,4b…パッド電極
5…シールド配線
7…枠部材
7C…枠部材
7C1…仕切壁
7a,7b…第1,第2の貫通孔
8a,8b…第1,第2の導電部材
9…ダイシングテープ
10,10A,10B…シールド部材
10B1…突出枠
11,21…電子部品
22…蓋部材
22a,22b…第3,第4の貫通孔
31…電子部品
32…蓋部材
41…電子部品
42a…信号給電ライン
42b…グラウンド給電ライン
42c…給電ライン
43…引き出し電極
52…給電ライン
52a…給電ライン部分
53…引き出し電極
53A…引き出し電極
54…金属膜
Claims (10)
- 対抗し合う第1及び第2の主面と、該第1及び第2の主面を接続している側面とを有する回路基板と、
前記回路基板の第1の主面に形成されている機能回路と、
前記回路基板の第1の主面に形成されており、前記機能回路に電気的に接続される信号配線と、
前記回路基板の第1の主面に形成されている配線部分を有し、前記機能回路に電気的に接続されており、グラウンド電位に電気的に接続されるグラウンド配線と、
前記回路基板の第1の主面の外周縁との間に領域を確保するように、かつ前記機能回路を囲むように設けられた枠部材とを備え、
前記グラウンド配線が、前記枠部材の内側から外側に至るように設けられており、
前記回路基板の第2の主面から側面を経て前記回路基板の第1の主面の前記枠部材の外側の前記領域に至るように設けられており、かつ前記枠部材の外側の前記領域で前記グラウンド配線に電気的に接続されている導電性材料を含むシールド部材を備える、電子部品。 - 前記枠部材の外周縁から前記第1の主面の外周縁に向かって延びるように設けられた仕切壁をさらに備え、
前記仕切壁により、前記枠部材の外側の前記領域が第1の区画と、第2の区画とに分割されており、前記第1の区画に前記グラウンド配線が配置されており、前記信号配線が前記第2の区画に連なるように設けられている、請求項1に記載の電子部品。 - 前記シールド部材が、前記回路基板の第2の主面及び前記側面の全面を被覆するように設けられている、請求項1または2に記載の電子部品。
- 前記枠部材の開口部を閉成するように前記枠部材に接合されている蓋部材をさらに備える、請求項1~3のいずれか1項に記載の電子部品。
- 前記枠部材が、前記信号配線が臨む第1の貫通孔と、前記グラウンド配線が臨む第2の貫通孔とを有し、前記第1及び第2の貫通孔に充填された第1及び第2の導電部材をさらに備える、請求項1~4のいずれか1項に記載の電子部品。
- 前記蓋部材が前記第1及び第2の貫通孔に連なる第3及び第4の貫通孔を有し、前記第1及び第2の導電部材が前記第3及び第4の貫通孔にそれぞれ連なるように形成されている、請求項4に記載の電子部品。
- (A)対抗し合う第1及び第2の主面と、第1及び第2の主面を接続している側面を有する回路基板を用意する工程と、
(B)前記回路基板の前記第1の主面上に、機能回路を形成する工程と、
(C)前記回路基板の前記第1の主面上に、機能回路と電気的に接続される信号配線及び機能回路と電気的に接続され、かつグラウンド電位に接続されるグラウンド配線を形成する工程と、
(D)前記回路基板の前記第1の主面に、前記機能回路を囲むように、かつ前記回路基板の外周縁との間に領域を確保するように枠部材を形成する工程と、
(E)前記回路基板の第2の主面から前記側面を経て、前記第1の主面の枠部材の外側の領域に至るように、かつ前記グラウンド配線に電気的に接続されるように導電性材料を含むシールド部材を形成する工程とを備える、電子部品の製造方法。 - 前記工程(A)~工程(E)をマザーの回路基板において行い、マザーの回路基板上に複数の電子部品形成用部分をシールド部材が隣り合う電子部品構成部分間に至るように設けて形成し、
前記複数の電子部品形成用部分が構成されているマザーの回路基板と前記シールド部材とを切断しつつ個々の電子部品に切断する、請求項7に記載の電子部品の製造方法。 - 前記枠部材の開口を閉成するように蓋部材を形成する工程をさらに備える、請求項7または8に記載の電子部品の製造方法。
- 前記枠部材から前記回路基板の前記第1の主面の外周縁側に向かって延びる仕切壁を前記仕切壁により前記領域を第1及び第2の空間に区画するように形成する工程をさらに備え、
前記第1の区画に前記グラウンド配線が、前記第2の区画に前記信号配線が位置するように前記仕切壁を形成する、請求項7~9のいずれか1項に記載の電子部品の製造方法。
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