WO2011105010A1 - 気相成長用半導体基板支持サセプタおよびエピタキシャルウェーハ製造装置およびエピタキシャルウェーハの製造方法 - Google Patents
気相成長用半導体基板支持サセプタおよびエピタキシャルウェーハ製造装置およびエピタキシャルウェーハの製造方法 Download PDFInfo
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- WO2011105010A1 WO2011105010A1 PCT/JP2011/000462 JP2011000462W WO2011105010A1 WO 2011105010 A1 WO2011105010 A1 WO 2011105010A1 JP 2011000462 W JP2011000462 W JP 2011000462W WO 2011105010 A1 WO2011105010 A1 WO 2011105010A1
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- Prior art keywords
- susceptor
- semiconductor substrate
- vapor
- counterbore
- epitaxial
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- 239000000758 substrate Substances 0.000 title claims abstract description 167
- 239000004065 semiconductor Substances 0.000 title claims abstract description 92
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 35
- 238000000927 vapour-phase epitaxy Methods 0.000 title abstract 2
- 238000001947 vapour-phase growth Methods 0.000 claims description 33
- 238000000034 method Methods 0.000 claims description 14
- 238000010438 heat treatment Methods 0.000 claims description 7
- 239000012071 phase Substances 0.000 claims description 7
- 239000012808 vapor phase Substances 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 48
- 230000002093 peripheral effect Effects 0.000 description 43
- 239000007789 gas Substances 0.000 description 40
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 35
- 229910052710 silicon Inorganic materials 0.000 description 35
- 239000010703 silicon Substances 0.000 description 35
- 238000009826 distribution Methods 0.000 description 17
- 230000000052 comparative effect Effects 0.000 description 14
- 238000010926 purge Methods 0.000 description 7
- 230000000149 penetrating effect Effects 0.000 description 6
- 239000013078 crystal Substances 0.000 description 5
- 238000007665 sagging Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000004566 IR spectroscopy Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- NIPNSKYNPDTRPC-UHFFFAOYSA-N N-[2-oxo-2-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)ethyl]-2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carboxamide Chemical compound O=C(CNC(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F)N1CC2=C(CC1)NN=N2 NIPNSKYNPDTRPC-UHFFFAOYSA-N 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- AFCARXCZXQIEQB-UHFFFAOYSA-N N-[3-oxo-3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)propyl]-2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carboxamide Chemical compound O=C(CCNC(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F)N1CC2=C(CC1)NN=N2 AFCARXCZXQIEQB-UHFFFAOYSA-N 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 description 1
- 239000005052 trichlorosilane Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
- C23C16/4582—Rigid and flat substrates, e.g. plates or discs
- C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
- C23C16/4585—Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/12—Substrate holders or susceptors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
Definitions
- the present invention relates to a susceptor used for supporting a semiconductor substrate in a vapor phase growth process, an epitaxial wafer manufacturing apparatus using the susceptor, and an epitaxial wafer manufacturing method.
- Vapor phase growth of an epitaxial layer (for example, a silicon epitaxial layer) on the main surface of a semiconductor substrate is performed by a susceptor in a reaction vessel, and the substrate is grown as desired by a heating device in a state where the substrate is arranged on the susceptor. While heating to temperature, it supplies by supplying a source gas on the main surface of a board
- the epitaxial wafer thus formed has an extremely high quality surface with no damage and few defects.
- silicon epitaxial wafers have begun to be used for power devices such as MOS FETs such as MPU, DRAM and flash memory, IGBTs, and imaging devices such as CCD and CIS.
- power devices such as MOS FETs such as MPU, DRAM and flash memory, IGBTs, and imaging devices such as CCD and CIS.
- high integration and miniaturization of devices have progressed for high yield and high performance, and not only the surface quality of the substrate but also the flatness of the substrate has become particularly important.
- the region that guarantees flatness for the purpose of improving the yield of the device has also expanded from the region excluding the outer periphery of 5 mm to the region excluding the outer periphery of 3 mm or the outer periphery of 2 mm.
- the layer thickness uniformity of the epitaxial layer has been improved by using an apparatus for batch processing to single wafer processing.
- the substrate before epitaxial growth is not flat, it is necessary to adjust the layer thickness distribution of the epitaxial layer in accordance with the shape of the substrate before growth, instead of simply forming an epitaxial layer having a uniform layer thickness.
- the substrate before the epitaxial growth is polished and planarized, and the central portion of the silicon wafer achieves high flatness.
- sufficient flatness cannot be achieved for the peripheral portion, and it is necessary to improve the flatness by adjusting the layer thickness of the peripheral portion in the epitaxial growth process.
- Patent Document 1 For such a problem, there is a method of adjusting the depth of the spot facing portion of the susceptor. Further, as disclosed in Patent Document 1, for example, a plurality of injectors for supplying a source gas to the center and the outer periphery of the substrate are provided, and the concentration and flow rate of the source gas supplied from each injector are adjusted to adjust the silicon wafer There has also been proposed a method of controlling the thickness of the epitaxial layer in the central portion and the peripheral portion to achieve flattening.
- Patent Document 2 the length of a region called a ledge where the susceptor and the back surface of the silicon wafer are brought into close contact with each other is changed, and an epitaxial layer is formed on the back surface side of the peripheral portion of the silicon wafer.
- a method for selectively controlling the shape of the film has also been proposed.
- the shape of the peripheral portion is formed by adding the layer thickness distribution of the epitaxial layer on the front side of the silicon wafer and the layer thickness distribution of the epitaxial layer on the back side.
- problems such as lack of nature. If the shape control is not performed well, conversely, waviness occurs in the outer periphery of the wafer, and the flatness may be greatly deteriorated.
- the present invention has been made in view of such a problem, and it is possible to improve the flatness of the epitaxial wafer by controlling the thickness of the epitaxial layer in the peripheral portion on the epitaxial wafer main surface side. It is a main object to provide a susceptor for supporting a semiconductor substrate during phase growth, and an epitaxial wafer manufacturing apparatus and method using the susceptor.
- the present invention provides a susceptor that supports a semiconductor substrate during vapor phase growth, the susceptor including a counterbore portion on which the semiconductor substrate is disposed, and an end of the counterbore portion.
- a semiconductor substrate supporting susceptor for vapor phase growth characterized in that the upper surface of the susceptor has a taper portion formed with a taper inclined upward or downward from the outside.
- the periphery of the semiconductor substrate is used.
- the flow of the source gas in the part can be adjusted, and the layer thickness of the epitaxial layer in the peripheral part of the semiconductor substrate can be controlled.
- the layer thickness uniformity of the epitaxial layer on the outer periphery of the semiconductor substrate It is possible to improve the degree of freedom of control. That is, it becomes easy to control, and an epitaxial layer having a uniform and stable layer thickness can be vapor-phase grown, so that the production yield can be improved.
- the layer thickness distribution of the epitaxial layer in the peripheral portion of the semiconductor substrate is adjusted, and the semiconductor substrate The shape of the outer peripheral portion can be corrected, and an epitaxial wafer having a highly flat surface can be stably supplied.
- the taper portion has an outward length from the counterbore portion end of 1% or more and less than 7.5%, more preferably 2.5% or more and less than 7.5% of the diameter of the semiconductor substrate. It is preferable that it is a length.
- the length from the end of the spot facing portion toward the outside is 1% or more and less than 7.5% of the diameter of the semiconductor substrate, more preferably 2.5% or more and less than 7.5%.
- the taper part has a height of 30% or less of the thickness of the semiconductor substrate.
- the height of the tapered portion is set to 30% or less of the thickness of the semiconductor substrate, it is possible to reliably suppress disturbance of the flow of the source gas in the peripheral portion of the semiconductor substrate, and the layer thickness is more reliably uniform.
- An epitaxial wafer on which an epitaxial layer is formed can be manufactured.
- the taper may be formed without interruption over the entire circumference of the counterbore part, and may be formed intermittently along the circumferential direction of the counterbore part. You can also. In this way, by using a susceptor formed with a taper that is not interrupted over the entire periphery of the spot facing portion, the layer thickness of the outer peripheral portion of the semiconductor substrate can be adjusted uniformly over the entire periphery of the semiconductor substrate. . Further, if the taper is a susceptor formed intermittently along the circumferential direction of the spot facing portion, only a part of the outer peripheral portion of the semiconductor substrate can be adjusted in layer thickness. By appropriately selecting according to the surface shape of the substrate, an epitaxial wafer excellent in flatness can be obtained.
- the depth of the counterbore part of the susceptor is preferably 0.9 to 1.1 times the thickness of the semiconductor substrate.
- the substrate thickness of the semiconductor substrate to be epitaxially grown and the spot facing depth of the spot facing portion can be made substantially equal, and the layer thickness of the outer peripheral portion of the semiconductor substrate can be controlled with higher accuracy.
- an epitaxial wafer manufacturing apparatus for vapor-phase growth of an epitaxial layer on a main surface of a semiconductor substrate, at least a reaction vessel, a source gas introduction pipe, an exhaust pipe, a heating apparatus, An epitaxial wafer manufacturing apparatus comprising the susceptor according to the present invention is provided.
- the epitaxial growth conditions can be set by vapor-phase-growing the epitaxial layer on the main surface of the semiconductor substrate.
- the epitaxial layer on the outer peripheral portion of the semiconductor substrate can be formed uniformly without modification.
- the epitaxial layer thickness of the outer peripheral part of the semiconductor substrate can be adjusted according to the outer peripheral shape of the semiconductor substrate. That is, since the shape of the outer peripheral portion of the semiconductor substrate can be corrected, a highly flat epitaxial wafer can be stably supplied.
- the manufacturing method of the epitaxial wafer which vapor-phase-grows an epitaxial layer on a semiconductor substrate, Comprising: It describes in this invention in the vapor-phase growth process of vapor-phase-growing an epitaxial layer on the main surface of a semiconductor substrate.
- An epitaxial wafer manufacturing method is provided, wherein the semiconductor substrate is disposed on the spot facing portion of the susceptor, and the epitaxial layer is vapor-phase grown.
- a method for producing an epitaxial wafer wherein an epitaxial layer is vapor-grown on a semiconductor substrate, wherein the semiconductor substrate comprises a vapor-phase growth step of vapor-growing an epitaxial layer on a main surface of the semiconductor substrate.
- the semiconductor is provided in the counterbore portion of the susceptor, which includes a counterbore portion to be disposed, and has a taper portion in which an upper surface of the susceptor is inclined upward or downward from an end of the counterbore portion toward the outside.
- An epitaxial wafer manufacturing method is provided, wherein a substrate is disposed and the epitaxial layer is vapor-phase grown.
- the susceptor supporting the semiconductor substrate is gradually moved upward or downward for a certain distance from the end of the spot facing portion toward the outside.
- the amount of sag and sag at the outer periphery of the semiconductor substrate after the epitaxial layer is formed can be adjusted.
- An epitaxial wafer having a high flatness can be produced.
- the height of the taper it is possible to easily control the sag and sag of the outer periphery, and by adjusting the length from the counterbore edge to the outside, sag and sag of the outer periphery of the epitaxial layer are generated. Since the position of the epitaxial layer can be adjusted, the surface shape of the epitaxial layer can be controlled only by adjusting the taper shape of the susceptor according to the surface shape of the semiconductor substrate before vapor phase growth. An epitaxial wafer can be easily manufactured.
- the thickness of the epitaxial layer on the outer peripheral portion of the semiconductor substrate can be made uniform.
- the distribution of the epitaxial layer on the outer peripheral portion can be adjusted in accordance with the outer peripheral shape of the semiconductor substrate before epitaxial growth, and a highly flat epitaxial wafer can be stably supplied.
- FIG. 6 is a diagram showing the layer thickness distribution of the outer peripheral portion of the silicon epitaxial layer of Example 1-5 and Comparative Example 2-3.
- FIG. 6 is a diagram showing the layer thickness distribution of the outer peripheral portion of the silicon epitaxial layer of Example 6-9 and Comparative Example 1-2.
- FIG. 6 is a diagram showing a layer thickness distribution at the outer peripheral portion of the silicon epitaxial layer of Comparative Example 1-3. It is the figure which showed the outline of the cross-sectional shape of the conventional susceptor. It is the figure which showed the outline of the cross-sectional shape of the conventional susceptor with a counterbore depth. It is the figure which showed the outline of the cross-sectional shape of the conventional susceptor with a counterbore depth shallow.
- the epitaxial wafer manufacturing apparatus 10 supports at least a susceptor 20 (described later in detail), a reaction vessel 11 in which the susceptor 20 is arranged, and supports the susceptor 20 to rotate and drive up and down.
- the susceptor support member 12 and the susceptor 20 are passed through the front and back, and can be moved up and down with respect to the susceptor 20, and moved up and down while supporting a semiconductor substrate W (hereinafter sometimes abbreviated as substrate W).
- substrate W semiconductor substrate W
- lift pins 13 for attaching to and detaching from the susceptor 20, and heating devices 14a and 14b (specifically, for example, halogen lamps) for heating the substrate W to a desired growth temperature during vapor phase growth.
- a gas phase growth gas containing a source gas (specifically, for example, trichlorosilane) and a carrier gas (specifically, for example, hydrogen) is used as a reaction vessel. 1 is introduced into the region above the susceptor 20 and supplied onto the main surface of the substrate W on the susceptor 20, and the gas phase growth gas is introduced into the reaction vessel 11.
- a source gas specifically, for example, trichlorosilane
- a carrier gas specifically, for example, hydrogen
- a purge gas introduction pipe 16 that is provided on the same side as the pipe 15 and introduces a purge gas (specifically, for example, hydrogen) into the region below the susceptor 20 in the reaction vessel 11, and the purge gas introduction pipe 16 and the source gas introduction pipe 15 and an exhaust pipe 17 that is provided on the opposite side of the reaction vessel 11 and exhausts gas (a gas phase growth source gas and a purge gas) from the reaction vessel 11.
- a purge gas specifically, for example, hydrogen
- the susceptor 20 supports the substrate W during vapor phase growth, and is made of, for example, graphite coated with silicon carbide.
- the conventional susceptor 100 is configured, for example, in a substantially disk shape, and a counterbore 101 (a circular recess in a plan view) for positioning the substrate W is formed on the main surface thereof.
- the bottom face of the spot facing portion 101 may be a flat surface or a concave curved surface.
- the bottom face of the counterbore part 101 has a flat surface near the counterbore end bottom part 101a and a concave curved surface on the inside, and further has a hole penetrating to the back surface of the susceptor 100 in the vicinity of the counterbore part bottom bottom part 101a. Etc. are also proposed.
- a lift pin penetrating hole portion 102 is formed on the bottom surface of the counterbore portion 101 of the susceptor 100 so as to penetrate the back surface of the susceptor 100 and through which the lift pin is inserted.
- the lift pin penetrating holes 102 are, for example, disposed at three positions on the spot facing portion 101 at equal angular intervals.
- the lift pin 13 includes, for example, a body portion 13b configured in a round bar shape, and a head portion 13a formed on the upper end portion of the body portion 13b and supporting the substrate W from the lower surface side. I have.
- the head portion 13a has a diameter larger than that of the body portion 13b so as to easily support the substrate W.
- the lift pin 13 is inserted into the lift pin penetrating hole 20a from the lower end thereof, and as a result, the head 13a is prevented from coming off downward by the edge of the lift pin penetrating hole 20a and supported by the susceptor 20.
- the body portion 13b is suspended from the lift pin through hole 20a.
- the body portion 13b of the lift pin 13 also penetrates the through hole 12b provided in the support arm 12a of the susceptor support member 12.
- the susceptor support member 12 is provided with a plurality of support arms 12a radially, and the susceptor 20 is supported from the lower surface side by these support arms 12a. Thereby, the upper surface of the susceptor 20 is maintained in a substantially horizontal state.
- the epitaxial manufacturing apparatus 10 is configured as described above. Then, by using this epitaxial wafer manufacturing apparatus 10 and performing vapor phase growth in the following manner, a silicon epitaxial layer can be formed on the main surface of the substrate W to manufacture a silicon epitaxial wafer.
- the substrate W is supported by the susceptor 20 in the reaction vessel 11.
- the lift pins 13 are raised relative to the susceptor 20 so as to protrude upward from the upper surface of the susceptor 20 by substantially equal amounts. Further, the susceptor 20 may be lowered as the susceptor support member 12 is lowered. During the descending process, after the lower end of the lift pin 13 reaches the inner bottom surface of the reaction vessel 11, for example, the lift pin 13 cannot be lowered further, but the susceptor 20 can be further lowered. For this reason, the lift pin 13 rises relative to the susceptor 20, and the lift pin and the susceptor eventually have a positional relationship as shown in FIG. 2 (the state where there is no substrate W in FIG. 2).
- each lift pin 13 is lowered relative to the susceptor 20 in order to support the substrate W by the susceptor 20.
- the susceptor 20 is raised as the susceptor support member 12 is raised while the transfer device is retracted.
- the substrate W that has been supported on the head 13a of the lift pin 13 until then is It shifts to a state where it is supported in the vicinity of the counterbore end bottom 21a. Furthermore, when the edge of the lift pin penetrating hole 20a reaches the head 13a of the lift pin 13, the lift pin 13 that has been supported by the inner bottom surface of the reaction vessel 11 until then is supported by the susceptor 20. And migrate.
- the substrate W is supported by the susceptor 20 in this way, vapor phase growth is performed.
- the substrate W is rotated as the susceptor 20 is rotated by rotating the susceptor support member 12 about the vertical axis, and the substrate W on the susceptor 20 is grown to a desired growth by the heating devices 14a and 14b.
- a vapor phase growth gas is supplied substantially horizontally onto the main surface of the substrate W via the source gas introduction pipe 15, while a purge gas is supplied to the lower side of the susceptor 20 via the purge gas introduction pipe 16. Install approximately horizontally.
- a gas phase growth gas flow is formed on the upper side of the susceptor 20 and a purge gas flow is formed on the lower side substantially parallel to the susceptor 20 and the substrate W, respectively.
- the manufactured epitaxial wafer is carried out of the reaction vessel 11. That is, after the rotation of the susceptor 20 is stopped, the susceptor support member 12 is lowered to cause the lift pins 13 to project above the susceptor 20 by substantially equal amounts as shown in FIG.
- the substrate W is raised above the counterbore portion 21 of the susceptor 20. Then, the substrate W is unloaded by a transfer device (not shown).
- the vapor phase growth gas is introduced from the vapor phase growth gas introduction pipe 15, flows along the surface of the susceptor 20, and is carried to the edge portion of the substrate W.
- the growth rate of the epitaxial layer near the edge of the substrate W greatly depends on the concentration and flow rate of the vapor phase growth gas near the edge of the substrate W.
- the counterbore depths of the counterbore parts 111 and 121 for supporting the substrate W of the susceptors 110 and 120 the bottom part of the counterbore part of the counterbore parts 111 and 121).
- 111a, 121a and counterbore edge tops 111b, 121b) is adjusted to change the flow of the vapor phase growth gas in the vicinity of the edge of the substrate W, thereby changing the epitaxial growth rate in the vicinity of the edge of the substrate W.
- the method of adjusting the is used.
- the concentration of the vapor phase growth gas supplied to the edge portion of the substrate W decreases, and the edge of the substrate W
- the epitaxial growth rate in the vicinity decreases.
- the flow of the vapor phase growth gas is disturbed, and the epitaxial growth rate of the substrate W is reduced. It extends from the part to the inner area. For this reason, precise control of the epitaxial growth rate of the outer peripheral portion of the substrate W cannot be performed.
- the concentration of the vapor growth gas supplied to the edge portion of the substrate W increases, and the edge of the substrate W is increased.
- the epitaxial growth rate in the vicinity increases.
- a step is generated between the substrate W and the counterbore end upper portion 121b of the counterbore portion 121 of the susceptor.
- the flow of the vapor phase growth gas is disturbed, and the increase in the epitaxial growth rate of the substrate W It extends from the edge part to the inner area. For this reason, the epitaxial growth rate on the outer peripheral portion of the substrate W cannot be precisely controlled.
- the susceptor 30 keeps the height of the counterbore end upper portion 31 b of the counterbore 31 substantially equal to the height of the main surface of the substrate W. (T ⁇ t w ), having a tapered portion 33 formed with a taper in which the upper surface of the susceptor gradually inclines upward from the counterbore portion end upper portion 31b to the tapered portion end 31c toward the outside of the counterbore portion 31 It is.
- the epitaxial layer is vapor-phase grown on the main surface of the semiconductor substrate, thereby changing the epitaxial growth conditions without changing the epitaxial growth conditions.
- the outer peripheral epitaxial layer can be formed uniformly.
- the epitaxial layer thickness of the outer peripheral part of a semiconductor substrate can be adjusted according to the outer peripheral shape of the semiconductor substrate before epitaxial growth. Therefore, it becomes possible to correct the outer peripheral portion shape of the semiconductor substrate without changing the vapor phase growth conditions, and it is also possible to stably supply an epitaxial wafer that is highly flat especially to the outer peripheral portion.
- the epitaxial growth rate in the vicinity of the edge of the substrate is set to a desired level.
- tapered section 33 can be the height h is 30% or less of the thickness t w of the semiconductor substrate W.
- the length d is adjusted from the position of the tapered portion end 31c and the counterbore end 31b where the semiconductor substrate is disposed to the counterbore end upper portion 31b. It is possible to suppress the epitaxial growth rate. For example, by increasing the length d, the starting point where the layer thickness changes in the peripheral portion of the semiconductor substrate can be changed to a position close to the edge of the semiconductor substrate. Further, when the length d is shortened, the starting point where the layer thickness changes in the peripheral portion of the semiconductor substrate can be changed to a position far from the edge of the semiconductor substrate.
- the taper portion 33 has a length d that extends outward from the counterbore end upper portion 31b of 1% to less than 7.5%, more preferably 2.5% to less than 7.5% of the diameter of the semiconductor substrate. It can be a length. This makes it possible to reliably control the vapor growth rate in the vicinity of the end of the spot facing portion, and to produce a susceptor capable of manufacturing an epitaxial wafer with excellent flatness.
- the depth t of the counterbore section 31 may be 0.9 to 1.1 times the thickness t w of the semiconductor substrate. Thus, it is possible to substantially equalize the counterbore depth t of the substrate thickness t w and spot facing of the semiconductor substrate for conducting the epitaxial growth, to perform an outer peripheral portion of the layer thickness control of the semiconductor substrate W with higher accuracy Will be able to.
- the susceptor 40 keeps the height of the counterbore end upper portion 41b of the counterbore 41 substantially equal to the height of the main surface of the substrate W ( t ⁇ t w ), and has a tapered portion 43 in which a taper is formed such that the upper surface of the susceptor is gradually inclined downward from the counterbore portion end upper portion 41b to the taper portion end 41c toward the outer side of the counterbore portion 41. is there.
- the epitaxial growth rate in the vicinity of the edge of the substrate W is increased from the edge of the substrate W to a desired region. Things will be possible. Further, by adjusting the height difference h between the counterbore end 41b and the taper end 41c (height of the taper 43 itself) of the counterbore 41, the epitaxial growth rate in the vicinity of the edge of the substrate W can be set to a desired value. It becomes possible to raise to the level.
- the length d of the tapered portion 43 is also adjusted in the range of 1% to less than 7.5% of the diameter of the substrate W, more preferably in the range of 2.5% to less than 7.5%.
- the growth rate can be sufficiently controlled, and an epitaxial layer having a uniform layer thickness can be easily and stably vapor-phase grown.
- the susceptor 40 by in the range of 0.9-1.1 times the counterbore depth t of the substrate thickness t w, the thickness of the outer peripheral portion of the semiconductor substrate W with higher accuracy Control can be performed.
- the tapered portion 53 is formed from the counterbore end upper portion 51b toward the outside of the susceptor 50 without interruption.
- the layer thickness of the outer peripheral portion of the semiconductor substrate W of the spot facing portion 61 where the semiconductor substrate W is disposed is set.
- a tapered portion 63 is formed intermittently from the counterbore end upper portion 61b toward the outside of the susceptor 60 along the circumferential direction of the counterbore portion end upper portion 61b of the counterbore portion 61 in an area corresponding to the portion to be adjusted. It should be good.
- the height h of the tapered portion itself, the length d between the end of the tapered portion and the spot facing portion of the spot facing portion where the semiconductor substrate is disposed, the depth t of the spot facing portion, the taper By adjusting the presence or absence of taper in the circumferential direction, the shape of the epitaxial layer around the semiconductor substrate can be adjusted, so by adjusting these factors according to various substrate / vapor phase growth conditions, A flat epitaxial wafer can be produced.
- Example 1 A susceptor as shown in FIG. 3 was produced.
- the counterbore depth t of the susceptor is set to 800 ⁇ m, which is close to the thickness of the silicon single crystal substrate, the taper height h is fixed to 100 ⁇ m, and the taper length (length from the end of the counterbore portion to the outside) d is set.
- d 22.5 mm
- Example 3 10 mm
- Example 5 3 mm.
- Table 1 and FIG. 7 to be described later susceptor parameters of Comparative Examples 2 and 3 to be described later and variations in the thickness of the silicon epitaxial layer when using them are described for comparison.
- the susceptor fabricated previously is mounted at the position of the susceptor of the epitaxial manufacturing apparatus as shown in FIG. 1, and a P + type silicon single crystal having a diameter of 300 mm, a resistivity of 0.01 to 0.02 ⁇ ⁇ cm, and a thickness of 775 ⁇ m.
- a P ⁇ -type silicon epitaxial layer having a thickness of about 5 ⁇ m was vapor-grown on each main surface on the substrate by using each susceptor.
- the outer periphery of the silicon substrate was measured at a 1 mm pitch in the range from 2 mm to 30 mm, and the thickness distribution of the silicon epitaxial layer was determined. It was measured. The result is shown in FIG. In FIG. 7, the measured value at each point is divided by the average value of all the measured points, and 1 is subtracted from that value, which is displayed as a percentage and used as an index representing the variation in the thickness of the epitaxial layer.
- Example 7 in the case of Example 1 in which the taper length d was increased, the effect of the outer periphery sagging due to the formation of the taper was weakened, resulting in a layer thickness distribution close to that of Comparative Example 2.
- Example 5 in which the taper length d was shortened, it was found that the effect of sagging in the outer periphery due to the formation of the taper was strengthened, and the layer thickness distribution was similar to that of Comparative Example 3.
- the taper length d can be adjusted to an appropriate value so that it can be adjusted to a desired sag position, and in the case of Example 2, a substantially flat layer thickness distribution can be obtained up to the outer periphery. It was.
- Example 6-9 A susceptor as shown in FIG. 4 was produced.
- the counterbore depth t of the susceptor is set to 800 ⁇ m, which is close to the thickness of the silicon single crystal substrate, the taper height h is fixed to 100 ⁇ m, and the taper length (length from the end of the counterbore portion to the outside) d is set.
- Table 2 and FIG. 8 to be described later susceptor parameters of Comparative Examples 1 and 2 to be described later and variations in the thickness of the silicon epitaxial layer when using the parameters are described for comparison.
- the susceptor previously produced is mounted at the position of the susceptor of the epitaxial manufacturing apparatus as shown in FIG. 1, and a P + type silicon single-piece having a diameter of 300 mm, a resistivity of 0.01 to 0.02 ⁇ ⁇ cm, and a thickness of 775 ⁇ m is mounted.
- a P ⁇ -type silicon epitaxial layer having a thickness of about 5 ⁇ m was vapor-grown on each main surface on the crystal substrate using each susceptor.
- the outer periphery of the silicon substrate was measured at a 1 mm pitch in the range from 2 mm to 30 mm, and the thickness distribution of the silicon epitaxial layer was determined. It was measured. The result is shown in FIG. In FIG. 8, as in FIG. 7, the measured value at each point is divided by the average value of all the measured points, and 1 is subtracted from that value. did.
- Example 8 in which the taper length d was increased, the peripheral effect due to the formation of the taper was weakened, and a layer thickness distribution close to that of Comparative Example 2 was obtained.
- Example 9 in which the taper length d was shortened, it was found that the outer peripheral effect due to the formation of the taper was strengthened, and the layer thickness distribution was close to that of Comparative Example 1.
- the taper length d can be adjusted to a desired value by adjusting the taper length d to an appropriate value.
- Comparative Example 1-3 A susceptor as shown in FIG. 10 was produced. Three types of susceptor counterbore depth t of 700 ⁇ m in Comparative Example 1, 800 ⁇ m in Comparative Example 2, and 900 ⁇ m in Comparative Example 3 were prepared.
- each of the above susceptors is mounted, the diameter is 300 mm, the resistivity is 0.01 to 0.02 ⁇ ⁇ cm, the thickness is A P ⁇ -type silicon epitaxial layer having a thickness of about 5 ⁇ m was vapor-grown on each main surface on a P + -type silicon single crystal substrate having a thickness of 775 ⁇ m using each susceptor.
- the outer periphery of the silicon substrate was measured at a 1 mm pitch in the range from 2 mm to 30 mm, and the thickness distribution of the silicon epitaxial layer was determined. It was measured. The result is shown in FIG. In FIG. 9, similarly to FIGS. 7 and 8, the measured value at each point is divided by the average value of all the measured points, and 1 is subtracted from that value to indicate the percentage, thereby representing the variation in the thickness of the epitaxial layer. It was used as an index.
- the layer thickness distribution of the silicon epitaxial layer changes from a sag to a sagging shape.
- the sagging and splashing positions have also changed greatly, and it has been found that it is difficult to control the sagging and splashing amount and the position of the epitaxial layer in the outer peripheral portion at the same time to make it flat.
- the present invention is not limited to the above embodiment.
- the above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.
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Abstract
Description
このようにして形成されたエピタキシャルウェーハは、ダメージフリーで欠陥も少ない極めて良質な表面を有している。
また、高収率化、高性能化のためにデバイスの高集積化、微細化が進み、基板表面品質のみならず、基板の平坦性が特に重要となってきている。
さらにデバイスの収率向上を目的に平坦性を保証する領域についても、外周5mmを除外した領域から外周3mmあるいは外周2mmを除外した領域へと広がってきている。
しかしながら、エピタキシャル成長前の基板が平坦でない場合には、単純に均一な層厚のエピタキシャル層を形成するのでなく、成長前の基板の形状に合わせてエピタキシャル層の層厚分布を調整する必要がある。
また、例えば特許文献1にあるように、基板の中心と外周部に原料ガスを供給するための複数のインジェクタを設けて、各インジェクタから供給する原料ガスの濃度や流量を調整してシリコンウェーハの中心部と周辺部のエピタキシャル層の層厚をコントロールして平坦化を図る方法等も提案されている。
また特許文献1に記載されている各々のインジェクタからの原料ガスの流量等を調節する方法では、原料ガスが拡散するために、基板となるシリコンウェーハの周辺部分のみのエピタキシャル層の層厚を選択的に制御できないという問題がある。
このため、例えばあるエピタキシャル成長条件下で外周部の層厚均一性が悪化している場合でも、エピタキシャル成長条件を変更しないでサセプタ形状のみを調整することで半導体基板外周部のエピタキシャル層の層厚均一性を改善する事が可能となり、制御の自由度を上げることができる。すなわち制御が容易になり、層厚が均一且つ安定したエピタキシャル層を気相成長させることが可能となり、製造歩留りの改善を図ることができる。
このように、座ぐり部の端から外側に向かう長さが半導体基板の直径の1%以上7.5%未満、より好ましくは2.5%以上7.5%未満であれば、半導体基板の周辺部の層厚調整効果を十分に高いものとすることができ、高平坦性のエピタキシャルウェーハの製造に大きく貢献することができるサセプタになる。
このように、テーパー部の高さを半導体基板の厚さの30%以下とすることによって、半導体基板周辺部での原料ガスの流れが乱れることを確実に抑制でき、より確実に層厚が均一なエピタキシャル層が形成されたエピタキシャルウェーハを製造することができる。
このように、テーパーが、座ぐり部の全周に渡って途切れることなく形成されたサセプタとすることによって、半導体基板の外周部の層厚を半導体基板の全周において均一に調整することができる。
また、テーパーが、座ぐり部の周方向に沿って間欠的に形成されたサセプタであれば、半導体基板の外周部の一部のみを層厚調整することができるため、気相成長前の半導体基板の表面形状に合わせて適宜選択することによって平坦性に優れたエピタキシャルウェーハが得られる。
このように、座ぐり部の深さが、半導体基板の厚さの0.9~1.1倍のサセプタとすることによって、エピタキシャル成長を行う半導体基板の基板厚さと座ぐり部の座ぐり深さを略等しくすることができ、半導体基板の外周部の層厚制御を更に高い精度で行うことができる。
また、半導体基板の外周形状に合わせて半導体基板の外周部のエピタキシャル層厚を調整することができる。すなわち、半導体基板の外周部形状を修正することができるので、高平坦なエピタキシャルウェーハを安定して供給することも可能となる。
特に、テーパーの高さを調整することによって外周部のハネ及びダレを容易にコントロールでき、また座ぐり部端から外側に向かう長さを調節することでエピタキシャル層の外周部のハネ及びダレが発生する位置を調節することができるため、気相成長前の半導体基板の表面形状に応じてサセプタのテーパー形状等を調整することのみでエピタキシャル層の表面形状を制御することができ、高平坦性のエピタキシャルウェーハを容易に製造できるようになる。
先ず、図1及び図2を参照して、本発明に係るエピタキシャルウェーハ製造装置の一例としての枚葉式のエピタキシャルウェーハの製造装置について説明する。
従来のサセプタ100は、例えば略円盤状に構成され、その主表面には、該主表面上に基板Wを位置決めするための座ぐり部101(平面視円形の凹部)が形成されている。この座ぐり部101の底面は、平面のものや凹曲面上になっているものもある。また、座ぐり部101底面の座ぐり部端底部101aの近傍を平面、その内側を凹曲面にしたものや、更に座ぐり部端底部101a近傍にサセプタ100の裏面まで貫通した孔を設けたもの等も提案されている。
そして、リフトピン13は、その下端部から、リフトピン貫通用孔部20aに挿入された結果、該リフトピン貫通用孔部20aの縁部により頭部13aが下方に抜け止めされて、サセプタ20により支持されるとともに、その胴体部13bを該リフトピン貫通孔20aより垂下させた状態となっている。なお、リフトピン13の胴体部13bは、サセプタ支持部材12の支持アーム12aに設けられた貫通孔12bも貫通している。
そして、このエピタキシャルウェーハ製造装置10を用いて、以下の要領で気相成長を行うことにより、基板Wの主表面上にシリコンエピタキシャル層を形成してシリコンエピタキシャルウェーハを製造することができる。
このためには、先ず、リフトピン13上に基板Wを受け渡すために、各リフトピン13を互いに略等量だけサセプタ20の上面より上方に突出するように該サセプタ20に対し相対的に上昇させる。また、サセプタ支持部材12を下降させるのに伴わせてサセプタ20を下降させるようにしてもよい。この下降の過程で、リフトピン13の下端部が、例えば反応容器11の内部底面に到達して以降は、リフトピン13はそれ以上に下降できないが、サセプタ20はさらに下降することができる。
このため、サセプタ20に対し相対的にリフトピン13が上昇し、やがてリフトピンとサセプタは図2のような位置関係となる(図2において基板Wが無い状態)。
次に、基板Wをサセプタ20により支持させるために、各リフトピン13をサセプタ20に対し相対的に下降させる。このためには、移載装置を待避させる一方で、サセプタ支持部材12を上昇させるのに伴わせて、サセプタ20を上昇させる。この上昇の過程で、座ぐり部21の座ぐり部端底部21aが基板Wの主裏面に到達すると、それまでリフトピン13の頭部13a上に支持されていた基板Wが、座ぐり部21の座ぐり部端底部21a近傍で支持された状態へと移行する。
さらに、リフトピン貫通用孔部20aの縁部がリフトピン13の頭部13aに到達すると、それまで反応容器11の内部底面により支持された状態であったリフトピン13は、サセプタ20により支持された状態へと移行する。
まず、サセプタ支持部材12を鉛直軸周りに回転駆動することによりサセプタ20を回転させるのに伴わせて基板Wを回転させるとともに、該サセプタ20上の基板Wを加熱装置14a,14bにより所望の成長温度に加熱しながら、原料ガス導入管15を介して基板Wの主表面上に気相成長用ガスを略水平に供給する一方で、パージガス導入管16を介してサセプタ20の下側にパージガスを略水平に導入する。
すなわち、サセプタ20の回転を止めた後に、サセプタ支持部材12を下降させて、図2に示すように各リフトピン13を互いに略等量だけサセプタ20の上方に突出動作させ、この突出動作に伴わせて基板Wをサセプタ20の座ぐり部21の上方に上昇させる。そして、図示しない移載装置により基板Wを搬出する。
一般的には図11や図12に示すように、サセプタ110,120の基板Wを支持する為の座ぐり部111,121の座ぐり深さ(座ぐり部111,121の座ぐり部端底部111a,121aと座ぐり部端上部111b,121bの高さの差)を調節することで、基板Wのエッジ近傍の気相成長用ガスの流れを変化させて、基板Wのエッジ近傍のエピタキシャル成長速度を調整する方法が用いられている。
しかしながら、基板Wと座ぐり部111の座ぐり部端上部111bとの間で段差が生じる結果、気相成長ガスの流れの乱れが発生し、基板Wのエピタキシャル成長速度の低下は、基板Wのエッジ部からさらに内側の領域にまで及ぶようになる。この為、基板Wの外周部のエピタキシャル成長速度の精密な制御ができない。
しかしながら、基板Wとサセプタの座ぐり部121の座ぐり部端上部121bとの間で段差が生じる結果、気相成長ガスの流れの乱れが発生し、基板Wのエピタキシャル成長速度の上昇は、基板Wのエッジ部からさらに内側の領域にまで及ぶようになる。この為、同様に基板Wの外周部のエピタキシャル成長速度の精密な制御ができない。
また、エピタキシャル成長前の半導体基板の外周形状に合わせて半導体基板の外周部のエピタキシャル層厚を調整することができる。従って、半導体基板の外周部形状を気相成長条件を変更することなく修正することができるようになり、特に外周部まで高平坦となったエピタキシャルウェーハを安定して供給することも可能となる。
例えば、テーパー部33は、その高さhが半導体基板Wの厚さtwの30%以下とすることができる。これによって、原料ガスの流れが乱れることを確実に抑制できるため、より確実かつ安定して均一な層厚のエピタキシャル層が形成されたエピタキシャルウェーハを製造するのに好適なサセプタとすることができる。
例えば、テーパー部33は、座ぐり部端上部31bから外側に向かう長さdが、半導体基板の直径の1%以上7.5%未満、より好ましくは2.5%以上7.5%未満の長さとすることができる。これによって、座ぐり部端近傍の気相成長速度の制御を確実に行うことができ、平坦性に優れたエピタキシャルウェーハを製造することができるサセプタになる。
これによって、エピタキシャル成長を行う半導体基板の基板厚さtwと座ぐり部の座ぐり深さtをほぼ等しくすることができ、より高い精度で半導体基板Wの外周部の層厚の制御を行うことができるようになる。
また、座ぐり部41の座ぐり部端上部41bとテーパー部末端41cの高さの差h(テーパー部43自体の高さ)を調整する事で、基板Wのエッジ近傍のエピタキシャル成長速度を所望のレベルまで上昇させる事が可能となる。
また、テーパー部43の長さdも基板Wの直径の1%以上7.5%未満、より好ましくは2.5%以上7.5%未満の範囲で調整する事によって、同様にエッジ近傍の成長速度の十分な制御ができ、層厚が均一なエピタキシャル層を容易且つ安定して気相成長させることができる。
さらに、該サセプタ40の座ぐり深さtを基板の厚さtwに対して0.9~1.1倍の範囲にする事によって、より高い精度で半導体基板Wの外周部の層厚の制御を行うことができるようになる。
(実施例1-5)
図3に示すようなサセプタを作製した。サセプタの座ぐり深さtは、シリコン単結晶基板の厚さに近い800μmとし、テーパーの高さhを100μmに固定して、テーパー長さ(座ぐり部端から外側に向かう長さ)dを実施例1ではd=22.5mm、実施例2はd=15mm、実施例3はd=10mm、実施例4はd=7.5mm、実施例5はd=3mmとした5種類のサセプタを作製した。
サセプタの上記パラメータを表1にまとめて示す。なお、表1及び後述する図7には、後述する比較例2,3のサセプタのパラメータと、それを用いた時のシリコンエピタキシャル層の厚さのバラツキを比較のために記載しておく。
逆にテーパー長さdを短くした実施例5の場合は、テーパーを形成した事による外周ダレ効果が強まり、比較例3に近い層厚分布となっていることが判った。
このようにテーパー長さdを適切な値に調整する事で所望のダレの位置に調整でき、また、実施例2の場合には、外周までほぼフラットな層厚分布を得ることができることが判った。
図4に示すようなサセプタを作製した。サセプタの座ぐり深さtは、シリコン単結晶基板の厚さに近い800μmとし、テーパーの高さhを100μmに固定して、テーパー長さ(座ぐり部端から外側に向かう長さ)dを実施例6ではd=22.5mm、実施例7はd=15mm、実施例8はd=7.5mm、実施例9はd=3mmとした4種類のサセプタを作製した。
サセプタの上記パラメータを表2にまとめて示す。なお、表2及び後述する図8には、後述する比較例1,2のサセプタのパラメータと、それを用いた時のシリコンエピタキシャル層の厚さのバラツキを比較のために記載しておく。
逆にテーパー長さdを短くした実施例9の場合は、テーパーを形成した事による外周ハネ効果が強まり、比較例1に近い層厚分布となっていることが判った。
このようにテーパー長さdを適切な値に調整する事で所望のハネの位置に調整できることが判った。
図10に示すようなサセプタを作製した。サセプタの座ぐり部の深さtを、比較例1では700μm、比較例2は800μm、比較例3は900μmとした3種類を準備した。
しかし、ダレ及びハネ位置も同様に大きく変化しており、外周部のエピタキシャル層のダレ及びハネ量とその位置を同時に制御して平坦にする事が困難であることが判った。
Claims (10)
- 気相成長の際に半導体基板を支持するサセプタであって、
該サセプタは、前記半導体基板が配置される座ぐり部を備え、前記座ぐり部の端から外側に向かって、前記サセプタの上面が上方または下方に傾斜するテーパーが形成されたテーパー部を有するものであることを特徴とする気相成長用半導体基板支持サセプタ。
- 前記テーパー部は、前記座ぐり部端から外側に向かう長さが、前記半導体基板の直径の1%以上7.5%未満の長さであることを特徴とする請求項1に記載の気相成長用半導体基板支持サセプタ。
- 前記テーパー部は、前記座ぐり部端から外側に向かう長さが、前記半導体基板の直径の2.5%以上7.5%未満の長さであることを特徴とする請求項1または請求項2に記載の気相成長用半導体基板支持サセプタ。
- 前記テーパー部は、その高さが前記半導体基板の厚さの30%以下であることを特徴とする請求項1ないし請求項3のいずれか1項に記載の気相成長用半導体基板支持サセプタ。
- 前記テーパーが、前記座ぐり部の全周に渡って途切れることなく形成されたものであることを特徴とする請求項1ないし請求項4のいずれか1項に記載の気相成長用半導体基板支持サセプタ。
- 前記テーパーが、前記座ぐり部の周方向に沿って間欠的に形成されたものであることを特徴とする請求項1ないし請求項4のいずれか1項に記載の気相成長用半導体基板支持サセプタ。
- 前記サセプタの前記座ぐり部の深さが、前記半導体基板の厚さの0.9~1.1倍であることを特徴とする請求項1ないし請求項6のいずれか1項に記載の気相成長用半導体基板支持サセプタ。
- 半導体基板の主表面上にエピタキシャル層を気相成長させるためのエピタキシャルウェーハ製造装置であって、
少なくとも、反応容器と、原料ガス導入管と、排気管と、加熱装置と、請求項1ないし請求項7のいずれか1項に記載のサセプタとを備えるものであることを特徴とするエピタキシャルウェーハ製造装置。
- 半導体基板上にエピタキシャル層を気相成長させるエピタキシャルウェーハの製造方法であって、
半導体基板の主表面上にエピタキシャル層を気相成長させる気相成長工程において、請求項1ないし請求項7のいずれか1項に記載のサセプタの前記座ぐり部に前記半導体基板を配置して、前記エピタキシャル層を気相成長させることを特徴とするエピタキシャルウェーハの製造方法。
- 半導体基板上にエピタキシャル層を気相成長させるエピタキシャルウェーハの製造方法であって、
半導体基板の主表面上にエピタキシャル層を気相成長させる気相成長工程において、前記半導体基板が配置される座ぐり部を備え、前記座ぐり部の端から外側に向かって、前記サセプタの上面が上方または下方に傾斜するテーパーが形成されたテーパー部を有するサセプタの前記座ぐり部に前記半導体基板を配置して、前記エピタキシャル層を気相成長させることを特徴とするエピタキシャルウェーハの製造方法。
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