WO2010067585A1 - 抵抗変化素子およびそれを用いた不揮発性半導体記憶装置 - Google Patents
抵抗変化素子およびそれを用いた不揮発性半導体記憶装置 Download PDFInfo
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- WO2010067585A1 WO2010067585A1 PCT/JP2009/006698 JP2009006698W WO2010067585A1 WO 2010067585 A1 WO2010067585 A1 WO 2010067585A1 JP 2009006698 W JP2009006698 W JP 2009006698W WO 2010067585 A1 WO2010067585 A1 WO 2010067585A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
- H10B63/82—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays the switching components having a common active material layer
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of the switching material, e.g. layer deposition
- H10N70/026—Formation of the switching material, e.g. layer deposition by physical vapor deposition, e.g. sputtering
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- H—ELECTRICITY
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Patterning of the switching material
- H10N70/063—Patterning of the switching material by etching of pre-deposited switching material layers, e.g. lithography
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
Definitions
- the present invention relates to a resistance change element whose resistance value to be stably maintained is changed by application of a voltage pulse, and a nonvolatile semiconductor memory device using the resistance change element.
- the memory cell in the case of a nonvolatile semiconductor memory element (resistance change type memory) that uses a resistance change element whose resistance value that is stably maintained by application of a voltage pulse as a memory portion, the memory cell must be configured with a simple structure. Therefore, further miniaturization, higher speed, and lower power consumption are expected.
- resistance change type memory resistance change type memory
- a memory cell that performs stable memory operation is configured using one transistor and one memory element, and high integration is performed using this memory cell.
- Patent Document 1 discloses a structure in which a resistance change region is formed in a portion to form a resistance change element.
- the resistance change region is formed directly on the lower electrode having a small area as a structure in which the lower electrode and the upper electrode of the variable resistance element have different areas in contact with the variable resistance layer. Therefore, it is possible to obtain a reliable resistance change in the vicinity of an electrode having a small connection size by applying a voltage lower than that in the prior art, so that miniaturization and power consumption can be reduced.
- Patent Document 2 An example in which a material other than a material having a perovskite structure is used as a material of the resistance change element is disclosed in Patent Document 2 (FIGS. 1 and 2 of Patent Document 2).
- Patent Document 2 it is assumed that the temperature necessary for manufacturing the variable resistance element can be made 400 ° C. or lower by using iron oxide as the variable resistance layer, and the compatibility with the semiconductor manufacturing process is improved. Yes.
- the resistance change element has a structure in which a resistance change layer is sandwiched between an upper electrode and a lower electrode. Depending on the resistance change material, the resistance change depends on a voltage having a different polarity applied between the upper electrode and the lower electrode. It is known that this occurs when the resistance of the resistance change layer near the interface between the lower electrode and the resistance change layer changes.
- the interface where the resistance change occurs is limited to one of the interfaces, and the resistance of the interface does not change from the low resistance state regardless of voltage application at the other interface. is required.
- FIG. 2 of Patent Document 2 shows a method of forming a layer having a high oxygen concentration between the resistance change layer and the lower electrode as a countermeasure. In this case as well, the interface between the resistance change layer and the upper electrode is shown. It is difficult to keep the circuit in a completely low resistance state, which causes generation of erroneous write bits in a large-scale memory.
- an object of the present invention is to provide a variable resistance element in which the probability of erroneous writing is suppressed as compared with these conventional elements, and a nonvolatile semiconductor memory device using the variable resistance element.
- one embodiment of a variable resistance element according to the present invention includes a substrate and a multilayer structure formed on the substrate, and the multilayer structure includes a first electrode and a second electrode.
- a resistance change film disposed between the electrodes and transitioning between a high resistance state and a low resistance state according to a polarity of a voltage applied between the electrodes, wherein the resistance change film includes the first electrode.
- the low concentration resistance change layer bonded to the second electrode and the high concentration resistance change layer bonded to the second electrode are stacked, and the oxygen concentration in the low concentration resistance change layer is the same as that in the high concentration resistance change layer.
- junction area between the first electrode and the low-concentration variable resistance layer is lower than the oxygen concentration, and is larger than the junction area between the second electrode and the high-concentration variable resistance layer.
- the junction area between the low-concentration resistance change layer and the electrode in contact therewith is larger than the junction area between the high-concentration resistance change layer and the electrode in contact therewith. Resistance change phenomenon is suppressed.
- the high concentration resistance change layer is patterned so as to completely cover one surface of the second electrode, and the low concentration resistance change layer is connected to the second electrode of the high concentration resistance change layer. It is good also as a structure which has covered the end surface and side surface on the opposite side to the end surface currently made.
- the high-concentration variable resistance layer other than the vicinity of the upper portion of the second electrode is removed, so that oxygen diffusion from that portion to the low-concentration variable resistance layer is avoided, and the oxygen concentration of the low-concentration variable resistance layer increases accordingly.
- the probability that high resistance (erroneous writing) occurs at the interface between the low-concentration variable resistance layer and the first electrode is further suppressed.
- a region of the surface of the high-concentration variable resistance layer that is bonded to the second electrode that is not bonded to the second electrode may be covered with an oxygen barrier.
- the end face of the second electrode opposite to the end face joined to the high-concentration variable resistance layer may be connected to the surface of the wiring formed above or below the second electrode.
- the second electrode is a via that fills a via hole provided in an interlayer insulating film disposed between the high-concentration variable resistance layer and the wiring, and the high-concentration variable resistance layer and the It is good also as a structure which electrically connects with wiring.
- the resistance change element of the present invention is configured such that the via for electrically connecting the drain or source electrode of the transistor and the lower electrode is formed of the same material as the lower electrode.
- the lower electrode can also be integrated. Thereby, process man-hours can be reduced and miniaturization can be achieved.
- the second electrode may be made of platinum and iridium or a mixture thereof.
- the first electrode may include at least one selected from copper, titanium, tungsten, tantalum, and nitrides thereof.
- the low-concentration resistance change layer and the high-concentration resistance change layer are oxygen in which the oxygen content, which is an atomic ratio, is smaller than that of an oxide having a stoichiometric composition.
- a deficient metal oxide, wherein the metal oxide is at least selected from tantalum oxide, iron oxide, titanium oxide, vanadium oxide, cobalt oxide, nickel oxide, zinc oxide, niobium oxide, and hafnium oxide.
- One kind may be included.
- the plurality of resistance change elements are formed on a substrate on which a plurality of transistors are formed, and the lower electrodes of the resistance change elements are electrically connected to the respective drain electrodes or source electrodes of the transistors and vias. Connected, a gate electrode of the transistor is connected to a word line, and a drain electrode or a source electrode of the transistor that is not electrically connected to the lower electrode of the resistance change element is orthogonal to the word line
- the 1T1R type memory cell array can be formed by connecting the upper electrode to the common plate line and being connected to the bit line arranged in the direction.
- a memory block including a plurality of memory cells each including the variable resistance element described above and a transistor having a source or a drain connected to the variable resistance element is provided.
- the first electrode of the variable resistance element and the low concentration variable resistance layer may be formed in common for a plurality of memory cells constituting the memory block.
- the high-concentration resistance change layers of the plurality of resistance change elements constituting the memory block may be formed in common for the plurality of memory cells constituting the memory block.
- the junction area on the upper electrode side of the junction area on the lower electrode side of the resistance change element can be reduced. Since the ratio can be increased, the effect of preventing a resistance change on the upper electrode side can be further enhanced. This leads to more stable resistance change operation of the variable resistance element.
- the junction area between the upper electrode and the resistance change film is larger than the junction area between the lower electrode and the resistance change film, and the oxygen concentration in the resistance change film on the lower electrode side is larger than that on the upper electrode side.
- variable resistance element and the nonvolatile semiconductor memory device that perform a resistance change operation more reliably are realized, and electronic devices such as portable information devices and information home appliances have been widely used today.
- the practical value of the variable resistance element and the nonvolatile semiconductor memory device according to the present invention which is suitable for reduction in power consumption and power consumption, is extremely high.
- FIG. 1 is a schematic diagram showing an example of a cross-sectional configuration of the variable resistance element according to the first embodiment of the present invention.
- 2A is a schematic top view showing a process of forming a wiring on a substrate in the variable resistance element manufacturing method according to the first embodiment of the present invention
- FIG. 2B is a cross-sectional view of FIG. It is a schematic diagram which shows.
- FIG. 3A is a schematic view from above showing a process until a via is formed in the variable resistance element manufacturing method according to the first embodiment of the present invention
- FIG. 4A is a schematic view from above showing a step of forming a lower electrode in the variable resistance element manufacturing method according to the first embodiment of the present invention
- FIG. 5A is a schematic view from the top showing the step of extending the upper surface of the interlayer insulating film to the upper surface of the lower electrode in the variable resistance element manufacturing method according to the first embodiment of the present invention
- FIG. b) is a schematic diagram showing a cross section of the same figure.
- FIG. 6A is a schematic view from the top showing the process until the upper electrode is formed in the variable resistance element manufacturing method according to the first embodiment of the present invention
- FIG. It is a schematic diagram which shows a cross section.
- FIG. 7A is a schematic view from above showing the configuration of the nonvolatile semiconductor memory device configured using the variable resistance element according to the first embodiment of the present invention
- FIG. 8 is a schematic diagram of a variable resistance element for explaining the effect of the variable resistance element of the present invention.
- FIG. 9 is an actual measurement diagram for explaining the influence of the junction area between the lower electrode and the resistance change film and the effect of the junction area between the upper electrode and the resistance change film in the resistance change operation of the resistance change element of the present invention.
- FIG. 10 is a schematic diagram showing an example of a cross-sectional configuration of the variable resistance element according to the second embodiment of the present invention.
- FIG. 11A is a schematic top view showing a step of forming a high-concentration variable resistance layer in the method of manufacturing a variable resistance element according to the second embodiment of the present invention, and FIG. It is a schematic diagram which shows a cross section.
- FIG. 11A is a schematic top view showing a step of forming a high-concentration variable resistance layer in the method of manufacturing a variable resistance element according to the second embodiment of the present invention
- FIG. It is a schematic diagram which shows a cross section.
- FIG. 12A is a schematic view from the top showing the steps until the formation of the upper electrode in the variable resistance element manufacturing method according to the second embodiment of the present invention, and FIG. It is a schematic diagram which shows a cross section.
- FIG. 13 is a schematic diagram illustrating an example of a cross-sectional configuration of a variable resistance element according to the third embodiment of the present invention.
- FIG. 14A is a schematic top view showing a process until an oxygen barrier film is formed in the variable resistance element manufacturing method according to the third embodiment of the present invention, and FIG. It is a schematic diagram which shows a cross section.
- FIG. 15A is a schematic top view showing a step of forming a groove for a lower electrode in the variable resistance element manufacturing method according to the third embodiment of the present invention, and FIG.
- FIG. 16A is a schematic top view showing a step of forming a lower electrode in the variable resistance element manufacturing method according to the third embodiment of the present invention
- FIG. 17A is a schematic view from the top showing the steps until the formation of the upper electrode in the variable resistance element manufacturing method according to the third embodiment of the present invention
- FIG. 18 is a schematic diagram showing an example of a cross-sectional configuration of a variable resistance element according to the fourth embodiment of the present invention.
- the shape of the storage unit and the like is schematic, and the number and the like are easy to show.
- “to form on a substrate” means to form a structure directly on a substrate and to form on a substrate via another according to a general interpretation. It means both cases.
- the “interlayer insulating film” means an interlayer insulating film formed in one process in the variable resistance element manufacturing process and a plurality of interlayer insulating films formed in a plurality of processes in the variable resistance element manufacturing process. Refers to both the interlayer insulating film formed by combining the two. Further, “seeing from the thickness direction of the substrate” means “looking through or not through the thickness direction of the substrate”.
- variable resistance element and the nonvolatile semiconductor memory device according to the first embodiment of the present invention will be described.
- FIG. 1 is a cross-sectional view showing an example of the configuration of the variable resistance element 100 according to the first embodiment of the present invention in a cross-sectional view.
- the variable resistance element 100 includes a wiring 110 formed on a substrate 101, an interlayer insulating film 105 formed so as to cover the wiring 110, and an interlayer insulating film 105. Embedded in and electrically connected to the upper surface of the wiring 110, a lower electrode 250 electrically connected to the upper surface of the via 120, an upper surface of the lower electrode 250, and a lower portion The variable resistance film 265 is formed to cover the upper surface of the electrode 250, and the upper electrode 280 is formed on the variable resistance film 265.
- the resistance change film 265 has a bipolar resistance change characteristic that transitions between a high resistance state and a low resistance state according to the polarity of the voltage applied between the upper electrode 280 and the lower electrode 250, and
- the oxygen concentration is high on the interface side with the lower electrode 250 (high concentration resistance change layer 260) and low on the interface side with the upper electrode 280 (low concentration resistance change layer 270). That is, the oxygen concentration in the low concentration resistance change layer 270 is lower than the oxygen concentration in the high concentration resistance change layer 260.
- the upper electrode 280 is an example of a first electrode joined to the low concentration resistance change layer 270
- the lower electrode 250 is an example of a second electrode joined to the high concentration resistance change layer 260.
- junction area between the low concentration resistance change layer 270 and the upper electrode 280 is larger than the junction area between the high concentration resistance change layer 260 and the lower electrode 250 (area formed by the contact surface). Further, the side surface of the resistance change film 265 and the side surface of the lower electrode 250 are not continuously connected.
- the resistance change occurs only at the interface between the high-concentration resistance change layer 260 and the lower electrode 250, and a stable resistance change operation can be realized.
- variable resistance element 100 is a schematic view showing the upper surface
- (b) is a cross-sectional view taken along the line X-X 'in each figure (a) as viewed from the direction of the arrow.
- a wiring 110 is formed by masking and etching using an exposure process (FIG. 2A and FIG. 2). (B)).
- a material such as Al, Cu, Al—Cu alloy, Ti—Al—N alloy, or the like can be used for the wiring 110.
- an Al film deposited by a sputtering method is used.
- the thickness of the wiring 110 is 200 nm or more and 400 nm or less, the width is about 0.6 ⁇ m, and the interval (gap) between the adjacent wirings 110 is about 0.8 ⁇ m.
- the via 120 is formed so as to be embedded in the interlayer insulating film 105.
- This can be formed as follows. That is, an interlayer insulating film 105 made of TEOS-SiO is deposited to a thickness of 800 nm on the structure shown in FIGS. 2A and 2B by using, for example, a CVD method and polished to 400 nm by, for example, CMP. To make the surface substantially flat.
- the interlayer insulating film 105 includes a silicon nitride (SiN) film, a silicon carbonitride (SiCN) film, a silicon carbonation (SiOC) film, or a silicon fluorine oxide (SiF) that is a low dielectric constant material.
- SiN silicon nitride
- SiCN silicon carbonitride
- SiOC silicon carbonation
- SiF silicon fluorine oxide
- a SiOF) film or the like may be used. Further, a stacked structure of these materials may be used.
- a via hole (diameter 260 nm) for connecting to the wiring 110 is formed in the interlayer insulating film 105.
- These can be easily formed by using a technique used in a general semiconductor process.
- a conductor film to be the via 120 made of tungsten (W) is formed by using, for example, a CVD method, and then CMP is performed, for example, as shown in FIGS.
- a simple structure can be formed.
- copper (Cu) or aluminum (Al) can be used as the via 120 in addition to tungsten (W).
- the lower electrode 250 is formed on the interlayer insulating film 105 including the via 120.
- This can be formed as follows. That is, after forming a metal electrode layer using a sputtering method, a CVD method, or the like, the lower electrode 250 having a predetermined size is formed by masking and etching using an exposure process.
- the lower electrode 250 it is desirable to use a noble metal material such as platinum (Pt), iridium (Ir), or a mixture thereof as an electrode that sufficiently draws out the function of the high-concentration variable resistance layer 260, that is, easily changes resistance. .
- platinum (Pt) is used.
- the dimensions of the lower electrode 250 were 0.5 ⁇ m ⁇ 0.5 ⁇ m and the film thickness was 50 nm.
- the interlayer insulating film 105 is extended to the height of the upper surface of the lower electrode 250.
- This can be formed as follows. That is, an interlayer insulating film made of TEOS-SiO is deposited on the structure shown in FIGS. 4A and 4B by using, for example, a CVD method, and the surface thereof is made substantially flat by performing, for example, CMP.
- the interlayer insulating film 105 is expanded toward the upper layer.
- the surface of the interlayer insulating film 105 is etched back, and the height of the surface of the interlayer insulating film 105 is lowered to the height of the lower electrode 250.
- FIG. 5B the height of the surface of the interlayer insulating film 105 and the height of the upper surface of the lower electrode 250 are shown to be coincident with each other. It may be exposed from the interlayer insulating film 105.
- etch back an argon (Ar) milling method or a dry etching method is used.
- a dry etching method using a chlorine (Cl) -based gas is used.
- an oxygen-deficient high concentration which is an oxide having a small oxygen content as compared with an oxide having a stoichiometric composition.
- the resistance change layer 260, the low-concentration resistance change layer 270, and the upper electrode 280 are formed.
- the preferred range of the low-concentration variable resistance layer 270 is TaO x (0 ⁇ x ⁇ 2.5), and the film thickness is preferably 30 nm to 100 nm.
- the high-concentration variable resistance layer 260 is preferably TaO y (x ⁇ y ⁇ 2.5) and has a thickness of 1 nm to 8 nm. Note that the value of x in the chemical formula of TaO x can be adjusted by adjusting the ratio of the oxygen gas flow rate to the argon gas flow rate during sputtering.
- a substrate is placed in a sputtering apparatus, and the inside of the sputtering apparatus is evacuated to about 7 ⁇ 10 ⁇ 4 Pa. Then, using tantalum as a target, the power is 250 W, the total gas pressure of argon gas and oxygen gas is 3.3 Pa, the set temperature of the substrate is 30 ° C., and the structure shown in FIGS. 5A and 5B Sputtering is performed on the substrate.
- the oxygen content in the tantalum oxide layer (that is, the composition ratio of oxygen atoms to tantalum atoms) is about 40% (TaO 0.66 ) to about 70% (TaO 2.3 ).
- the composition of the tantalum oxide layer can be measured using Rutherford backscattering method.
- the oxide having a stoichiometric composition refers to Ta 2 O 5 which is an insulator, and the metal oxide has conductivity by making it an oxygen-deficient type. Become.
- the upper electrode 280, the low-concentration resistance change layer 270, and the high-concentration resistance change layer 260 having predetermined dimensions are formed by masking and etching using an exposure process.
- the dimensions of the upper electrode 280, the low-concentration resistance change layer 270, and the high-concentration resistance change layer 260 in plan view need to be larger than the dimensions of the lower electrode 250.
- the resistance change film 265 is formed as a stack of a low concentration resistance change layer 270 that is a resistance change film having a low oxygen concentration and a high concentration resistance change layer 260 that is a resistance change film having a high oxygen concentration.
- the interface between the resistance change layer and the high-concentration resistance change layer does not necessarily have to be clearly divided into two layers, and the same effect can be obtained even if it has a continuously changing distribution.
- the variable resistance film having such an oxygen distribution is formed by, for example, a reactive sputtering method in which a tantalum (Ta) target is sputtered with oxygen (O 2 ) ions and argon (Ar) ions to form a tantalum oxide film. It can be formed by forming a tantalum oxide film while changing the ratio of (O 2 ) ions to argon (Ar) ions (decreasing the ratio of oxygen ions).
- the resistance change film 265 is similarly an oxide film containing oxygen-deficient iron, and other transition metal oxides such as titanium oxide, vanadium oxide, cobalt oxide, and oxide. At least one transition metal oxide selected from nickel, zinc oxide, niobium oxide film, hafnium oxide film, and the like can be used, and a sputtering method, a CVD method, or the like is used as the film formation method.
- the upper electrode 280 can be made of the same material as the lower electrode 250. However, the resistance of the interface of the resistance change film 265 on the upper electrode 280 side can be kept low, that is, as an electrode that hardly changes resistance.
- a metal containing at least one selected from copper (Cu), titanium (Ti), tungsten (W), tantalum (Ta), and nitrides thereof may be used.
- a sputtering method, a CVD method, or the like is used as a film forming method for these materials.
- the shape of the lower electrode 250, the resistance change film 265, and the upper electrode 280 in a plan view is shown as a square.
- the shape is not limited to this, and the shape is not limited to this.
- the same effect can be obtained by using a polygonal shape. This is the same in the description after the second embodiment described later.
- FIG. 8 shows the structure of the variable resistance element 800 examined by the present inventors.
- the junction area between the upper electrode and the resistance change film is the same as the junction area between the lower electrode and the resistance change film.
- a resistance change element 800 shown in FIG. 8 includes a substrate 101, an oxide layer 1001 formed on the substrate 101, a lower electrode 250 formed on the oxide layer 1001, an upper electrode 280, and a lower electrode. 250 and a resistance change film 265 sandwiched between the upper electrode 280 and the upper electrode 280.
- the resistance change film 265 is formed on the low-concentration resistance change layer 270 having a low oxygen content and the high-concentration resistance change having a higher oxygen content than the low-concentration resistance change layer 270.
- layer 260 is formed on the low-concentration resistance change layer 270 having a low oxygen content and the high-concentration resistance change having a higher oxygen content than the low-concentration resistance change layer 270.
- the metal oxide which is a material used for the resistance change film 265
- the metal oxide generally has a property of increasing the resistance as the oxygen concentration increases. For this reason, the resistance of the resistance change film 265 on the upper electrode 280 side immediately after being manufactured is higher than that on the lower electrode 250 side.
- applying a voltage equal to or higher than the high resistance threshold voltage which is a relatively high potential on the electrode (here, the upper electrode 280) side on which the high concentration resistance change layer 260 is formed, ) Is defined as an applied voltage.
- the application of a voltage equal to or higher than the low resistance threshold voltage at which the electrode side on which the high-concentration variable resistance layer is formed has a relatively low potential is defined as the application of the LR voltage (low resistance voltage).
- variable resistance element 800 As a result of actually producing and examining the variable resistance element 800 having the structure of FIG. 8, the present inventors have determined that the LR voltage (voltage under the condition that the upper electrode 280 side is relatively negative with respect to the lower electrode 250). If applied, the resistance value of the resistance change element 800 tends to be low, and when the HR voltage (voltage under the condition that the upper electrode 280 side is relatively positive with respect to the lower electrode 250) is applied, the resistance value of the resistance change element 800 becomes smaller. It was confirmed that it would be expensive.
- the high concentration resistance change layer 260 is made to be in contact with only the upper electrode 280, but the structure made so that the high concentration resistance change layer is in contact only with the lower electrode is also LR.
- a voltage voltage under the condition that the lower electrode side is relatively negative with respect to the upper electrode
- the resistance value of the resistance change element tends to be lowered
- the HR voltage lower electrode side is relatively with respect to the upper electrode
- the resistance change film changes due to the application of voltage has not been fully elucidated, the resistance change occurs due to oxygen atoms gathering or diffusing near the interface between the electrode and the resistance change film. It is thought that the phenomenon is appearing. That is, when a positive voltage is applied to the electrode, negatively charged oxygen atoms gather in the vicinity of the electrode, forming a high resistance layer and increasing the resistance. Conversely, if a negative voltage is applied, it is considered that oxygen atoms diffuse into the resistance change layer and the resistance decreases.
- a nonvolatile semiconductor memory device records and reproduces information by associating a high resistance value of the variable resistance element with “1” of the memory cell and a low state of “0” of the memory cell. It is important for the memory cell of the nonvolatile semiconductor memory device that the resistance value of the variable resistance element is appropriately changed by application of the HR voltage. That is, if the resistance change operation can be performed only on the electrode side on which the high-concentration resistance change layer is formed, erroneous writing is reduced.
- the resistance value of the variable resistance element does not decrease, and a phenomenon of maintaining a high resistance may occur. This is particularly noticeable when the value of
- the reason why the resistance is increased by the application of the LR voltage is that the resistance change phenomenon occurs predominantly on the electrode side where the resistance should not change, that is, on the electrode side opposite to the electrode on which the high concentration resistance change layer is formed. It is thought that it occurs at. Since this phenomenon is erroneous writing in the memory cell, it must be prevented from occurring.
- FIGS. 9A to 9F show an example of a resistance change operation of the resistance change element 800.
- the resistance change film 265 includes a tantalum oxide film (low concentration resistance change layer 270: TaO 1.8 , high concentration resistance change layer 260: TaO 2.4 ), low concentration resistance change layer 270, and high concentration resistance.
- the change layer 260 has a thickness of 50 nm and 3 nm
- the upper electrode 280 and the lower electrode 250 have Ir
- the upper electrode 280 and the lower electrode 250 have a thickness of 30 nm
- the upper electrode 280, the lower electrode 250, and the resistance change film 265 9A and 9D are 0.5 ⁇ m ⁇ 0.5 ⁇ m
- FIGS. 9B and 9E are 1.0 ⁇ m ⁇ 1.0 ⁇ m
- FIGS. 9C and 9F are 2 0.0 ⁇ m ⁇ 2.0 ⁇ m.
- the voltages displayed in FIGS. 9A to 9F are voltages applied to the upper electrode 280 with respect to the lower electrode 250.
- 9A to 9C are intended to cause a resistance change phenomenon stably in the vicinity of the electrode (upper electrode 280) on the side where the high concentration resistance change layer 260 is formed.
- the voltage was applied under the condition of
- 9 (d) to 9 (f) are intended to cause a resistance change phenomenon on the side of the electrode (lower electrode 250) opposite to the electrode (upper electrode 280) on which the high concentration resistance change layer 260 is formed.
- the voltage was applied under the condition that the LR voltage
- the electrode on which the resistance change phenomenon seems to occur predominantly is the electrode (upper electrode 280) side where the high-concentration resistance change layer 260 is formed in FIGS. 9 (a) to 9 (c).
- the electrode (lower electrode 250) side opposite to the electrode (upper electrode 280) side on which the high concentration resistance change layer 260 is formed is considered.
- the resistance change in the electrode (lower electrode 250) opposite to the electrode (upper electrode 280) side on which the high concentration resistance change layer 260 is formed is formed.
- the resistance change film that is, the low concentration resistance change layer 270
- the electrode on the electrode (lower electrode 250) opposite to the electrode (upper electrode 280) side on which the high concentration resistance change layer 260 is formed
- the bonding area with the lower electrode 250 should be increased.
- the resistance in the electrode (upper electrode 280) on which the high-concentration variable resistance layer 260 is formed is slightly increased as the junction area increases. The change phenomenon is suppressed. Therefore, in order to ensure the resistance change phenomenon in the electrode (upper electrode 280) on which the high concentration resistance change layer 260 is formed, it is preferable to reduce the junction area between the high concentration resistance change layer 260 and the upper electrode 280. .
- the resistance change operation is achieved by setting the junction area between the low-concentration resistance change layer 270 and the lower electrode 250 as large as possible, and reducing the junction area between the high-concentration resistance change layer 260 and the upper electrode 280 as much as possible. It can be seen that is stabilized.
- variable resistance element of the present invention has been invented by making use of this effect.
- the variable resistance film 265 having a low oxygen concentration that is, the low concentration variable resistance layer 270
- the junction area with the electrode (upper electrode 280) is configured to be larger than the junction area between the resistance change film 265 (that is, the high concentration resistance change layer 260) on the higher oxygen concentration side and the electrode (lower electrode 250).
- the resistance change operation of the resistance change element 100 with respect to the application of the LR voltage and the HR voltage can be stabilized.
- FIG. 7A is a schematic diagram showing the top surface of the nonvolatile semiconductor memory device 500 using the variable resistance element 100 according to the present embodiment
- FIG. 7B is a cross-sectional view taken along line XX ′ in FIG. It is sectional drawing which looked at the cross section from the arrow direction.
- the nonvolatile semiconductor memory device 500 using the variable resistance element 100 includes a substrate 102 on which a transistor (Tr) is formed, and the substrate 102.
- An interlayer insulating film 105 formed so as to cover, a via 121 formed in the interlayer insulating film 105 and electrically connected to the source / drain (source or drain) electrode 103 of the transistor (Tr), and the interlayer insulating film 105
- a wiring 110 formed in the interlayer insulating film 105 and electrically connected to the upper surface of the via 121, a via 120 formed in the interlayer insulating film 105 and electrically connected to the upper surface of the wiring 110, and formed in the interlayer insulating film 105.
- a lower electrode 250 electrically connected to the upper surface of the via 120.
- the nonvolatile semiconductor memory device 500 using the resistance change element 100 according to the present embodiment is formed in the interlayer insulating film 105 and processed into the same shape in a plan view, a low concentration resistance
- the high-concentration variable resistance layer 260 is electrically connected to the upper surfaces of at least two adjacent lower electrodes 250 at the lower interface thereof, which has a laminated structure including the change layer 270 and the upper electrode 280.
- the upper electrode 280 is electrically connected to the common plate line 113 through the via 122 formed in the interlayer insulating film 105.
- the electrode not connected to the high-concentration variable resistance layer by the via 121 or the like is connected to the bit line 112.
- the bit line 112 is connected to a read circuit (not shown) composed of a transistor formed on the surface of the substrate 102. Further, as shown in FIG. 7A, the word line 111 connected to the gate electrode 106 of the transistor (Tr) and the bit line 112 formed by the wiring 110 are arranged so as to be orthogonal in a plan view. Yes.
- a set of one resistance change element 100 and one transistor (Tr) connected in series to it is equivalent to one bit.
- a memory block composed of a plurality of memory cells is formed.
- the plurality of transistors (Tr) are separated by an element isolation unit (STI; Shallow Trench. Isolation) 104.
- STI element isolation unit
- all the lower electrodes 250 are connected to the same high-concentration variable resistance layer 260, but the high-concentration variable resistance layer 260 is 1 in the nonvolatile semiconductor memory device 500. It is not necessary to be connected to each other, and a plurality (two or more) of lower electrodes 250 may be connected to each of the plurality of high-concentration variable resistance layers 260 and connected to the same high-concentration variable resistance layer 260.
- One memory block is formed by the plurality of resistance change elements 100 having the lower electrode 250 and the plurality of transistors (Tr) connected to the lower electrode 250 of the resistance change element 100.
- the upper electrodes 280 and the low-concentration resistance change layers 270 of the plurality of resistance change elements 100 constituting the memory block are commonly used for the plurality of memory cells constituting the memory block.
- the high-concentration variable resistance layer 260 is not necessarily formed in common for a plurality of memory cells constituting the memory block.
- the dimension of the lower electrode 250 and the interval between the lower electrodes 250 are set to the minimum dimensions that can be processed. Since the junction area between the upper electrode 280 and the low-concentration variable resistance layer 270 can be sufficiently increased, high integration and stabilization of the resistance change operation of each variable resistance element 100 can be realized. Furthermore, the patterning of the high-concentration variable resistance layer 260, the low-concentration variable resistance layer 270, and the upper electrode 280 does not require local fine processing for each memory cell, and can be easily patterned by reducing patterning accuracy. It becomes.
- each lower electrode 250 needs to be connected to the source / drain electrode 103 of a separate transistor (Tr) formed on the substrate 102.
- the upper electrode 280 having a larger size is formed closer to the substrate. For this reason, in the variable resistance element 100 according to the present invention, the high concentration variable resistance layer needs to be formed on the side close to the substrate.
- variable resistance element 100 illustrated in FIG. 1 the variable resistance element according to the second to fourth embodiments described below is used. Also good.
- variable resistance element according to the second embodiment of the present invention will be described.
- FIG. 10 is a cross-sectional view showing an example of the configuration of the variable resistance element 1000 according to the second embodiment of the present invention in a cross-sectional view.
- the difference between the resistance change element 1000 according to the present embodiment and the resistance change element 100 according to the first embodiment is that the high-concentration resistance change layer 261 is formed only near the upper portion of the lower electrode 250. That is, in the present embodiment, the high-concentration resistance change layer 261 is patterned so as to completely cover one surface (here, the upper surface) of the lower electrode 250, and the low-concentration resistance change layer 271 has a high concentration.
- the resistance change layer 261 covers the end surface (here, the upper surface) and the side surface opposite to the end surface (here, the lower surface) connected to the lower electrode 250.
- the manufacturing steps up to the lower electrode 250 are the same as those in the first embodiment, and elements common to the first embodiment and the second embodiment are given the same names and described. Is omitted.
- variable resistance element 1000 is a schematic view showing the upper surface
- (b) is a cross-sectional view of the cross section taken along line X-X 'in each figure (a) as seen from the direction of the arrow.
- the high-concentration variable resistance layer 261 is formed only in the vicinity of the upper portion of the lower electrode 250. This can be formed as follows. On the structure shown in FIGS. 5A and 5B, a tantalum oxide film (TaO 2.4 ) having a high oxygen concentration is formed to a thickness of 3 nm by using, for example, a sputtering method and masked by using an exposure process. By etching, a high-concentration variable resistance layer 261 having a predetermined dimension is formed.
- the high-concentration variable resistance layer 261 desirably covers the lower electrode 250 completely in plan view, and needs to be larger than the size of the lower electrode 250 in consideration of alignment accuracy by processing.
- the dimensions are 0.6 ⁇ m ⁇ 0.6 ⁇ m.
- a low-concentration variable resistance layer 271 and an upper electrode 281 are formed, which can be formed as follows. That is, an oxygen-deficient tantalum oxide film (TaO 1.8 ) is formed to a thickness of 50 nm on the structure shown in FIGS. 11A and 11B by using, for example, a sputtering method, and further, for example, sputtering is performed thereon. A Pt film having a thickness of 50 nm is formed by using this method. Thereafter, the upper electrode 281 and the low-concentration variable resistance layer 271 having predetermined dimensions are formed by masking and etching using an exposure process.
- the dimensions of the upper electrode 281 and the low-concentration resistance change layer 271 in plan view need to be larger than the dimensions of the high-concentration resistance change layer 261, and the larger the effect, the more the effect of the present invention can be obtained.
- oxygen-deficient tantalum oxide layer (TaO x) than the oxygen-rich oxygen-deficient tantalum oxide film may be a (TaO y y> x).
- the same material as that of the first embodiment can be used for the upper electrode 281, the low concentration resistance change layer 271, and the high concentration resistance change layer 261.
- the high-concentration variable resistance layer 261 only in the vicinity of the upper portion of the lower electrode 250 and removing the other high-concentration variable resistance layers, the following effects can be obtained. That is, in a normal semiconductor element wiring process, heat of about 400 ° C. is applied, and this heat causes diffusion of oxygen from the high concentration resistance change layer to the low concentration resistance change layer, and the oxygen concentration of the low concentration resistance change layer. Becomes higher. However, by removing the high-concentration variable resistance layer other than the vicinity of the upper portion of the lower electrode 250 as shown in the present embodiment, oxygen diffusion from that portion can be eliminated. The increase in oxygen concentration can be prevented.
- FIG. 13 is a cross-sectional view showing an example of the configuration of the resistance change element 1300 according to the third embodiment of the present invention in a cross-sectional view.
- variable resistance element 1300 according to the present embodiment differs from variable resistance element 100 according to the first embodiment. That is. That is, in the present embodiment, a region that is not bonded to the lower electrode 250 in the surface bonded to the lower electrode 250 of the high-concentration variable resistance layer 260 is covered with the oxygen barrier 300.
- the manufacturing process up to the via 120 is the same as that of the first embodiment, and the elements common to the first embodiment and the third embodiment are denoted by the same names and described. Omitted.
- variable resistance element 1300 of this embodiment is a schematic view showing the upper surface
- (b) is a cross-sectional view taken along the line X-X 'in each figure (a) as viewed from the direction of the arrow.
- an interlayer insulating film made of TEOS-SiO is formed on the substrate surface (FIGS. 3A and 3B) on which the via 120 is formed by using, for example, a CVD method.
- the interlayer insulating film 105 is expanded toward the upper layer by depositing 10 nm.
- an oxygen barrier film 301 made of Si 3 N 4 is deposited by 20 nm using, for example, a CVD method.
- the interlayer insulating film 105 includes a silicon nitride (SiN) film, a silicon carbonitride (SiCN) film, a silicon carbonation (SiOC) film, or a silicon fluorine oxide (SiF) that is a low dielectric constant material.
- SiN silicon nitride
- SiCN silicon carbonitride
- SiOC silicon carbonation
- SiF silicon fluorine oxide
- a SiOF) film or the like may be used. Further, a stacked structure of these materials may be used.
- FIGS. 15A and 15B masking is performed using an exposure process, and an unmasked portion is etched using, for example, a dry etching method to form a buried lower electrode.
- a lower electrode groove 200 is formed.
- the bottom portion of the lower electrode groove 200 is larger than the upper portion of the via 120 and has the same height. However, it is not always necessary to have such a relationship.
- the bottom part of 200 and the upper part of via 120 should just overlap at least a part.
- the height of the bottom portion of the lower electrode trench 200 may be lower than the upper portion of the via 120.
- the size of the lower electrode groove in plan view is 0.6 ⁇ m ⁇ 0.6 ⁇ m, and the depth is 30 nm.
- a lower electrode 250 is formed, which can be formed as follows. Platinum (Pt) is deposited to a thickness of 40 nm on the surface of the lower electrode groove 200 shown in FIGS. 15A and 15B by using, for example, a sputtering method, and the surface is exposed until, for example, the surface of the oxygen barrier 300 is exposed. Planarization is performed using CMP.
- the lower electrode 250 is preferably made of a noble metal material such as platinum (Pt), iridium (Ir) or a mixture thereof. Further, as a deposition method, not only a sputtering method but also a plating method or the like may be used.
- FIG. 17A and FIG. The variable resistance element 1300 shown in (b) can be formed.
- variable resistance element Referring to a fourth embodiment of the present invention.
- FIG. 18 is a cross-sectional view showing an example of a configuration in a sectional view of a resistance change element 1800 according to the fourth embodiment of the present invention.
- the difference between the resistance change element 1800 according to the present embodiment and the resistance change element 100 according to the first embodiment is that a via 120 and a lower electrode 250 formed so as to be embedded in the interlayer insulating film 105 in FIG. Are integrated into the lower electrode 253 shown in FIG. That is, in this embodiment, the end surface (here, the lower surface) opposite to the end surface (here, the upper surface) joined to the high-concentration variable resistance layer 260 of the lower electrode 253 is above or below the lower electrode 253. It is connected to the surface (here, the upper surface) of the wiring 110 formed (here, below).
- the lower electrode 253 is a via that fills a via hole provided in the interlayer insulating film 105 disposed between the high concentration resistance change layer 260 and the wiring 110, and electrically connects the high concentration resistance change layer 260 and the wiring 110. Connected.
- variable resistance element 1800 of this embodiment a lower electrode such as platinum (Pt) or iridium (Ir) is used as a material embedded in the via 120 in the step of forming the via 120 in FIGS.
- the surface of the interlayer insulating film 105 is planarized using, for example, CMP until the surface of the interlayer insulating film 105 is exposed, and then the high-concentration resistance change layer 260, the low-concentration resistance, as shown in FIGS.
- the change layer 270 and the upper electrode 280 can be formed (FIG. 18).
- the via 120 and the lower electrode 250 formed so as to be embedded in the interlayer insulating film 105 are integrated, and FIG.
- the via 120 and the lower electrode 250 are similarly formed. It is possible to integrate.
- the third embodiment shows an example in which an oxygen barrier 300 is formed between the interlayer insulating film 105 and the high-concentration variable resistance layer 260 in the structure of the first embodiment (FIG. 1).
- the present invention is not limited to this, and in the structures of the second and fourth embodiments (FIGS. 10 and 18), oxygen is similarly provided between the interlayer insulating film 105 and the high-concentration variable resistance layer 260.
- a barrier 300 can be formed.
- variable resistance element and the nonvolatile semiconductor memory device according to the present invention have been described based on the first to fourth embodiments.
- present invention is not limited to these embodiments.
- the form obtained by making various modifications conceived by those skilled in the art in each embodiment and other forms realized by arbitrarily combining the components in each embodiment without departing from the gist of the present invention are also described in this embodiment. Included in the invention.
- the nonvolatile semiconductor memory device shown in FIG. 7 has a structure in which a plurality of resistance change elements 100 according to the first embodiment are arranged.
- the nonvolatile semiconductor memory device according to the present invention is like this.
- the structure is not limited to such a structure, and may have a structure in which a plurality of resistance change elements in the second to fourth embodiments are arranged, or a structure in which each resistance change element is turned upside down (for example,
- the electrodes common to each memory cell, the low-concentration variable resistance layer 270 and the high-concentration variable resistance layer 260, and the independent electrodes, vias 120, and wirings stacked on each of the memory cells, are stacked from the side closer to the substrate 101. 110).
- the lower layer of the resistance change film 265 is the high-concentration resistance change layer 260 and the upper layer is the low-concentration resistance change layer 270.
- the present invention has such a structure.
- the lower layer of the resistance change film 265 may be the low concentration resistance change layer 270 and the upper layer may be the high concentration resistance change layer 260.
- the variable resistance element according to the present invention has these two layers as long as the condition that the junction area between the low-concentration variable resistance layer and the electrode in contact therewith is larger than the junction area between the high-concentration variable resistance layer and the electrode in contact therewith There is no restriction on the vertical relationship of.
- variable resistance element of the present invention and a nonvolatile semiconductor memory device using the variable resistance element have high integration, low power, high speed operation, and stable writing and reading characteristics. It is useful as a nonvolatile semiconductor memory element and a nonvolatile semiconductor memory device used in various electronic devices such as a memory card, a portable phone, and a personal computer.
Abstract
Description
まず、本発明の第1の実施の形態における抵抗変化素子および不揮発性半導体記憶装置について説明する。
次に、本発明の第2の実施の形態における抵抗変化素子について説明する。
次に、本発明の第3の実施の形態における抵抗変化素子について説明する。
次に、本発明の第4の実施の形態における抵抗変化素子について説明する。
103 ソース/ドレイン電極
104 STI
105 層間絶縁膜
106 ゲート電極
110 配線
111 ワード線
112 ビット線
113 共通プレート線
120、121、122 ビア
200 下部電極用溝
250、253 下部電極
260、261 高濃度抵抗変化層
265 抵抗変化膜
270、271 低濃度抵抗変化層
280、281 上部電極
300 酸素バリア
301 酸素バリア膜
500 不揮発性半導体記憶装置
100、800、1000、1300、1800 抵抗変化素子
1001 酸化物層
Tr (MOS)トランジスタ
Claims (10)
- 基板と、
前記基板上に形成された多層構造体とを含み、
前記多層構造体が第1電極および第2電極と、当該電極間に配置され、当該電極間に印加される電圧の極性に応じて高抵抗状態と低抵抗状態とを遷移する抵抗変化膜と、を含み、
前記抵抗変化膜は、前記第1電極に接合された低濃度抵抗変化層と、前記第2電極に接合された高濃度抵抗変化層とが積層されて構成され、
前記低濃度抵抗変化層における酸素濃度は、前記高濃度抵抗変化層における酸素濃度よりも低く、
前記第1電極と前記低濃度抵抗変化層との接合面積が前記第2電極と前記高濃度抵抗変化層との接合面積より大きい
抵抗変化素子。 - 前記高濃度抵抗変化層は、前記第2電極の一つの面を完全に覆うようにパターニングされ、
前記低濃度抵抗変化層は、前記高濃度抵抗変化層の、前記第2電極と接続されている端面の反対側の端面および側面を覆っている
請求項1に記載の抵抗変化素子。 - 前記高濃度抵抗変化層の前記第2電極に接合されている面のうち前記第2電極に接合されていない領域が、酸素バリアで覆われている
請求項1または請求項2に記載の抵抗変化素子。 - 前記第2電極の前記高濃度抵抗変化層に接合されている端面の反対側の端面が、前記第2電極の上方または下方に形成された配線の面に接続されている
請求項1から請求項3のいずれかに記載の抵抗変化素子。 - 前記第2電極は、前記高濃度抵抗変化層と前記配線との間に配された層間絶縁膜に設けられたビアホールを埋めるビアであり、前記高濃度抵抗変化層と前記配線とを電気的に接続している
請求項4に記載の抵抗変化素子。 - 前記第2電極が、白金およびイリジウムまたはその混合物からなる
請求項1から請求項5のいずれかに記載の抵抗変化素子。 - 前記第1電極が、銅、チタン、タングステン、タンタルおよびその窒化物から選ばれる少なくとも1種を含む
請求項6に記載の抵抗変化素子。 - 前記低濃度抵抗変化層および前記高濃度抵抗変化層が、化学量論的組成を有する酸化物と比較して原子比である酸素の含有量が少ない酸化物である酸素不足型の金属酸化物であり、
前記金属酸化物は、タンタル酸化物、鉄酸化物、酸化チタン、酸化バナジウム、酸化コバルト、酸化ニッケル、酸化亜鉛、ニオブ酸化物、およびハフニウム酸化物から選ばれる少なくとも1種を含む
請求項1から請求項7のいずれかに記載の抵抗変化素子。 - 請求項1から請求項8のいずれかに記載の抵抗変化素子と、当該抵抗変化素子にソースまたはドレインが接続されたトランジスタとからなるメモリセルが複数個から構成されるメモリブロックを備え、前記メモリブロックを構成する複数の前記抵抗変化素子の前記第1電極および前記低濃度抵抗変化層は、当該メモリブロックを構成する複数のメモリセルについて共通に形成されている
不揮発性半導体記憶装置。 - 前記メモリブロックを構成する複数の前記抵抗変化素子の前記高濃度抵抗変化層は、当該メモリブロックを構成する複数のメモリセルについて共通に形成されている
請求項9に記載の不揮発性半導体記憶装置。
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JPWO2010067585A1 (ja) | 2012-05-17 |
JP4937413B2 (ja) | 2012-05-23 |
US20110240942A1 (en) | 2011-10-06 |
US8350245B2 (en) | 2013-01-08 |
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