WO2008148736A2 - Verfahren zur herstellung eines mems-packages - Google Patents

Verfahren zur herstellung eines mems-packages Download PDF

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Publication number
WO2008148736A2
WO2008148736A2 PCT/EP2008/056787 EP2008056787W WO2008148736A2 WO 2008148736 A2 WO2008148736 A2 WO 2008148736A2 EP 2008056787 W EP2008056787 W EP 2008056787W WO 2008148736 A2 WO2008148736 A2 WO 2008148736A2
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WO
WIPO (PCT)
Prior art keywords
mems chip
metal frame
carrier substrate
frame
mems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2008/056787
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German (de)
English (en)
French (fr)
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WO2008148736A3 (de
Inventor
Christian Bauer
Gregor Feiertag
Hans Krüger
Alois Stelzl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Electronics AG
Original Assignee
Epcos AG
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Filing date
Publication date
Application filed by Epcos AG filed Critical Epcos AG
Priority to JP2010510758A priority Critical patent/JP5450396B2/ja
Publication of WO2008148736A2 publication Critical patent/WO2008148736A2/de
Publication of WO2008148736A3 publication Critical patent/WO2008148736A3/de
Priority to US12/627,707 priority patent/US8404516B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00269Bonding of solid lids or wafers to the substrate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032Packages or encapsulation
    • B81B7/0058Packages or encapsulation for protecting against damages due to external chemical or mechanical influences, e.g. shocks or vibrations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/01Packaging MEMS
    • B81C2203/0136Growing or depositing of a covering layer
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/01Packaging MEMS
    • B81C2203/0172Seals
    • B81C2203/019Seals characterised by the material or arrangement of seals between parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/0557Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
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    • H01L2924/01068Erbium [Er]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/146Mixed devices
    • H01L2924/1461MEMS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
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    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Definitions

  • the invention relates to a method for producing a
  • MEMS device micro-electro-mechanical system
  • SAW component surface acoustic wave
  • FBAR component thin film bulk acoustic resonator
  • sensors for pressure, yaw rates and MEOMS microelectro opto-mechanical system
  • MEMS component micro-electro-mechanical system
  • SAW component surface acoustic wave
  • FBAR component thin film bulk acoustic resonator
  • sensors for pressure, yaw rates MEOMS
  • MEOMS microelectro opto-mechanical system
  • These and similar components have mechanically sensitive component structures on the surface of the MEMS component comprising a chip which have to be encapsulated in the package with a cavity above the chip surface.
  • an electrical connection between electrical contacts on the MEMS chip and e.g. a printed circuit board required.
  • a preferred assembly of such MEMS chips therefore takes place in a flip-chip arrangement on a substrate, which comprises electrical connections and in particular a wiring.
  • the electrical connection between the chip and substrate may comprise bumps, which may be made of solder or gold, for example.
  • the gap between the chip and the substrate is closed at the bottom edge of the chip facing the substrate.
  • different techniques have already been proposed.
  • Another possibility is to cover the component under a laminated cover.
  • a disadvantage of the known encapsulation methods is that the mounting of the chip and its encapsulation requires a large number of processing steps, which make the method complex and therefore expensive.
  • the object of the present invention is therefore to provide a method for producing a MEMS package, which leads in a simple manner to a secure encapsulation of the MEMS component.
  • a particular large-area support substrate having a plurality ⁇ number of slots for the MEMS chip.
  • Each slot on the carrier substrate has a number of the chip contacts corresponding number of electrical Anschlußflä ⁇ chen on the top. Electrically connected to these are external contacts on the underside of the carrier substrate.
  • the connection may be pure resistive, inductive, or capacitive, or may comprise several different of the mentioned possibilities in parallel.
  • Each slot has a metal frame with a flat surface that surrounds the pads.
  • a MEMS chip which has electrical contacts on its underside carrying the MEMS structures, is then placed on the carrier substrate in such a way that it rests on the metal frame with an edge region of its underside.
  • the placement of the MEMS chips can take place individually or in use or in the chip network. In this case, a larger number of MEMS chip can be placed simultaneously on the corresponding bays. This is particularly successful if the carrier substrate has a flat surface and is particularly low in distortion, so that a larger number of bays is arranged regularly and in a common plane.
  • Ver ⁇ carrier substrate and MEMS chip in a single flip-chip process in which the with ultrasound (US) of typically 60 kHz - 100 kHz acted MEMS chip having a typical compressive force of 2.5N - 5N per mm 2 chip area is applied.
  • US ultrasound
  • the desired connection of the bumps and the metal frame with the respectively provided connection surfaces then arises already at room temperature.
  • an elevated temperature may be advantageous.
  • the pressurized US flip-chip process can also take place in a second step (virtually in partial use) if the relative position of the MEMS chip and carrier substrate has already been fixed by a preceding first purely thermal or US-supported flip-chip process.
  • the two bonding processes can either be done together directly in a single joint step or be made immediately in succession in two sub-steps of a common connection process. No further action is necessary or sensible between the substeps.
  • a procedure is possible, which includes a fixation of the chip by a pressurized US flip-chip process, between MEMS chip and metal frame may well still be a gap.
  • the carrier substrate (panel) fully occupied with fixed MEMS chips can then be pressed together in a vacuum press or in a vacuum lamination unit in such a way that the MEMS chips are firmly connected to the metal frame.
  • the temperatures are chosen so that in the case of polymers on the metal frame adhesive bonds or in the case of melting solder solder joints arise.
  • the proposed method makes it possible to produce both the sealing of the MEMS package as well as the electrical and mechanical connection between the MEMS chip and the carrier substrate in a common step or the two sub-steps that follow one after the other. Additional steps to seal are no longer required.
  • An easy way to connect the metal frame with the MEMS chip is to apply a connecting means on the metal frame and / or on an edge region on the underside of the MEMS chip prior to mounting the MEMS chip.
  • This connection means establishes a firm connection between metal frame and MEMS chip in the thermal connection process.
  • a plastic ⁇ layer is suitable, which generates a Verschwei ⁇ tion and / or bonding of the two surfaces to be joined in the thermal process.
  • Welding is possible with a thermoplastic or polymer. Bonding can also take place with an uncured or partially cured reaction resin which cures during the thermal process or initiated by it and forms an adhesive bond between the MEMS chip and the metal frame.
  • solder layer as connecting means.
  • This is advantageous insbeson ⁇ particular in combination with a likewise frame-shaped structure which is formed in the connection area, so on an edge region on the underside of the MEMS chip and is dimensioned so that it when placed on the metal frame with this round in connection can occur.
  • the US-supported and possibly under Druckbeier ⁇ impact carried out thermal process then leads to the formation of a solder connection between the frame-shaped structure and metal frame.
  • the electrical connection between the MEMS chip and Stromsub ⁇ strat or the formed on the respective surfaces of electrical contacts and pads ER- follows by means of bumps, which may be formed for example as a stud or solder bumps. These may be pre-formed on the electrical contacts on the underside of the MEMS chip prior to connection. In principle, however, it is also possible form the bumps on the electrical pads of the carrier substrate.
  • the metal frame on the surface of the carrier substrate has a planar surface.
  • it can be planarized in a separate step before placing the MEMS chip, so that a seamless and air-gap-free placement of the home-level MEMS chip on the metal frame is possible.
  • it is also to planarize the surface of the Suspend ⁇ strats before producing the metal frame. With uniform growth of the metal layer or the metal layers have a plane surface of the metal frame will also ⁇ so guaranteed.
  • a carrier substrate with sufficient glat ⁇ ter surface requires no additional planarization.
  • connection process it is advantageous to support the connection process by applying a pressure, wherein the metallic and / or plastic surfaces to be joined are pressed against each other.
  • the metal frame has a relatively soft surface coating, for example a solder layer, and this is combined with a frame-shaped structure on the MEMS chip whose material is harder selected than the solder. In this way it is possible to press the frame-shaped structure into the relatively soft solder layer by applying a pressure, thus enabling a simpler and secure connection of the two surfaces. It is advantageous if the frame-shaped structure has a relatively small cross-sectional or support surface ⁇ which is small compared to the bearing surface formed by the metal frame.
  • nano-particles are in particular made of a material which has a higher hardness than the metal frame ⁇ and the frame-shaped structure. This makes it possible to press the nano-particles into the metal frame and / or the frame-shaped structure when applying a pressure after placing the MEMS chip on the metal frame and thereby to create a more intimate connection by enlarging the surfaces to be joined. This also ensures that the lateral relative positions of substrate and MEMS chip to each other are maintained and do not change during the thermal process by slipping.
  • the nano-particles with a typical size of 0.1-3.0 ⁇ m are in particular made of a ceramic material with high hardness and are advantageously electrically conductive. Suitable examples are aluminum nitride, boron nitride, carbides and in particular the electrically conductive SiC.
  • a structure for the metal frame includes, for example, an adhesive layer (eg made of Ti or Cr) followed by a layer of Cu, Ni, Au, Ag, Pt or Pd. It is also possible over the adhesive layer but a layer sequence consisting of mindes ⁇ least two of the aforementioned sequence histories.
  • the adhesive layer can also be omitted if the substrates are pretreated for example HTCC or LTCC accordingly.
  • the following layers can be applied without current or galvanic in the presence of a seed layer.
  • a preferred material for the metal frame is copper, which can be applied and patterned in a simple manner in a galvanic process on the carrier substrate. After applying a base metallization then the recess can be filled with metal by galvanic or electroless method in a simple manner.
  • the end of the process before removing the resist
  • Mask performed a planarization process, in particular a milling process, which ensures a flat surface of the metal frame. This can be created even on uneven surface of the carrier substrate even later required for the secure and tight connection plane surface on the metal frame.
  • the resist mask protects the rest of the carrier substrate from damage and contamination by the milling process. Subsequently, the resist mask is removed.
  • the surface of a copper-containing metal frame can be protected against corrosion and oxidation by a passivation layer to maintain the bondability or solderability of the copper layer.
  • a passivation layer to maintain the bondability or solderability of the copper layer.
  • layers of noble metals in particular of Au, Pd,
  • Pt and Ag applied in a thin layer on the copper frame. This can in particular be done directly after milling, in which case only the surface of the metal frame serving for connection formation is passivated.
  • connection formation between the MEMS chip and the carrier substrate requires at least one US-supported and possibly pressurized flip-chip process. Will the electric Connection made via solder bumps, a reflow soldering is sufficient and well suited.
  • An electrical Verbin ⁇ dung on stud bumps can be made in a thermosonic process by which a friction-welded joint is formed. In principle, however, other methods are also suitable which can provide a sufficient thermal budget without requiring too long a thermal exposure of the MEMS chip and carrier substrate.
  • the component structures are included on the underside of the MEMS chip in a hollow ⁇ space in which they are protected when another possible encapsulation of damage or functional impairment.
  • a metal layer For electromagnetic shielding and also for mechanical stabilization of the composite of MEMS chip and carrier substrate, it may be advantageous to cover the MEMS chip on the backside with a metal layer. This can be blanket deposited on the exposed surfaces of the carrier substrate, metal ⁇ frame, frame-shaped structure and MEMS chip.
  • a two-part process is advantageous in which in a first step, first a base metallization in a thin layer thickness is applied, for example by vapor deposition, sputtering, a CVD method or another example, plasma-assisted process. This base metallization can then be galvanically or electrolessly amplified.
  • Stabilization is obtained, for example, with a metal layer having a thickness of approximately ten ⁇ m.
  • thinner metal layers can also be applied.
  • a two-part process for producing the metallic layer consists, for example, in the application of a titanium-containing base layer, for example, which can subsequently be reinforced with copper and / or nickel. It is furthermore advantageous to contact this metallic layer with an additional electrical connection surface on the surface of the carrier substrate, which can be arranged outside the chip installation location and, in particular, connected to a ground connection.
  • the mechanical stability of the encapsulated MEMS device can also be increased by a cover with a sufficiently thick plastic layer.
  • a cover with a sufficiently thick plastic layer Such an art ⁇ material layer can be applied and cured, for example, in a drip or pouring process. However, it is also to coat the back of the MEMS chip with a synthetic material in ⁇ MoId- or Umpressvon.
  • the plastic cover may be doped with conductive particles so that it is also suitable as electromagnetic shielding. This or a similar metallic or electrically conductive doping can also serve as a seed layer for electroless applied as shielding metallization after appropriate pretreatment.
  • the plastic cover can also be combined with a metallic layer and overmoulded with the plastic layer.
  • a low-stress encapsulation is made possible by a suitable choice of materials for metal frame and frame-shaped structure.
  • frame-shaped structure and metal frames consist of two different materials it is possible to the thermal coefficient of expan ⁇ coefficients to be selected so that the whole connection structure of metal frame and frame-shaped structure in the region between MEMS chip and carrier substrate in the direction perpendicular to the chip surface has the same thermal expansion as the electrical connection via the bumps.
  • the thermal coefficient of expan ⁇ coefficients to be selected so that the whole connection structure of metal frame and frame-shaped structure in the region between MEMS chip and carrier substrate in the direction perpendicular to the chip surface has the same thermal expansion as the electrical connection via the bumps.
  • a matching effective total expansion coefficient perpendicular to the chip area can be achieved. In this way it is achieved that electrical connection and encapsulation no thermal stresses between even in temperature changes
  • Carrier substrate and MEMS chip can produce. It is furthermore advantageous if the material of MEMS chip and carrier substrate are adapted to one another in the thermal expansion and are preferably identical.
  • LT42 lithium tantalate with a 42 ° red XY section and a thermal expansion ⁇ coefficient CTE in chip level 7 ppm / ° K and 14 ppm / 0 K
  • LTCC carrier substrates it may be advantageous, to select an LTCC with a CTE value approximately equal to the average of the two CTE values in the xy plane of LT42, ie LTCC with an expansion coefficient of approximately or equal to 10.5 ppm / ° K.
  • FIG. 1 shows an arrangement of MEMS chip and carrier substrate shortly before the connection according to a first exemplary embodiment in schematic cross section.
  • FIG. 2 shows the carrier substrate in a schematic plan view.
  • Figure 3 shows an arrangement in cross section according to a second embodiment.
  • Figure 4 shows an arrangement in cross section according to a third embodiment.
  • Figure 5 shows an arrangement in cross section according to a fourth embodiment.
  • Figure 6 shows an arrangement in cross section according to a fifth embodiment.
  • FIG. 7 shows an arrangement after the connection of carrier substrate and MEMS chip.
  • Figure 8 shows an arrangement after joining and applying a metal layer in a schematic cross section.
  • Figure 9 shows an arrangement after the additional application of a plastic cover in the schematic cross section.
  • FIG. 1 shows an arrangement of a carrier substrate TS and a MEMS chip MC in a schematic cross-section before connecting the two components.
  • the MEMS chip MC is a component in the form of a chip, which has electrical contacts K for the electrical component structures (not shown in the figure) on its underside. These component structures are preferably also arranged in the region of the underside of the MEMS chip, but may also be provided in the interior of the MEMS chip.
  • the MEMS chip is shown in two parts in order to illustrate the different electrical contacting methods via stud bumps as in the left part of the illustration or via solder bumps BU "as in the right-hand part of the illustration
  • the bumps BU are on the MEMS chip prefabricated and applied directly over the electrical contacts K. For this purpose, conventional bump generating methods can be used.
  • a cost-effective and easy to implement method for producing solder bumps BU is, for example, a printing method, for example by means of a template.
  • Stud-bumps can be applied, for example in the form of gold bumps individually by means of a wire bonder.However, it is also possible to use columns (FIG. Pillars), for example, made of Cu and / or Ni and / or gold or from Sn, SnAg, etc. in a galvanic process directly on the underside of the MEMS chip.
  • solder bump having a height h before collapse of ⁇ 75 ⁇ m
  • height h 50 ⁇ m
  • typical heights for studbumps are ahead of the US flip Chip process at 35 microns, after bonding at 20 microns.
  • the carrier substrate TS is preferably a ceramic substrate on or in which an interconnection can be realized.
  • the carrier substrate is multi-layered, wherein it may have at least one internal wiring plane, which in the figure by a dashed
  • Each of the layers may e.g. 75 ⁇ m thick, so that a two-layer carrier substrate then has a total thickness of about 150 ⁇ m.
  • the carrier substrate TS can also be a foil e.g. Kapton film or LCP film, which may have a typical thickness of 50 microns in the case of a single-layer structure of the carrier substrate.
  • the carrier substrate TS electrical connection pads AF which is connected to the unillustrated electrical wiring in the interior of the carrier substrate.
  • the interconnection opens on the bottom in external contacts AK, with which the finished device can be attached and contacted in a circuit environment.
  • the carrier substrate TS has on the surface a closed metal frame MR which encloses a mounting location for the MEMS chip MC and in particular the electrical connection areas AF provided for contacting the MEMS chip on the surface of the carrier substrate.
  • the metal frame MR is characterized in particular by a flat surface.
  • the metal frame MR is planarized by a planarization process in order to obtain a particularly flat surface
  • the height of the metal frame corresponds to the height of the bumps BU after bonding of carrier substrate and MEMS chip, so for Studbumps about 20 ⁇ m, for solder bumps about 50 ⁇ m. It is an aspect ratio of about one or less, set, so that the frame, for example, 20 ⁇ m and 50 ⁇ m wide.
  • the connecting means VM is applied in a ge relative to the frame height ⁇ ringeren layer thickness.
  • the connecting means is likewise structured in the form of a frame and is arranged at least in the region of the chip edge of the MEMS chip. But it can also cover the entire metal frame or its surface.
  • the connecting means is thus shaped so that it can come into contact with the edge region of the MEMS chip when placing it.
  • a polymer layer or a polymer-curable layer is used as the bonding agent VM.
  • Reaction resins are preferably used in a pre-cured modification, which allows a simple application and structuring whose structure still has a certain deformability.
  • the pre-cured reaction resins is sufficiently dimensionally stable, so that it can be applied in a structured manner, for example by printing, and yet no undesired tiling occurs during the thermal loading when connecting the MEMS chip and carrier substrate.
  • a suitable layer thickness for such a polymer comprising bonding agent is l-10 ⁇ m. The structuring of the polymer layer takes place such that parts of the metal frame MR stay free and then metallized in a later step.
  • a material suitable for producing a solder connection in particular a solder and, for example, a tin layer, can be applied as connecting means VM.
  • a polymer-containing bonding agent is for the variant with the solder in the edge region of the MEMS chip MC a corresponding metallic surface on the MEMS chip is required, which is suitable for connection to the solder layer.
  • the underside of the MEMS chip MC a for example, is also frame-shaped, the chip edge extending along Metalli ⁇ tion comprise, for example, in composition and thickness as a UBM (under bump metalization) is formed. This may be single or multi-layered and has a solderable surface, in particular a nickel or gold surface.
  • the application of a sufficient thermal budget may be necessary.
  • This is preferably provided in the two variants using a connection means via a reflow process.
  • a solder-weld connection of the bump BU designed as a stud bump with the corresponding connection surface AF can be produced.
  • the reflow method is sufficient to simultaneously produce both the bump connection and the connection of the chip edge to the metal frame via the connection means VM.
  • FIG. 2 schematically shows a possible structuring of the surface of the carrier substrate TS.
  • This is preferably a large area and formed for example as a wafer and has a number of slots CA for MEMS chips.
  • a number of electrical pads in the form of solderable metallizations are provided, the number and arrangement of which depends on the MEMS chip MC and corresponds to the arrangement of the electrical contacts K on the MEMS chip.
  • the pads AF of each slot are surrounded by a metal frame MR, which preferably follows the shape of the MEMS chip MC or its outer edge and is here for example rectangular.
  • the MEMS chip MC deviates from the rectangular shape or the metal frame does not completely follow the chip edge of the MEMS chip and has, for example, rounded "corners.”
  • Each chip insertion location CA is separated from the adjacent one by one
  • different MEMS chips MC to be applied to a common carrier substrate TS in the proposed method along which the separation of the finished components is possible
  • a comprising a polymer or curable to a polymer resin layer may be applied directly to the edge ⁇ area of the MEMS chip, the surface of which comprises a single crystal, a semiconductor material, an oxide, a metallization or other material.
  • a solder comprising solder is applied to a solderable metallization provided in the edge region of the MEMS chip.
  • An exemplary material useful as a bonding agent is BCB (benzocyclobutene) which is thermally curable to a polymer. This can be applied in a layer thickness of, for example 1 micron - 5 microns.
  • a BCB layer applied to the edge region of the MEMS chip can be combined with a further polymer, which is applied as a bonding agent VM on the metal frame and has, for example, a thickness of approximately five ⁇ m.
  • the metal frame MR is preferably made of a material which is easy to apply and in particular planarizable. Well suited are, for example, Cu or Ni or Au, which are sufficiently soft and can be easily leveled by a milling process.
  • the height of the metal frame MR is preferably adapted to the height of the bumps after the Her ⁇ position of the bump connection. Of course, the height of the layer of the bonding agent VM before joining is also included in the height measurement.
  • the width of the frame is such that a sufficient tole ⁇ tolerance when placing the MEMS chip is adhered to the frame.
  • the outer edge of the frame may be congruent with the outer edge of the MEMS chip, but is preferably extended beyond the outer edge of the MEMS chip, thus enclosing a larger footprint than the outer edge of the MEMS chip.
  • a well-suited typical frame width is ⁇ example, at about 50 microns.
  • FIG. 3 shows, in a schematic cross-section, a further variant of how a MEMS chip MC can be securely and simply connected to the carrier substrate TS.
  • the pre-fabricated on the MEMS chip bumps BU are only shown as stud bumps, in which, as well as in all other versions, of course, also solder bumps are suitable, which are also more cost-effective to manufacture.
  • the one shown in Figure 3 differs by the connection means VM applied in the edge region of the MEMS chip and formed in the form of a metallic frame.
  • This metallic frame has a surface which is weldable to the surface of the metal frame MR, for example in a thermosonic method.
  • the metallic frame is formed narrow on the underside of the MEMS chip relative to the width of the metal frame MR and has for example a cross section of about 5x5 ⁇ m 2 .
  • This has the advantage that in the thermosonic method used to make the connection, the mechanical energy introduced by means of ultrasound is concentrated on the small area of the metallic frame-shaped structure which here serves as connecting means VM. This makes it possible to produce a weld with less force than with a larger contact surface.
  • the height of the frame-shaped structure can be chosen arbitrarily small, but sufficient material must be present in order to enable the desired friction-welding connection with the metal frame MR.
  • materials for the metallic frame-shaped and serving as connecting means VM structure are metals that the corresponding oxide ⁇ free surfaces for producing the friction welding connection have suitable surface, in particular copper, nickel, gold, palladium or platinum.
  • the metallic frame-shaped structure is produced in particular in a galvanic process, wherein a resist mask, in which the structure of the frame-shaped structure is recessed, is used. Via a previously applied base metallization, a metal in the desired layer thickness with sufficient layer thickness uniformity can be deposited by the galvanic method. Opposite the metal frame is the planarity of the frame-shaped
  • FIG. 4 shows a further variant of the proposed connection method, whereby again the two parts to be joined are shown separated from each other.
  • the MEMS chip is equipped with the same frame-shaped structure as in FIG.
  • a layer WS of a particularly metallic material which is soft in comparison to the frame-shaped structure is applied, for example a solder layer.
  • This has a relatively small layer thickness and has a greater width than the frame-shaped structure on the MEMS chip.
  • This embodiment has the advantage that when the MEMS chip is placed on the metal frame and as a consequence of a pressure exerted on the MEMS chip, the frame-shaped structure is inserted into the soft metal layer WS can impress.
  • the soft metal layer is formed as a solder layer, soldering to the frame-shaped structure is achieved.
  • An otherwise selected soft metal layer WS can be welded to the frame-shaped structure in the thermosonic process.
  • the thickness of the solder layer can be chosen so that at about 275 0 C at least partially forms a non-fusible SnCu alloy with the frame material, which no longer flows during subsequent reflow soldering and so the interior remains closed as a permanently dense cavity.
  • FIG. 5 shows a further variant in schematic cross-section ⁇ , in which the metal frame on the height of an under- bump metallization (UBM) is reduced.
  • UBM under- bump metallization
  • the UBM can have a multilayer structure and, for example, comprise an adhesive layer and a solderable or bondable layer or a layer with a bondable or solderable surface. Accordingly ⁇ speaking the height of the metal frame MR, in this Design significantly lower than that in the above embodiments.
  • Metal formed frame-shaped structure RS generated This may consist of the materials as described above. Because of the greater height, it also has a higher width than the variants described in FIGS. 3 and 4 while maintaining a favorable aspect ratio.
  • Embodiment is particularly advantageous when a planar or subsequently planarized carrier substrate, for example, when a post-planarized LTCC is used as the carrier substrate.
  • it is also favorable additional Liehe support structures, so-called Pillars on the underside of the MEMS chip which has already inherently a planar upper surface ⁇ to generate. Pillars and frame-shaped structure RS can then lie flush when placed on the formed as a UBM metal frame MR because of the plan surfaces on both sides and with a minimal gap.
  • a thin tin layer is applied at least on the surface of the metal frame MR or the surface of the frame-shaped structure RS, which enables soldering.
  • Metal frames MR and pads AF can be made of the same material or the same material combination.
  • the UBM may then have a Sn or SnAgCu surface.
  • the compound formation by means of a Thermo sonic method, a reflow process or by a Combination of both methods done.
  • the pillars on the carrier substrate can provide solder layer on the metal frame.
  • corresponding contact surfaces on the MEMS chip can then also solder layers are applied. Lot harshen on metal frame and the contact surfaces can then be designed differently, so that when optimizing the corresponding thermal expansion coefficients can be adjusted normal to the surface of the carrier substrate. It is also possible for the connection on the
  • Metal frame to use a different solder than for the preparation of the electrical connection through the pillars, which may differ in hardness, melting point or strength.
  • a SnCu solder is formed through the Cu interface of the pillar and / or the UBM during the reflow process.
  • FIG. 6 shows an arrangement prior to connection, which in principle resembles the arrangement already described in FIG.
  • this arrangement comprises a metal frame MR on the carrier substrate TS and a metallic frame-shaped structure RS in the edge ⁇ area at the bottom of the MEMS chip MC.
  • the metal frame MR with the height h 2 and the frame-shaped structure RS with the height hl can consist of the same or different materials and have approximately the same height.
  • the materials are selected so that they can be combined in a thermosonic process.
  • preferred material is copper, which can be planarized well and by mistake with a bondable Surface is made of gold, for example, in Thermosonic method with a similar surface connectable.
  • a further metal layer or a partial layer is produced on the metal surface of either the metal frame or the metallic frame-shaped structure, in which small-particle particles of hard materials such as diamond grains are embedded.
  • this layer is applied in particular after the planarization. Then it is ensured that these hard finely divided particles protrude partially from the surface of the layer or sub-layer in which they are embedded.
  • these protruding hard particles can now press into the respective opposite metallic surface. In this way it is achieved that an optionally formed oxide layer is broken or pierced, wherein the underlying metal is exposed and is available for a bonding process.
  • this also called “nano-piercing” process provides a firmer connection by the mutual entanglement on the drilling hard particles.
  • metal frames MR and frame-shaped structure RS consist of different materials, it is advantageous to set their heights above the carrier substrate or above the MEMS chip in a suitable ratio in order to achieve a desired thermal expansion coefficient. It is optimal if the composite of metal frame and frame-shaped structure in the sum has the same thermal expansion behavior as the bump BU. this will achieved when the corresponding heights and expansion coefficient CTE ⁇ be set in the following relationship:
  • FIG. 7 shows a cross section of an arrangement after the connection of MEMS chip and carrier substrate.
  • the bumps now connect the electrical contacts K with the pads AF, while sealed between the MEMS chip and the carrier substrate by metal ⁇ frame and frame-shaped structure RS creates a cavity HR and is enclosed. This is independent of the chosen materials for metal frame, frame-shaped structure or optionally connecting means.
  • FIG. 8 shows, in schematic cross-section, a first possibility in which a full-area metallization is provided on the rear side of the MEMS chip, metal frame and carrier substrate.
  • This metallization which can be applied in a thickness of, for example, 20 to 50 microns, can be produced in a two-stage process. For this purpose, a thin metal layer is first applied over the entire surface of the gas phase, for example in a sputtering process.
  • the metal layer GM may, for example, essentially comprise copper, which is easy to apply in the galvanic process. As passivation layer, it is possible to apply even a nickel or gold layer, but not required.
  • a plastic film is applied over the entire back side in such a way that it is a MEMS chip prior to application of the full-area metallization MC, metal frame MR and surface of the carrier substrate TS covered. Subsequently, at least in the region of the metal frame, part of the plastic film is removed and the metal frame is exposed there. Preferably, the exposure takes place along a line enclosing the MEMS chip. If a photosensitive film is used for the plastic film, it can be patterned directly with light or a laser. However, photo-structuring with the aid of an additionally applied photoresist or exposure by means of the thermal alone is also possible
  • the full-surface metallization can be applied, which can then complete in the exposed area with the metal frame, thus enabling a hermetic seal.
  • the plastic film can be structured directly or indirectly in such a way that acoustically damping structures on the back side of the MEMS chip are formed at the same time.
  • An example regular or irregular in the plastic film on the back side of the MEMS chip textured pattern produced in the closing of a corresponding metallization metallization ⁇ in the interfering acoustic wave PelN einkop- and then die out there or be attenuated there.
  • a metallization thickness of approx. 10-30 ⁇ m is suitable for this purpose.
  • the metal Cu or Ni or a layer combination of Ni and Cu can be applied.
  • FIG. 9 illustrates in cross-section a further component which, in addition to the whole-area metallization, is covered by a plastic cover GT.
  • a plastic cover GT This can be done by injection molding, for example by injection molding or by dropping reaction resin as globules. Top mass be applied.
  • This plastic envelope GT can be produced additionally or alternatively to the metallization.
  • the plastic sheath can be applied in a substantially higher thickness than the metal layer, for example in a thickness of 50 ⁇ m to 500 ⁇ m.
  • the manufacturing processes for the MEMS components are completed. Subsequently, the individual components, if several are generated on a large-area carrier substrate, can be isolated. This can be done for example by means of sawing along the separation lines TL shown in Figure 2.
  • the separation on the chip side when a plurality of arranged on a MEMS wafer MEMS chips used at the wafer level, and thus placed a plurality ⁇ number on a wafer realized MEMS chips together on the plurality of metal frame and with connected to this.
  • the singulation of the MEMS chips can be performed in a DBG process (dicing before grinding), in which the MEMS wafer initially (prior to placement on the carrier substrate) from the upper side (corresponds in mounted state of the underside) incisions along the
  • Dividing lines are made to a depth corresponding to the later desired thickness of the chip. Then, the MEMS wafer is draw ⁇ ground from the rear until the cuts made by the other side are free ground and the components are so isolated. Such chip isolation is then carried out before the application of the metal layer and / or the plastic cover.
  • the invention is not limited to the variants described in the figures and the exemplary embodiments. Rather, it is possible to combine individual measures of the connection method with each other. However, it is always important and advantageous for both the electrical connection and the sealing of the cavity between the MEMS chip and the carrier substrate to take place in a common or two similar successive steps, which is at least sufficient for the component to follow through further processes Covers with metal and / or plastic can be further encapsulated.

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  • Computer Hardware Design (AREA)
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