WO2008120335A1 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

Info

Publication number
WO2008120335A1
WO2008120335A1 PCT/JP2007/056716 JP2007056716W WO2008120335A1 WO 2008120335 A1 WO2008120335 A1 WO 2008120335A1 JP 2007056716 W JP2007056716 W JP 2007056716W WO 2008120335 A1 WO2008120335 A1 WO 2008120335A1
Authority
WO
WIPO (PCT)
Prior art keywords
gate electrode
side wall
semiconductor device
strain
channel region
Prior art date
Application number
PCT/JP2007/056716
Other languages
English (en)
French (fr)
Inventor
Toshihiko Miyashita
Keiji Ikeda
Original Assignee
Fujitsu Microelectronics Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Microelectronics Limited filed Critical Fujitsu Microelectronics Limited
Priority to JP2009507327A priority Critical patent/JP5206668B2/ja
Priority to PCT/JP2007/056716 priority patent/WO2008120335A1/ja
Priority to CN200780052401XA priority patent/CN101641770B/zh
Publication of WO2008120335A1 publication Critical patent/WO2008120335A1/ja
Priority to US12/561,841 priority patent/US20100025744A1/en
Priority to US13/440,625 priority patent/US20120190162A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823864Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6653Unipolar field-effect transistors with an insulated gate, i.e. MISFET using the removal of at least part of spacer, e.g. disposable spacer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66636Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66659Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7843Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7848Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/161Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66613Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66628Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location

Abstract

 半導体装置は、半導体基板上のゲート電極(13)と、前記ゲート電極下方の半導体基板領域に設けられるチャネル領域(CH)と、前記チャネル領域に応力を与える歪生成層(21)と、を有し、前記チャネル領域のソース端(A)に印加される歪みの絶対値は、ドレイン端に印加される歪みの絶対値よりも大きい。良好な構成例では、ゲート電極の側壁に形成されるサイドウォールスペーサ(17)をさらに有し、前記ゲート電極のソース側に形成されるサイドウウォール幅(W1)が、前記ゲート電極のドレイン側に形成されるサイドウォール幅(W2)よりも小さい。
PCT/JP2007/056716 2007-03-28 2007-03-28 半導体装置およびその製造方法 WO2008120335A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2009507327A JP5206668B2 (ja) 2007-03-28 2007-03-28 半導体装置の製造方法
PCT/JP2007/056716 WO2008120335A1 (ja) 2007-03-28 2007-03-28 半導体装置およびその製造方法
CN200780052401XA CN101641770B (zh) 2007-03-28 2007-03-28 半导体器件及其制造方法
US12/561,841 US20100025744A1 (en) 2007-03-28 2009-09-17 Semiconductor device and method of manufacturing same
US13/440,625 US20120190162A1 (en) 2007-03-28 2012-04-05 Semiconductor device and method of manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/056716 WO2008120335A1 (ja) 2007-03-28 2007-03-28 半導体装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/561,841 Continuation US20100025744A1 (en) 2007-03-28 2009-09-17 Semiconductor device and method of manufacturing same

Publications (1)

Publication Number Publication Date
WO2008120335A1 true WO2008120335A1 (ja) 2008-10-09

Family

ID=39807928

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/056716 WO2008120335A1 (ja) 2007-03-28 2007-03-28 半導体装置およびその製造方法

Country Status (4)

Country Link
US (2) US20100025744A1 (ja)
JP (1) JP5206668B2 (ja)
CN (1) CN101641770B (ja)
WO (1) WO2008120335A1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2115778A1 (en) * 2007-02-28 2009-11-11 Freescale Semiconductor, Inc. Source/drain stressor and method therefor
JP2010103495A (ja) * 2008-09-29 2010-05-06 Adeka Corp 半導体デバイス、その製造装置及び製造方法
JP2010118500A (ja) * 2008-11-13 2010-05-27 Toshiba Corp 半導体装置及びその製造方法
JP2011035393A (ja) * 2009-07-29 2011-02-17 Internatl Business Mach Corp <Ibm> 埋め込み拡張領域を有するsoiトランジスタ、及びその形成方法
JP2011054972A (ja) * 2009-09-03 2011-03-17 Internatl Business Mach Corp <Ibm> 集積回路構造及びその製造方法
JP2013229597A (ja) * 2012-04-25 2013-11-07 Samsung Electronics Co Ltd 応力近接効果を有する集積回路

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102420138A (zh) * 2010-09-25 2012-04-18 中芯国际集成电路制造(上海)有限公司 晶体管的制作方法
DE102011003385B4 (de) * 2011-01-31 2015-12-03 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung einer Halbleiterstruktur mit verformungsinduzierendem Halbleitermaterial
CN103000689B (zh) * 2011-09-19 2017-05-03 中国科学院微电子研究所 半导体器件及其制造方法
US8673165B2 (en) * 2011-10-06 2014-03-18 International Business Machines Corporation Sidewall image transfer process with multiple critical dimensions
CN102437051A (zh) * 2011-11-24 2012-05-02 上海华力微电子有限公司 硅化物阻止层刻蚀方法、通孔刻蚀停止层形成方法
US9190277B2 (en) 2011-12-08 2015-11-17 Texas Instruments Incorporated Combining ZTCR resistor with laser anneal for high performance PMOS transistor
CN102569094A (zh) * 2012-02-28 2012-07-11 上海华力微电子有限公司 一种减小半导体器件栅诱导漏极泄漏的方法
CN102610527A (zh) * 2012-03-23 2012-07-25 上海华力微电子有限公司 提高共源运算放大器频率特性的mos器件制造方法
CN102610526A (zh) * 2012-03-23 2012-07-25 上海华力微电子有限公司 减小热载流子注入损伤的侧墙刻蚀方法
CN102623502A (zh) * 2012-03-23 2012-08-01 上海华力微电子有限公司 共源极运算放大器及其制造方法
CN103378006B (zh) * 2012-04-23 2015-08-12 中芯国际集成电路制造(上海)有限公司 应力记忆技术中形成应力层的方法
KR20140042460A (ko) * 2012-09-28 2014-04-07 삼성전자주식회사 반도체 소자
US20140229324A1 (en) * 2013-02-08 2014-08-14 Thomson Licensing Method and system for recommending items
US9054041B2 (en) * 2013-07-18 2015-06-09 GlobalFoundries, Inc. Methods for etching dielectric materials in the fabrication of integrated circuits
CN104835737B (zh) * 2014-02-07 2018-09-04 无锡华润上华科技有限公司 半导体器件及其制作方法
US10043903B2 (en) * 2015-12-21 2018-08-07 Samsung Electronics Co., Ltd. Semiconductor devices with source/drain stress liner
WO2017171741A1 (en) * 2016-03-30 2017-10-05 Intel Corporation Microelectronic transistor source/drain formation using angled etching
US11205578B2 (en) * 2017-10-18 2021-12-21 Texas Instruments Incorporated Dopant anneal with stabilization step for IC with matched devices
US10422818B2 (en) * 2017-12-30 2019-09-24 Texas Instruments Incorporated Power transistors with a resistor coupled to a sense transistor
CN110233107A (zh) * 2018-03-05 2019-09-13 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US11023126B2 (en) 2018-12-19 2021-06-01 Samsung Electronics Company, Ltd. Touch gesture confirmation
US10896855B2 (en) * 2019-06-10 2021-01-19 Applied Materials, Inc. Asymmetric gate spacer formation using multiple ion implants
CN112753105B (zh) * 2020-12-14 2023-05-26 英诺赛科(苏州)科技有限公司 半导体器件结构及其制造方法
US20220238712A1 (en) * 2021-01-28 2022-07-28 Mediatek Inc. Semiconductor device and method of forming the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01138734A (ja) * 1987-11-25 1989-05-31 Mitsubishi Electric Corp 複導電体層を有する半導体装置およびその製造方法
JPH07235675A (ja) * 1994-02-24 1995-09-05 Nec Corp 半導体装置の製造方法
JP2003086708A (ja) * 2000-12-08 2003-03-20 Hitachi Ltd 半導体装置及びその製造方法
JP2006108403A (ja) * 2004-10-06 2006-04-20 Seiko Epson Corp 半導体装置および半導体装置の製造方法
JP2007501518A (ja) * 2003-08-04 2007-01-25 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 非対称の側壁スペーサの形成方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2789931B2 (ja) * 1991-05-27 1998-08-27 日本電気株式会社 半導体装置
JPH098290A (ja) * 1995-06-20 1997-01-10 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP2002190589A (ja) * 2000-12-20 2002-07-05 Mitsubishi Electric Corp 半導体装置およびその製造方法
DE10250899B4 (de) * 2002-10-31 2008-06-26 Advanced Micro Devices, Inc., Sunnyvale Verfahren zum Entfernen von Seitenwandabstandselementen eines Halbleiterelements unter Anwendung eines verbesserten Ätzprozesses
JP4237660B2 (ja) * 2004-03-19 2009-03-11 株式会社東芝 半導体装置の製造方法
DE102005009023B4 (de) * 2005-02-28 2011-01-27 Advanced Micro Devices, Inc., Sunnyvale Verfahren zum Herstellen einer Gateelektrodenstruktur mit asymmetrischen Abstandselementen und Gateestruktur
JP4426988B2 (ja) * 2005-03-09 2010-03-03 富士通マイクロエレクトロニクス株式会社 pチャネルMOSトランジスタの製造方法
US7892928B2 (en) * 2007-03-23 2011-02-22 International Business Machines Corporation Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01138734A (ja) * 1987-11-25 1989-05-31 Mitsubishi Electric Corp 複導電体層を有する半導体装置およびその製造方法
JPH07235675A (ja) * 1994-02-24 1995-09-05 Nec Corp 半導体装置の製造方法
JP2003086708A (ja) * 2000-12-08 2003-03-20 Hitachi Ltd 半導体装置及びその製造方法
JP2007501518A (ja) * 2003-08-04 2007-01-25 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 非対称の側壁スペーサの形成方法
JP2006108403A (ja) * 2004-10-06 2006-04-20 Seiko Epson Corp 半導体装置および半導体装置の製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2115778A1 (en) * 2007-02-28 2009-11-11 Freescale Semiconductor, Inc. Source/drain stressor and method therefor
EP2115778A4 (en) * 2007-02-28 2011-11-02 Freescale Semiconductor Inc SOURCE DRAIN STRESSOR AND METHOD THEREFOR
JP2010103495A (ja) * 2008-09-29 2010-05-06 Adeka Corp 半導体デバイス、その製造装置及び製造方法
JP2010118500A (ja) * 2008-11-13 2010-05-27 Toshiba Corp 半導体装置及びその製造方法
JP2011035393A (ja) * 2009-07-29 2011-02-17 Internatl Business Mach Corp <Ibm> 埋め込み拡張領域を有するsoiトランジスタ、及びその形成方法
JP2011054972A (ja) * 2009-09-03 2011-03-17 Internatl Business Mach Corp <Ibm> 集積回路構造及びその製造方法
JP2013229597A (ja) * 2012-04-25 2013-11-07 Samsung Electronics Co Ltd 応力近接効果を有する集積回路

Also Published As

Publication number Publication date
CN101641770A (zh) 2010-02-03
US20120190162A1 (en) 2012-07-26
CN101641770B (zh) 2012-03-07
US20100025744A1 (en) 2010-02-04
JPWO2008120335A1 (ja) 2010-07-15
JP5206668B2 (ja) 2013-06-12

Similar Documents

Publication Publication Date Title
WO2008120335A1 (ja) 半導体装置およびその製造方法
WO2008126490A1 (ja) 半導体装置およびその製造方法
WO2008099528A1 (ja) 表示装置、表示装置の製造方法
TW200631065A (en) Strained transistor with hybrid-strain inducing layer
WO2009120612A3 (en) Semiconductor devices having tensile and/or compressive strain and methods of manufacturing and design structure
TW200731530A (en) Semiconductor devices and methods for fabricating the same
SG139657A1 (en) Structure and method to implement dual stressor layers with improved silicide control
TW200620489A (en) Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor
TW200742045A (en) Semiconductor device having a recess channel transistor
TWI257145B (en) Offset spacer formation for strained channel CMOS transistor
WO2006034189A3 (en) High-mobility bulk silicon pfet
WO2007124209A3 (en) Stressor integration and method thereof
TW200802628A (en) Semiconductor structure and fabrications thereof
WO2008147433A3 (en) Methods and devices employing metal layers in gates to introduce channel strain
WO2011071598A3 (en) Quantum-well-based semiconductor devices
WO2007127503A3 (en) Structure and method for mosfet gate electrode landing pad
TW200717777A (en) Semiconductor memory device and manufacturing method thereof
TW200703641A (en) Semiconductor device and fabrication method thereof
TW200744156A (en) Semiconductor structure, semiconductor device and the method for fabricating thereof
TW200725882A (en) Five channel fin transistor and method for fabricating the same
WO2008106244A3 (en) Strained metal gate structure for cmos devices
EP1873838A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
TW200709430A (en) Method for forming a thin-film transistor
TW200705661A (en) Semiconductor device and method for fabricating the same
WO2009108366A3 (en) A semiconductor device comprising a metal gate stack of reduced height and method of forming the same

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200780052401.X

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07740154

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2009507327

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07740154

Country of ref document: EP

Kind code of ref document: A1