JP2011054972A - 集積回路構造及びその製造方法 - Google Patents
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Abstract
【解決手段】 本発明の方法は、少なくとも1つの半導体チャネル領域を有する基板と、半導体チャネル領域を覆うように基板の上面に設けられたゲート誘電体層と、ゲート誘電体層上のゲート導電体とを有する構造を形成する。非対称的な側壁スペーサがゲート導電体の側壁に配置され、そして非対称的なソース及びドレイン領域が半導体チャネル領域に隣接して基板内に配置される。ソース及びドレイン領域の一方は、他方よりもゲート導電体の中心に近づけられる。ソース及びドレイン領域は、半導体チャネル領域に物理的な応力を与える材料で構成される。
【選択図】 図7
Description
Claims (21)
- 少なくとも1つの半導体チャネル領域及び上面を有する基板と、
前記半導体チャネル領域を覆うように前記基板の上面に設けられたゲート誘電体層と、
前記ゲート誘電体上に設けられ、側壁を有するゲート導電体と、
前記ゲート導電体の前記側壁上に設けられた非対称的な側壁スペーサと、
前記半導体チャネル領域に隣接するように前記基板内に設けられた非対称的なソース及びドレイン領域であって、前記ソース及びドレイン領域の一方の領域は、前記ソース及びドレイン領域の他方の領域よりも前記ゲート導電体の中心に近くされており、前記ソース及びドレイン領域は前記半導体チャネル領域に物理的応力を誘起する材料で構成されている前記ソース及びドレイン領域とを備える構造。 - 前記ソース及びドレイン領域は、前記半導体チャネル領域内の非対称的なトレンチ内に配置されている、請求項1に記載の構造。
- 前記ソース及びドレイン領域の寸法は互いに異なる、請求項1に記載の構造。
- 前記ソース及びドレイン領域は、炭化ケイ素及びシリコンゲルマニウムからなる群から選択される材料で構成されている、請求項1に記載の構造。
- 前記ソース及びドレイン領域は、前記半導体チャネル領域に圧縮力及び引っ張り力の一方を誘起させる材料で構成されている、請求項1に記載の構造。
- 少なくとも1つの半導体チャネル領域及び上面を有する基板と、
前記半導体チャネル領域を覆うように慚愧基板の上面に設けられたゲート誘電体層と、
前記ゲート誘電体上に設けられたゲート導電体と、
前記半導体チャネル領域に隣接するように前記基板内に設けられた非対称的なソース及びドレイン領域であって、前記ソース及びドレイン領域の一方の領域は、前記ソース及びドレイン領域の他方の領域よりも前記ゲート導電体の中心に近くされており、前記ソース及びドレイン領域は
エピタキシャル材料で構成され、前記ソース及びドレイン領域は前記半導体チャネル領域に物理的応力を誘起する材料で構成されている前記ソース及びドレイン領域とを備える構造。 - 前記ソース及びドレイン領域は、前記半導体チャネル領域内の非対称的なトレンチ内に配置されている、請求項6記載の構造。
- 前記ソース及びドレイン領域は同じ寸法を有する、請求項6記載の構造。
- 前記ソース及びドレイン領域は、炭化ケイ素及びシリコンゲルマニウムからなる群から選択された材料で構成されている、請求項6記載の構造。
- 前記ソース及びドレイン領域は、前記半導体チャネル領域に圧縮力及び引っ張り力の一方を誘起させる材料で構成されている、請求項6記載の構造。
- 浅いトレンチ分離領域で囲まれた基板の上面の下側に少なくとも1つの半導体チャネル領域を形成するように不純物を前記基板に導入するステップと、
前記半導体チャネル領域を覆うように前記基板の上面にゲート誘電体層を形成するステップと、
前記ゲート誘電体層の上に側壁を有するゲート導電体を形成するステップと、
前記ゲート導電体の前記側壁に非対称的な側壁スペーサを形成するステップと、
一方のトレンチが他方のトレンチよりも前記ゲート導電体の中心に近い非対称的なトレンチを前記半導体チャネル領域に形成するように、前記非対称的な側壁スペーサを位置決め用案内として使用して前記トレンチを前記半導体チャネル領域に形成するステップと、
前記非対称的なトレンチ内にソース及びドレイン領域をエピタキシャル成長させるステップであって、前記ソース及びドレイン領域の一方の領域は、前記ソース及びドレイン領域の他方の領域よりも前記ゲート導電体の中心に近くされており、前記ソース及びドレイン領域は前記半導体チャネル領域に物理的応力を誘起する材料で構成されている、前記ステップとを含む方法。 - 前記トレンチを前記半導体チャネル領域に形成するステップは、互いに異なる寸法のトレンチを形成する、請求項11記載の方法。
- 前記エピタキシャル成長させるステップは、同じ寸法のソース及びドレイン領域を形成する、請求項11記載の方法。
- 前記エピタキシャル成長させるステップは、前記非対称的なトレンチ内に炭化ケイ素及びシリコンゲルマニウムからなる群から選択された材料をエピタキシャル成長させる、請求項11記載の方法。
- 前記エピタキシャル成長させるステップは、前記半導体チャネル領域に圧縮力及び引っ張り力の一方を誘起させる材料の前記ソース及びドレイン領域を形成する、請求項11記載の方法。
- 浅いトレンチ分離領域で囲まれた基板の上面の下側に少なくとも1つの半導体チャネル領域を形成するように不純物を前記基板に導入するステップと、
前記半導体チャネル領域を覆うように前記基板の上面にゲート誘電体層を形成するステップと、
前記ゲート誘電体層の上に側壁を有するゲート導電体を形成するステップと、
前記ゲート導電体の側壁に側壁スペーサを形成するステップと、
前記側壁スペーサを位置決め用案内として使用して前記半導体チャネル領域内にトレンチを形成するステップであって、前記トレンチは前記ゲート導電体の真下の内側トレンチ側壁及び前記浅いトレンチ分離領域に隣接する外側トレンチ側壁を有する、前記ステップと、
前記ゲート導電体の第1の側に近接する第1の内側トレンチ側壁に注入される材料の量と前記第1の側と反対側にある前記ゲート導電体の第2の側に近接する第2の内側トレンチ側壁に注入される材料の量とが異なるように、前記材料を注入する角度付け注入を行うステップと、
前記ゲート導電体の第1の側に近接する第1の内側トレンチ側壁に注入される材料の量と前記第1の側と反対側にある前記ゲート導電体の第2の側に近接する第2の内側トレンチ側壁に注入される材料の量とが異なることに基づき、前記第1の内側トレンチ側壁から材料を除去する速度と前記第2の内側トレンチ側壁から材料を除去する速度が異なる材料除去プロセスを行うことにより、前記トレンチの一方が他方のトレンチよりも前記ゲート導電体の中心に近い非対称的トレンチを形成するステップと、
前記非対称的なトレンチ内にソース及びドレイン領域をエピタキシャル成長させるステップであって、前記ソース及びドレイン領域の一方の領域は、前記ソース及びドレイン領域の他方の領域よりも前記ゲート導電体の中心に近くされており、前記ソース及びドレイン領域は前記半導体チャネル領域に物理的応力を誘起する材料で構成されている、前記ステップとを含む方法。 - 前記非対称的トレンチを形成するステップは、互いに異なる寸法のトレンチを形成する、請求項16記載の方法。
- 前記エピタキシャル成長させるステップは、互いの異なる寸法を有するソース及びドレイン領域を形成する、請求項16記載の方法。
- 前記エピタキシャル成長させるステップは、前記非対称的なトレンチ内に炭化ケイ素及びシリコンゲルマニウムからなる群から選択された材料をエピタキシャル成長させる、請求項16記載の方法。
- 前記エピタキシャル成長させるステップは、前記半導体チャネル領域に圧縮力及び引っ張り力の一方を誘起させる材料の前記ソース及びドレイン領域を形成する、請求項16記載の方法。
- 浅いトレンチ分離領域で囲まれた基板の上面の下側に少なくとも1つの半導体チャネル領域を形成するように不純物を前記基板に導入するステップと、
前記半導体チャネル領域を覆うように前記基板の上面にゲート誘電体層を形成するステップと、
前記ゲート誘電体層の上に側壁を有するゲート導電体を形成するステップと、
前記ゲート導電体の側壁に側壁スペーサを形成するステップと、
前記側壁スペーサを位置決め用案内として使用して前記半導体チャネル領域内にトレンチを形成するステップであって、前記トレンチは前記ゲート導電体の真下の内側トレンチ側壁及び前記浅いトレンチ分離領域に隣接する外側トレンチ側壁を有する、前記ステップと、
前記トレンチの一方のトレンチをマスクで保護するステップと、
前記トレンチの一方のトレンチと他方のトレンチとが非対称的トレンチとなるように、前記一方のトレンチの側壁の材料を除去する材料除去プロセスを行うステップと、
前記トレンチ内に、前記半導体チャネル領域に物理適応力を誘起する材料のソース及びドレイン領域をエピタキシャル成長させるステップとを含む方法。
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