WO2006090432A1 - SiC単結晶基板の製造方法 - Google Patents
SiC単結晶基板の製造方法 Download PDFInfo
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- WO2006090432A1 WO2006090432A1 PCT/JP2005/002791 JP2005002791W WO2006090432A1 WO 2006090432 A1 WO2006090432 A1 WO 2006090432A1 JP 2005002791 W JP2005002791 W JP 2005002791W WO 2006090432 A1 WO2006090432 A1 WO 2006090432A1
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- Prior art keywords
- single crystal
- crystal substrate
- sic single
- sic
- substrate
- Prior art date
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- 239000000758 substrate Substances 0.000 title claims abstract description 145
- 239000013078 crystal Substances 0.000 title claims abstract description 102
- 238000000034 method Methods 0.000 title claims abstract description 50
- 238000001020 plasma etching Methods 0.000 claims abstract description 10
- 230000001590 oxidative effect Effects 0.000 claims abstract description 7
- 230000003647 oxidation Effects 0.000 claims description 38
- 238000007254 oxidation reaction Methods 0.000 claims description 38
- 238000005530 etching Methods 0.000 claims description 26
- 238000004519 manufacturing process Methods 0.000 claims description 20
- 238000005498 polishing Methods 0.000 claims description 18
- 230000003746 surface roughness Effects 0.000 claims description 11
- 239000007789 gas Substances 0.000 claims description 10
- 229910052760 oxygen Inorganic materials 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- 239000011261 inert gas Substances 0.000 claims description 3
- 238000009499 grossing Methods 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 description 20
- 238000005520 cutting process Methods 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 239000008119 colloidal silica Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 229910021480 group 4 element Inorganic materials 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 150000003254 radicals Chemical class 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0475—Changing the shape of the semiconductor body, e.g. forming recesses
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/36—Carbides
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/08—Etching
- C30B33/12—Etching in gas atmosphere or plasma
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/931—Silicon carbide semiconductor
Definitions
- the present invention relates to a method for manufacturing a SiC single crystal substrate.
- SiC single crystals have a wider band gap, a higher dielectric breakdown electric field, and higher thermal conductivity than Si single crystals and GaAs single crystals. These characteristics are suitable for semiconductor elements that operate at high temperatures and power semiconductor elements with a high breakdown voltage. SiC single crystals are used as semiconductor elements with characteristics that cannot be obtained with conventional Si semiconductors. Research on semiconductor devices is underway. Since the SiC single crystal produced by the prior art is not high in crystal quality, a semiconductor element was produced by forming an SiC epitaxial layer on a substrate using the SiC single crystal. However, in recent years, SiC single crystals having good characteristics have been obtained, and the production of semiconductor elements in SiC single crystal substrates has also been studied.
- GaN-based semiconductor element that emits ultraviolet or blue light as a light source for recording / reproducing information at a high recording density using an optical recording medium or a light source for image display and illumination Research is underway. Since GaN-based semiconductors are generally difficult to grow into the shape of a large single-crystal ingot with few crystal defects, a technique for epitaxially growing a GaN-based semiconductor layer on a SiC single crystal substrate has attracted attention.
- CMP Chemical Mechanical Polishing
- SiC has hardness next to diamond
- CMP does not provide a sufficient polishing rate, and processing efficiency is very poor.
- a known force is used to perform CMP while applying high pressure to the SiC substrate. In this case, there is a problem that the work-affected layer tends to enter deep inside the SiC substrate.
- Patent Document 1 uses reactive etching and steam oxidation. And discloses a method of smoothing the surface of SiC. Specifically, the surface of the SiC substrate is mechanically polished to perform organic and inorganic cleaning, and then the surface of the SiC substrate is subjected to reactive etching, so that the surface is kept flat and uniform. Remove the damage layer. Thereafter, the surface of the substrate is oxidized with water vapor, and then the oxide layer is removed with hydrofluoric acid.
- Patent Document 2 describes ion irradiation damage caused in the surface region of the substrate by removing the work-affected layer on the surface of the SiC substrate by the first reactive etching using Ar or the like. Technique to remove the layer by reactive etching using CF, O, etc.
- Non-Patent Document 1 reports that the processing efficiency can be improved by subjecting the surface of the SiC substrate to steam oxidation and then performing CMP.
- Patent Document 1 Therefore, with the methods disclosed in Patent Document 1 and Patent Document 2, it is difficult to completely smooth the surface of the substrate and completely remove the damage layer generated on the substrate surface. Further, the method according to Non-Patent Document 1 can complete the polishing in a short time as compared with the method of flattening the surface of the SiC substrate only by CMP. However, since the oxidation process still takes about 3 hours and the polishing process takes about 2 hours, the method according to Non-Patent Document 1 is not practical. In addition, it is difficult to completely remove the scratch on the substrate surface.
- Patent Document 1 JP-A-6-188163
- Patent Document 2 JP-A-9-183700
- Non-Patent Document 1 Nippon Steel Technical Report No. 374, page 32 36
- the object of the present invention is to solve the above-mentioned problems of the prior art and to provide a practical method for producing a SiC substrate having a smooth surface.
- the method for producing a SiC single crystal substrate of the present invention comprises a step (a) of preparing a SiC single crystal substrate having a mirror-polished surface, and oxidizing the surface of the SiC single crystal substrate with plasma.
- the steps (b) and (c) are each repeated a plurality of times.
- the oxidation and the etching are performed for a time period of 1 to 10 minutes, respectively.
- the steps (b) and (c) are repeated a plurality of times, and after the step (b) is performed, the surface of the SiC single crystal substrate is subjected to a chemical mechanical polishing method. A step (d) of further polishing is further included.
- step (b) oxygen or oxygen and inert gas? Use kongo gas.
- a gas containing F is used in the step (c).
- the reactive etching conditions are set so that the etching rates of SiC and the oxide layer are equal.
- the offset angle with respect to the C axis of the SiC single crystal substrate is substantially zero.
- step (b) and the step (c) are performed by replacing a gas in the same apparatus.
- the surface of the SiC single crystal substrate is smoothed by repeating the step of oxidizing the surface of the SiC single crystal substrate and removing the oxide layer formed by the oxidation by etching a plurality of times.
- the number of repetitions is 5 or more.
- the SiC single crystal substrate of the present invention is manufactured by any one of the methods described above.
- the SiC single crystal substrate of the present invention has a surface roughness Ra of 0.2 nm or less and a step structure on the surface.
- a smooth SiC single crystal substrate can be obtained by repeating the oxidation of the SiC surface and the removal of the oxide layer generated by the oxidation.
- FIG. 1 is a cross-sectional view for explaining a plane orientation and an offset angle of a SiC substrate suitably used in the present invention.
- FIG. 2 is a cross-sectional view illustrating another plane orientation and offset angle of a SiC substrate.
- FIG. 3 is a diagram for explaining a process of cutting out the SiC substrate from the mass force.
- FIG. 4 (a) to (f) schematically show cross sections near the surface of the SiC substrate in each step of the method of manufacturing an SiC substrate according to the present invention.
- FIG. 5 (a) and (b) schematically show a cross section near the surface of the SiC substrate in another step of the method of manufacturing the SiC substrate according to the present invention.
- FIG. 6 schematically shows a cross-sectional structure near the surface of a SiC substrate according to the present invention.
- CMP is widely used for polishing a semiconductor substrate or planarizing a formed semiconductor structure, and is one of excellent polishing methods.
- the inventor of the present application applied a mirror polished SiC single crystal substrate. Polishing with the CMP method while applying pressure resulted in a locally smooth surface, but at the same time, scratches with a depth of about 10-20 nm were generated on the entire substrate.
- a SiC single crystal substrate made of a SiC single crystal is prepared.
- the SiC single crystal has a hexagonal structure, and is more preferably 4H—SiC or 6H—SiC.
- the surface 10a for smoothing the SiC single crystal substrate 10 is the (0001) plane, and the offset angle of the substrate is approximately zero degrees with respect to the C axis, which is the crystal axis (also called a just substrate). It is preferable that In other words, the C axis is preferably perpendicular to the surface 10a.
- the offset angle is zero degrees, ideally, the C layer and the Si layer are stacked parallel to and intersecting the surface 10a. In such a substrate, since the entire surface is uniformly composed of S or C, polishing with high physical and chemical stability of the surface is generally difficult.
- the method for producing a SiC single crystal substrate of the present invention can suitably smooth such a substrate.
- the substrate surface 50a is always Si and C appear. Since such a surface is generally easy to process, a flat surface can be obtained relatively easily by a conventional polishing method or smoothing method. However, even if the method of the present invention is applied to a substrate having an offset angle ⁇ other than zero degrees as shown in FIG. 2, a smooth surface can be obtained efficiently.
- the surface of the SiC single crystal substrate 10 to be smoothed is preliminarily mirror-finished, and the surface roughness Ra of the surface 10a that is preferably mirror-finished is 0. More preferably 2 nm-2 nm.
- the surface roughness Ra is a value obtained by measuring a 5 ⁇ m area of a sample with an atomic force microscope (AFM).
- AFM atomic force microscope
- the warpage of the substrate is adjusted so that the surface to be smoothed has a flatness of about ⁇ 20 xm or less.
- the flatness is ⁇ 20 zm or more, it is possible to correct the warpage of the substrate during the manufacturing process of the SiC single crystal substrate described below.
- the SiC single crystal substrate 10 is cut out from the single crystal SiC C mass 20 using, for example, a known method.
- a force cutting blade of an outer peripheral blade or an inner peripheral blade, a wire saw, or the like can be used.
- the SiC block 20 may contain elements that become P-type or N-type impurities other than Si and C. It may also contain other group IV elements such as Ge as substitution elements.
- the SiC including the impurity element and the substitution element is collectively referred to as SiC.
- Various sizes, thicknesses, and planar shapes can be used in the present invention without any particular limitation on the outer shape of the SiC substrate 10. For example, a disk-shaped SiC single crystal substrate 10 having a diameter of 2 inches and a thickness of about 500 ⁇ is prepared.
- the SiC single crystal substrate 10 cut out from the lump 20 is subjected to a known procedure to remove the work-affected layer on the surface, and the surface roughness of the substrate surface 10a and the back surface 10b becomes a predetermined value. Polishing is applied. At this time, if the SiC single crystal substrate 10 is warped, planar processing is performed so that the flatness is not more than a predetermined flatness.
- FIG. 4A schematically shows the vicinity of the surface 10 a of the SiC single crystal substrate 10.
- the surface 10a of the SiC single crystal substrate 10 has a surface roughness on the order of nanometers, and a processing flaw 11 is generated on the surface 10a or a work-affected layer 17 remains in the vicinity of the surface. Therefore, it is preferable to first etch the surface 10a of the SiC single crystal substrate 10 prepared in this manner to remove the work-affected layer. Etching follows the etching conditions that are preferred for reactive ion etching in the subsequent oxide layer removal step. Subsequently, the surface 10a is oxidized. Various known methods can be used for the oxidation.
- Oxidation preferably it is carried out with an inert gas, such as oxygen atmosphere or oxygen and Ar in including atmosphere fixture example, in 10- 1 10 2 Pa pressure of about to put the power of 0. 01 2W / cm 2 Do it.
- an inert gas such as oxygen atmosphere or oxygen and Ar in including atmosphere fixture example
- This step is preferably performed in the same apparatus as the subsequent reactive ion etching. This is because the two processes can be performed in succession only by gas exchange that does not require transport of the SiC single crystal substrate 10 or the like. Oxidation forms an oxide layer 12 on the surface as shown in FIG. 4 (b).
- the oxide layer 12 is removed.
- a known chemical and mechanical removal method can be used. It is not preferable to remove the oxide layer 12 by CMP while applying pressure. This is because new scratches are generated in the process of removing the oxide layer 12 as described above. It is more preferable to remove the oxide layer 12 by reactive ion etching, in which it is preferable to remove the oxide layer 12 by a chemical method, so that a new work-affected layer and scratches are not generated.
- the gas used for reactive ion etching it is more preferable to use CF, which preferably contains F.
- the oxide layer 12 is almost all
- the oxide layer 12 is preferably completely removed throughout the body. Further, it is preferable to remove the oxide layer 12 under reaction conditions such that the etching rates for the oxide layer 12 and the SiC constituting the SiC substrate 10 are equal. As a result, the flat portion of the oxide layer 12 is sharpened more quickly by the anisotropy of reactive ion etching than the vicinity of the processed flaw 11, and the SiC single crystal substrate 10 surface is exposed after the surface of the SiC single crystal substrate 10 is exposed. Are also etched. For this reason, as shown in FIG. 4 (b), the processing flaw 11 ′ remaining after the oxide layer 12 is removed becomes shallower than the processing flaw 11 before the oxide layer 12 is formed, and the SiC single crystal substrate 10 The flatness of the surface 10a 'is improved
- the etching time in the step of removing the oxide layer 12 is generated.
- the force depending on the thickness of the oxide layer 12 and the type of gas used for etching is typically 1 to 10 minutes.
- the depth of the cache scratches generated on the surface of the SiC single crystal substrate 10 is reduced and the smoothness is increased. It is preferred to repeat oxidation and removal alternately two or more times, more preferably 5 or more times. If the oxidation process and the removal process are repeated about 10 times, almost perfect smoothness can be obtained. On the other hand, even if the number of repetitions is more than 15 times, the smoothness of the surface is sufficiently good. The time required to repeat these processes becomes longer, which is not efficient. Therefore, it is most preferable to repeat the oxidation step and the removal step 5 times to 15 times.
- the oxidation and etching of the oxide layer generated by the oxidation can be performed in the same apparatus.
- the SiC single crystal substrate 10 having the smooth surface 13a from which the processing flaws 11 have been removed is obtained.
- the SiC single crystal substrate 10 obtained by the above-described process has a surface roughness of about Ra ⁇ 0.4 nm and high smoothness.
- damage due to ions colliding during reactive etching in the removal process occurs on the outermost surface of the SiC single crystal substrate 10, and it is preferable to remove this damage.
- the above-described oxidation step is performed at the end of the repetition of oxidation and removal, and the surface 13a of the SiC single crystal substrate 10 is oxidized to form an oxide layer 14 as shown in FIG. Then, the generated oxide layer 14 is removed by CMP with low pressure.
- CMP for example, colloidal silica and non-woven fabric are used.
- the oxide layer 14 can be removed at a practical polishing rate even by using general CMP, and CMP is performed at a low pressure, so that there is no possibility of generating a new scratch or a work-affected layer on the surface. As a result, the damage layer and the work-affected layer in the vicinity of the smooth and scratch-free surface are removed, and the surface 15a has a lattice arrangement. A SiC single crystal substrate 15 is obtained.
- FIG. 6 schematically shows the surface of the SiC single crystal substrate 15 obtained by the method of the present embodiment.
- the surface 15a of the SiC single crystal substrate 15 has a surface roughness Ra of less than 0.2 nm.
- the surface 15a of the SiC single crystal substrate 15 has a monoatomic layer height. Structure 18 can be seen.
- a SiC single crystal substrate having high surface smoothness can be obtained by repeating oxidation and removal of the oxide layer formed by oxidation a plurality of times.
- the use of plasma oxidation and reactive etching makes it possible to finish the surface in a practical processing time.
- the damaged layer and the work-affected layer are removed near the surface of the SiC single crystal substrate, the semiconductor properties near the surface are also excellent.
- This substrate was held in a chamber of a parallel plate type reactive etching apparatus. Oxygen was introduced into the chamber at a flow rate of 100 sccm, and while maintaining a pressure of 0 ⁇ 7 Pa in the chamber, a plasma was generated by applying a power of 0.2 W / cm 2 and the substrate was plasmad for 5 minutes. The substrate surface was oxidized by exposing to.
- CF4 as a reactive gas is introduced into the chamber 1 at a flow rate of lOOsccm while the substrate is held in the chamber 1, and the pressure in the chamber 1 is maintained at a pressure of 0.7 Pa, 0.2 W / cm 2
- the substrate surface was etched for 5 minutes with the power of.
- Oxidation and etching were alternately performed 10 times, and then oxidation was performed again. After that, the substrate was taken out and the surface of the SiC single crystal substrate was polished by CMP using colloidal silica.
- the obtained SiC single crystal substrate was evaluated by AFM (atomic force microscope). When the level difference in the region of 5 zm X 5 zm was determined, the surface roughness Ra was 0.17 nm. A linear step structure was observed on the surface. [0052] (second experimental example)
- SiC single crystal substrate As a SiC single crystal substrate, a 6H (0001) just substrate having a diameter of 2 inches and a thickness of 350 ⁇ was prepared, and a SiC single crystal substrate was obtained by the same procedure and the same conditions as in the first experimental example.
- the surface roughness Ra of the obtained substrate was 0.13 nm. A linear step structure was observed on the surface.
- a SiC single crystal substrate having an extremely smooth surface can be obtained. It is possible to epitaxially grow GaN-based semiconductor layers and SiC-based semiconductor layers with good characteristics on this SiC substrate to produce GaN-based semiconductor elements and SiC-based semiconductor elements with excellent characteristics. In addition, when semiconductor elements are formed on a SiC single crystal substrate, it is possible to fabricate SiC-based semiconductor elements having excellent characteristics because the semiconductor characteristics in the region near the surface are good.
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Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/545,306 US7641736B2 (en) | 2005-02-22 | 2005-02-22 | Method of manufacturing SiC single crystal wafer |
EP05710517.3A EP1855312B1 (en) | 2005-02-22 | 2005-02-22 | PROCESS FOR PRODUCING SiC SINGLE-CRYSTAL SUBSTRATE |
PCT/JP2005/002791 WO2006090432A1 (ja) | 2005-02-22 | 2005-02-22 | SiC単結晶基板の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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PCT/JP2005/002791 WO2006090432A1 (ja) | 2005-02-22 | 2005-02-22 | SiC単結晶基板の製造方法 |
Publications (1)
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WO2006090432A1 true WO2006090432A1 (ja) | 2006-08-31 |
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Family Applications (1)
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PCT/JP2005/002791 WO2006090432A1 (ja) | 2005-02-22 | 2005-02-22 | SiC単結晶基板の製造方法 |
Country Status (3)
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US (1) | US7641736B2 (ja) |
EP (1) | EP1855312B1 (ja) |
WO (1) | WO2006090432A1 (ja) |
Cited By (1)
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JP2015078093A (ja) * | 2013-10-17 | 2015-04-23 | セイコーエプソン株式会社 | 3C−SiCエピタキシャル層の製造方法、3C−SiCエピタキシャル基板および半導体装置 |
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WO2010090024A1 (ja) * | 2009-02-04 | 2010-08-12 | 日立金属株式会社 | 炭化珪素単結晶基板およびその製造方法 |
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EP2528098B1 (en) * | 2010-01-19 | 2019-01-02 | Sumitomo Electric Industries, Ltd. | Silicon carbide semiconductor device and method of manufacturing same |
JP5236687B2 (ja) * | 2010-05-26 | 2013-07-17 | 兵庫県 | 表面処理方法及び表面処理装置 |
US8445386B2 (en) * | 2010-05-27 | 2013-05-21 | Cree, Inc. | Smoothing method for semiconductor material and wafers produced by same |
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US9018639B2 (en) | 2012-10-26 | 2015-04-28 | Dow Corning Corporation | Flat SiC semiconductor substrate |
US9017804B2 (en) | 2013-02-05 | 2015-04-28 | Dow Corning Corporation | Method to reduce dislocations in SiC crystal growth |
US9738991B2 (en) | 2013-02-05 | 2017-08-22 | Dow Corning Corporation | Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a supporting shelf which permits thermal expansion |
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US8940614B2 (en) | 2013-03-15 | 2015-01-27 | Dow Corning Corporation | SiC substrate with SiC epitaxial film |
JP6230112B2 (ja) * | 2014-01-17 | 2017-11-15 | 旭ダイヤモンド工業株式会社 | ウェハの製造方法およびウェハの製造装置 |
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EP1855312A1 (en) | 2007-11-14 |
EP1855312A4 (en) | 2009-04-08 |
US20070051301A1 (en) | 2007-03-08 |
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