WO2004093195A1 - 裏面照射型光検出装置の製造方法 - Google Patents
裏面照射型光検出装置の製造方法 Download PDFInfo
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- WO2004093195A1 WO2004093195A1 PCT/JP2004/005333 JP2004005333W WO2004093195A1 WO 2004093195 A1 WO2004093195 A1 WO 2004093195A1 JP 2004005333 W JP2004005333 W JP 2004005333W WO 2004093195 A1 WO2004093195 A1 WO 2004093195A1
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- electrode pad
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- 238000004519 manufacturing process Methods 0.000 title claims description 67
- 238000000034 method Methods 0.000 title claims description 36
- 230000003287 optical effect Effects 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract description 206
- 239000004065 semiconductor Substances 0.000 claims abstract description 139
- 230000002093 peripheral effect Effects 0.000 claims abstract description 24
- 238000009825 accumulation Methods 0.000 claims abstract description 8
- 238000005520 cutting process Methods 0.000 claims abstract description 4
- 238000001514 detection method Methods 0.000 claims description 28
- 238000005286 illumination Methods 0.000 claims description 21
- 230000001681 protective effect Effects 0.000 claims description 15
- 238000010586 diagram Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 10
- 229920005989 resin Polymers 0.000 description 9
- 239000011347 resin Substances 0.000 description 9
- 239000003822 epoxy resin Substances 0.000 description 8
- 238000005530 etching Methods 0.000 description 8
- 229920000647 polyepoxide Polymers 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 5
- 239000000470 constituent Substances 0.000 description 4
- 238000009429 electrical wiring Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14618—Containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14806—Structural or functional details thereof
- H01L27/14812—Special geometry or disposition of pixel-elements, address lines or gate-electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Definitions
- the present invention relates to a method for manufacturing a backside illumination photodetector.
- a step of manufacturing the backside illumination photodetector a step of forming a charge readout portion on one side of a semiconductor substrate, a step of attaching a reinforcing member to one side of the semiconductor substrate, A step of thinning the substrate from the other surface side, a step of forming an accumulation layer on the other surface side of the semiconductor substrate, and a configuration of the semiconductor substrate except for a formation region of the charge readout portion and a region near the charge readout portion.
- a method including a step of removing a material and a step of forming an aluminum wiring electrically connected to a charge readout section for example, see Patent Document 1.
- Patent Document 1 in the step of forming wiring, a contact hole is formed in a field oxide film exposed in a step of removing a constituent material of a semiconductor substrate, and a contact hole is formed in the contact hole and Aluminum wiring is provided on the exposed region of the field oxide film.
- Patent Document 1 Japanese Patent Application Laid-Open No. H10-1166974 Disclosure of the Invention
- the above-described conventional technique requires a step of removing a constituent material of the semiconductor substrate and a step of forming an aluminum wiring which requires formation of a contact hole. For this reason, there is a problem that the manufacturing process is complicated and the manufacturing cost is increased.
- the present invention has been made in view of the above points, and an object of the present invention is to manufacture a back-illuminated photodetector capable of simplifying the manufacturing process and reducing the manufacturing cost. It is to provide a method.
- a method of manufacturing a back-side illuminated photodetector includes the steps of: forming a charge readout portion on one surface side of a semiconductor substrate; A step of thinning a region corresponding to the charge readout portion on the other surface side while leaving a peripheral region of the region; a step of forming an accumulation layer on the other surface side of the semiconductor substrate; Forming an electric wiring electrically connected to the charge readout portion and an electrode pad electrically connected to the electric wiring in a region corresponding to the peripheral region of the semiconductor substrate; and forming an electrode on one surface side of the semiconductor substrate.
- it comprises a step of cutting the portion that is thinned semiconductor substrate.
- a region corresponding to the charge readout portion on the other surface side of the semiconductor substrate is thinned, and an accumulation layer is formed on the other surface side.
- an electric wiring and an electrode pad are formed in a region corresponding to the peripheral region on one side of the semiconductor substrate, and the support substrate is placed on one side of the semiconductor substrate so as to cover the charge readout portion with the electrode pad exposed.
- the semiconductor substrate and the supporting substrate are cut at the thinned portion of the semiconductor substrate so as to leave a peripheral region corresponding to the region where the electric wiring and the electrode pad are formed.
- the steps of removing the constituent material of the semiconductor substrate and the step of forming the contact hole, which are required by the conventional technology, are not required.
- the manufacturing process is simplified.
- manufacturing costs can be reduced.
- the electric wiring and the electrode pad are formed on one surface of the semiconductor substrate, the problem of the depth of focus does not occur. Therefore, miniaturization of the electric wiring and the electrode pad can be easily performed.
- a back-side illuminated type photodetector capable of simplifying a manufacturing process and reducing a manufacturing cost is provided.
- a manufacturing method can be provided.
- the method further includes the step of preparing a package having electrode pads, and mounting the semiconductor substrate and the support substrate cut at the thinned portion of the semiconductor substrate on the package.
- the step of bonding includes bonding a peripheral region corresponding to the region where the electric wiring and the electrode pad are formed to the package, and electrically connecting the electrode pad of the package and the electrode pad formed on the semiconductor substrate by a bonding wire.
- the semiconductor substrate and the support substrate cut at the thinned portion of the semiconductor substrate can be appropriately mounted on the package.
- a package having an electrode pad and having an opening formed at a position corresponding to the electrode pad is prepared, and the semiconductor substrate and the support substrate cut at the thinned portion of the semiconductor substrate Further comprising the step of mounting the semiconductor substrate on the package, wherein the step of mounting on the package includes bonding the support substrate to the package, and attaching the semiconductor substrate and the support substrate cut at the thinned portion of the semiconductor substrate to the package. Fixing the package, electrically connecting the electrode pads of the package and the electrode pads formed on the semiconductor substrate from the opening by bonding wires, and bonding a protective plate to the knocker so as to cover the opening. , And is preferably included. In this case, the semiconductor substrate and the support substrate cut at the thinned portion of the semiconductor substrate can be appropriately mounted on the package.
- the method further includes a step of arranging a plurality of packages on which the semiconductor substrate and the support substrate are mounted so that the portions adjacent to each other are adjacent to each other.
- the area of the photodetector (charge readout unit) in the backside illumination photodetector can be easily increased.
- the size of the electric wiring and the electrode pad can be reduced, so that the dead area that does not contribute to light detection does not increase.
- the method further comprises a step of preparing a package having electrode pads, and mounting a plurality of semiconductor substrates and support substrates cut at the thinned portion of the semiconductor substrate on the package.
- a plurality of semiconductor substrates and support substrates cut at the thinned portions of the semiconductor substrate are arranged so that the thinned portions of the semiconductor substrates are adjacent to each other. Bonding each of the peripheral regions corresponding to the regions where the electrodes are formed to the package, and electrically connecting the electrode pads of the package and the electrode pads formed on the semiconductor substrate by bonding wires. Bonding a protective plate to the support substrate and the package so as to cover the pads and the bonding wires. In this case, a plurality of semiconductor substrates and support substrates cut at the thinned portion of the semiconductor substrate can be appropriately mounted on the package.
- the area of the photodetector (charge readout unit) in the backside illumination photodetector can be easily increased. As described above, since the size of the electric wiring and the electrode pad can be reduced, the dead area which does not contribute to light detection does not increase.
- a package having an electrode pad and having an opening formed at a position corresponding to the electrode pad is prepared, and the semiconductor substrate and the support substrate cut at the thinned portion of the semiconductor substrate Further comprising the step of mounting a plurality of semiconductor devices on a package, wherein the plurality of semiconductor devices are cut at the thinned portions of the semiconductor substrate such that the thinned portions are adjacent to each other.
- the semiconductor substrate and the support substrate cut at the thinned portion of the semiconductor substrate can be appropriately and multiple mounted on the package.
- the area of the photodetector (charge readout unit) in the backside illumination photodetector can be easily increased.
- the electric wiring and the electrode node can be miniaturized, the dead area which does not contribute to the light detection does not increase.
- FIGS. 1A to 1F are schematic diagrams for explaining a method of manufacturing the backside illumination photodetector according to the first embodiment.
- FIGS. 2A to 2D are schematic views for explaining a method of manufacturing the backside illumination photodetector according to the first embodiment.
- FIG. 3 is a schematic view for explaining a method of manufacturing the backside illumination photodetector according to the first embodiment.
- FIG. 4A and FIG. 4B are schematic diagrams for explaining a method of manufacturing the backside illumination photodetector according to the second embodiment.
- FIG. 5 is a schematic diagram for explaining a method of manufacturing the backside illumination photodetector according to the second embodiment.
- FIGS. 6A to 6C are schematic views for explaining a method of manufacturing the backside illumination photodetector according to the third embodiment.
- FIG. 7 is a schematic diagram for explaining a method of manufacturing the backside illumination photodetector according to the third embodiment.
- FIGS. 8A and 8B are schematic diagrams for explaining a method of manufacturing the backside illumination photodetector according to the fourth embodiment.
- FIG. 9 illustrates a method for manufacturing a back-side illumination type photodetector according to the fourth embodiment. It is a schematic diagram for explaining.
- FIGS.1A to 1F and FIGS.2A to 2D are schematic views for explaining a method of manufacturing the backside illuminated light detection device according to the first embodiment, and show a longitudinal section of the backside illuminated light detection device. 1 shows the configuration.
- FIG. 3 is a schematic view for explaining a method of manufacturing the back-side illuminated light detection device according to the first embodiment, and is a perspective view including a longitudinal section of the back-side illuminated light detection device. The details are described below.
- a semiconductor substrate 1 made of Si is prepared.
- a CCD section 3 as a charge reading section is formed on the front side (one side) of the semiconductor substrate 1 (see FIG. 1A).
- the CCD unit 3 includes a potential level for accumulating charges generated in the photosensitive region of the semiconductor substrate, and a transfer electrode for transferring the charges.
- the CCD section 3 has a square shape (for example, about 30 mm ⁇ 60 mm) in plan view.
- a region corresponding to the CCD section 3 on the back surface side (the other surface side) of the semiconductor substrate 1 is thinned while leaving a peripheral region 1a of the region (see FIG. 1B).
- the semiconductor substrate 1 is thinned by forming a mask having an opening on a region corresponding to the CCD section 3 and etching the back surface of the semiconductor substrate 1 using such a mask.
- the mask can be formed by photolithography. Isotropic for etching Wet etching can be used.
- the etchant may be used HF / HN 0 3 or the like.
- Isotropic dry etching such as atmospheric pressure plasma etching (ADP: Atmospheric Downstream Plasma) can also be used.
- anisotropic jet etching can be used, and KOH, ethylenediamine, or the like can be used as an etchant at that time.
- the etching is performed until the thickness of the thinned portion of the semiconductor substrate 1 reaches 20 to 50 m.
- the portion of the semiconductor substrate 1 where no etching is performed (thick portion) functions as a frame portion for securing the mechanical strength of the thinned portion.
- the "back surface” is a light incident surface of a finally manufactured back-illuminated photodetector, and is a term used for convenience of description. Note that this is not a plane.
- the “front side” is the opposite side to the back side.
- an accumulation layer 5 is formed on the back side of the semiconductor substrate 1 (see FIG. 1B).
- the accumulation layer 5 is formed by forming a thermal oxide film on the back surface of the semiconductor substrate 1 in which the region corresponding to the CCD section 3 is thinned, and then performing ion implantation from the back surface side to activate the film. .
- the formation and activation of the thermal oxide film can be performed by subjecting the semiconductor substrate 1 to a high-temperature heat treatment (for example, about 900 ° C.).
- an electric wiring 7 electrically connected to the CCD unit 3 and an electrode pad 9 electrically connected to the electric wiring 7 are provided in a region 1 b corresponding to the peripheral region 1 a on the front surface side of the semiconductor substrate 1.
- the electrical wiring 7 and the electrode pad 9 are formed by depositing a conductive metal (for example, aluminum, gold, silver, or the like) on the surface side of the semiconductor substrate 1 and then using a mask having an opening of a predetermined shape. Can be removed by etching or the like.
- a plating method can be used for forming the electric wiring 7 and the electrode pad 9.
- a support substrate 11 is adhered to the surface of the semiconductor substrate 1 so as to cover the CCD unit 3 with the electrode pads 9 exposed (see FIG. 1D).
- the support substrate 11 is bonded by using a resin (for example, epoxy resin or the like) 13 and bonding the support substrate 11 to the semiconductor substrate 1.
- a resin for example, epoxy resin or the like
- the area of the support substrate 11 is preferably set to such an extent that its end portion is over a portion of the semiconductor substrate 1 where etching is not performed, from the viewpoint of securing mechanical strength, but is not limited thereto. is not.
- the semiconductor substrate 1 and the support substrate 11 are cut at the thinned portion of the semiconductor substrate 1 so as to leave the peripheral region 1a corresponding to the region 1b where the electric wiring 7 and the electrode pad 9 are formed.
- the CCD chip 15 including the semiconductor substrate 1 and the support substrate 11 cut at the thinned portion of the semiconductor substrate 1 is completed.
- Dicing technology can be used to cut the semiconductor substrate 1 and the support substrate 11, and dicing lines DL along three of the four sides of the CCD unit 3 (only one of them is shown in FIG.1E). ) Is set.
- the end of the region 1b (the portion where etching is not performed) in which the electric wiring 7 and the electrode pad 9 are formed is also cut.
- the package 17 includes a CCD chip mounting portion 17a and a step portion 17b, and has an electrode pad 19 on the step portion 17b.
- the CCD chip 15 is placed upside down so that the back surface of the semiconductor substrate 1 is positioned on the CCD chip mounting portion 17a side. Then, the peripheral area 1 a corresponding to the area 1 b where the electric wiring 7 and the electrode pad 9 are formed is adhered to the CCD chip mounting portion 17 a of the package 17, and the CCD chip 15 is packaged. Fix it to the diagonal 17 (see Figures 2A and 2B).
- the bonding between the semiconductor substrate 1 and the package 17 can be performed by die bonding using a resin (for example, an epoxy resin).
- the electrode pads 19 of the package 17 and the electrode pads 9 formed on the semiconductor substrate 1 are electrically connected by bonding wires 21 (see FIG. 2C).
- An Au wire or the like can be used as the bonding wire 21.
- a protective plate 23 is adhered to the support substrate 11 and the package 17 so as to cover both the electrode pads 9 and 19 and the bonding wires 21 (see FIG. 2D).
- the protection plate 23 is bonded to the support substrate 11 and the package 17 by using a tree (for example, epoxy resin).
- a tree for example, epoxy resin.
- the supporting substrate 11 and the protection plate 23 are bonded together on the opposite side (the right side in FIG. 2D) of the package 1 ⁇ .
- the CCD chip 15 is mounted on the package 17.
- the CCD chip 15 mounted on the package 17 is placed in a buttable manner (Fig. 3).
- the package 1 on which the CCD chip 15 is mounted is arranged such that the thinned portions of the semiconductor substrate 1 are adjacent to each other, that is, the cut surfaces of the semiconductor substrate 1 and the supporting substrate 11 are abutted.
- the region corresponding to the CCD section 3 on the back surface side of the semiconductor substrate 1 is thinned.
- the electric wiring 7 and the electrode pad 9 are formed in the region 1 b corresponding to the peripheral region 1 a on the front surface side of the semiconductor substrate 1, and the electrode pad 9 is formed.
- the support substrate 11 is adhered to the surface of the semiconductor substrate 1 so as to cover the CCD section 3, and the peripheral area 1a corresponding to the area 1b where the electric wiring 7 and the electrode pad 9 are formed is formed.
- Semiconductor substrate 1 and leave The lifting substrate 1 1 of the semiconductor substrate 1 Cutting at the thinned part.
- the steps of removing the constituent material of the semiconductor substrate and the step of forming the contact holes, which are required by the conventional techniques, are not required.
- the manufacturing process is simplified, and the manufacturing cost can be reduced.
- the electric wiring 7 and the electrode pad 9 are formed on the surface of the semiconductor substrate 1, the problem of the depth of focus does not occur. Therefore, miniaturization of the electric wiring 7 and the electrode pad 9 can be easily performed.
- the manufacturing method according to the first embodiment further includes a step of preparing a package 17 having an electrode pad 19 and mounting the CCD chip 15 on the package 17.
- the peripheral area 1 a corresponding to the area 1 b on which the electric wiring 7 and the electrode pad 9 are formed is bonded to the CCD chip mounting portion 17 a of the package 17.
- the CCD chip 15 can be appropriately mounted on the package 17.
- the manufacturing method according to the first embodiment after the step of mounting the CCD chip 15 in the package 17, the thinned portions of the semiconductor substrate 1 are arranged adjacent to each other. And a step of arranging a plurality of packages 17 on which the CCD chips 15 are mounted. This makes it possible to easily increase the area of the light detection section (CCD section 3) in the backside illumination light detection device. As described above, since the electrical wiring 7 and the electrode pad 9 can be miniaturized, the dead area that does not contribute to light detection does not increase.
- FIGS. 4A and 4B are schematic views for explaining a method of manufacturing the back-illuminated light detection device according to the second embodiment, and show a vertical cross-sectional configuration of the back-illuminated light detection device.
- FIG. 5 is a view for explaining a method of manufacturing the backside illumination type photodetector according to the second embodiment. It is a schematic diagram and is a perspective view including the longitudinal section of a back irradiation type photodetector. The details are described below.
- steps (1) to (10) are sequentially performed.
- steps (1) to (6) are the same as steps (1) to (6) in the above-described first embodiment, and a description thereof will not be repeated.
- a package 27 for mounting the CCD chip 15 is prepared.
- the package 27 includes a CCD chip mounting portion 27a and a protrusion 27b formed to face the CCD chip mounting portion 27a, and faces the CCD chip mounting portion 27a of the protrusion 27b.
- An electrode pad 29 is provided on the opposite side.
- An opening 27c is formed in the CCD chip mounting portion 27a at a position facing the protrusion 27b (electrode pad 19).
- ceramic or the like can be used as a material of the package 27, ceramic or the like can be used.
- the CCD chip 15 is arranged such that the front surface side of the semiconductor substrate 1, that is, the support substrate 11 is located on the CCD chip mounting portion 27a side. Then, the support substrate 11 is adhered to the CCD chip mounting portion 27a of the package 27, and the CCD chip 15 is fixed to the package 27 (see FIG. 4A). At this time, the support substrate 11 and the end face of the CCD chip mounting portion 27a are bonded together on the side opposite to the package 27 (the right side in FIG. 4A). The bonding between the support substrate 11 and the package 27 can be performed by die bonding using a resin (for example, an epoxy resin or the like). Step (8)
- the electrode pad 29 of the package 27 and the electrode pad 9 formed on the semiconductor substrate 1 are electrically connected by the bonding wire 21 (see FIG. 4A).
- a protective plate 31 is bonded to the CCD chip mounting portion 27a of the package 27 so as to cover the opening 27c (see FIG. 4B).
- the protection plate 31 is bonded with a resin (for example, It is performed by bonding it to the package 27 using a oxy resin or the like. As a result, the # 0 chip 15 is mounted on the package 27.
- the CCD chip 15 mounted on the package 27 is placed in a buttable manner (FIG. 5).
- the buttable arrangement is such that the thinned portions of the semiconductor substrate 1 are adjacent to each other, that is, the cut surfaces of the semiconductor substrate 1 and the support substrate 11 are abutted, so that the package 2 on which the CCD chip 15 is mounted is mounted.
- a package 27 having an electrode pad 29 and having an opening 27 c at a position corresponding to the electrode pad 29 is prepared.
- the step of mounting the chip 15 on the package 27 is further provided.
- the step of mounting the chip 15 on the package 27 is performed by bonding the support substrate 11 to the package 27 and attaching the CCD chip 1 to the package 27. Fixing the electrode pad 29 of the package 27 and the electrode pad 9 formed on the semiconductor substrate 1 through the opening 27 c by using the bonding wire 21.
- the thinned portions of the semiconductor substrate 1 are arranged so as to be adjacent to each other. And a step of arranging a plurality of packages 27 each having the CCD chip 15 mounted thereon.
- FIGS. 6A to 6C are schematic diagrams for explaining a method of manufacturing the backside illuminated light detection device according to the third embodiment, and show the vertical cross-sectional configuration of the backside illuminated light detection device.
- FIG. 7 is a schematic diagram for explaining a method of manufacturing the back-side illuminated light detection device according to the third embodiment, and is a perspective view including a vertical cross section of the back-side illuminated light detection device. The details are described below. .
- steps (1) to (9) are sequentially performed.
- steps (1) to (6) are the same as steps (1) to (6) in the above-described first embodiment, and a description thereof will not be repeated.
- a package 37 for mounting a plurality of CCD chips 15 is prepared.
- the package 37 is formed in a rectangular frame shape, includes a CCD chip mounting portion 37a and a step portion 37b, and has an electrode pad 39 on the step portion 37b.
- As a material of the package 37 ceramic or the like can be used.
- the CCD chip 15 is arranged in a buttable manner, and the peripheral area 1 a corresponding to the area 1 b on which the electric wiring 7 and the electrode pad 9 are formed in the CCD chip 15 is mounted on the CCD chip of the package 37.
- the CCD chip 15 is fixed to the package 37 by bonding to the receiver 37a (see Fig. 6A).
- the plurality of CCD chips 15 are arranged so that the thinned portions of the semiconductor substrate 1 are adjacent to each other, that is, the cut surfaces of the semiconductor substrate 1 and the support substrate 11 are abutted. Do it by doing.
- the semiconductor substrate 1 and the package 37 can be bonded to each other by die bonding using a resin (for example, an epoxy resin).
- the electrode pad 9 formed on the semiconductor substrate 1 is electrically connected by a bonding wire 21 (see FIG. 6B).
- a protective plate 41 is adhered to the support substrate 11 and the package 37 so as to cover both the electrode pads 9 and 39 and the bonding wires 21 (see FIG. 6C).
- the protection plate 41 is bonded to the support substrate 11 and the package 37 using a resin (for example, epoxy resin).
- a resin for example, epoxy resin
- the manufacturing process is simplified and the manufacturing cost is reduced as in the manufacturing methods according to the first and second embodiments. Can be reduced. Further, miniaturization of the electric wiring 7 and the electrode pad 9 can be easily performed.
- the package 37 having the electrode pads 39 is prepared, and the step of mounting a plurality of the chips 15 in the package 37 is further performed.
- a plurality of CCD chips 15 are arranged so that the thinned portions of the semiconductor substrate 1 are adjacent to each other, and the electric wiring 7 and the electrode pads 9 are formed. Bonding the peripheral area 1 a corresponding to the formed area 1 b to the package 37, and bonding the electrode pads 39 of the package 37 to the electrode pads 9 formed on the semiconductor substrate 1 by bonding wires 2 1 And a step of bonding a protective plate 41 to the support substrate 11 and the package 37 so as to cover both electrode pads 9 and 39 and the bonding wires 21.
- FIG. 8A and 8B are schematic diagrams for explaining a method of manufacturing the back-illuminated photodetector according to the fourth embodiment, and show a vertical cross-sectional configuration of the back-illuminated photodetector.
- FIG. 9 is a schematic diagram for explaining a method of manufacturing the back-side illuminated light detection device according to the fourth embodiment, and is a perspective view including a longitudinal section of the back-side illuminated light detection device. The details are described below.
- steps (1) to (9) are sequentially performed.
- steps (1) to (6) are the same as steps (1) to (6) in the above-described first embodiment, and a description thereof will not be repeated.
- a package 47 for mounting a plurality of CCD chips 15 is prepared.
- the package 47 includes a CCD chip mounting portion 47a and a projection 47b formed to face the CCD chip mounting portion 47a, and the projection 47b faces the CCD chip mounting portion 47a.
- An electrode pad 49 is provided on the surface to be covered.
- An opening 47c is formed in the CCD chip mounting portion 47a at a position facing the protrusion 47b (electrode pad 49).
- ceramic or the like can be used as a material of the package 47.
- the CCD chips 15 are arranged in a buttable manner, and the supporting substrate 11 of each CCD chip 15 is bonded to the CCD chip mounting portion 47a of the package 47, and each CCD chip 15 is packaged. Secure it to 47 (see Fig. 8A).
- the plurality of CCD chips 15 are arranged such that the thinned portions of the semiconductor substrate 1 are adjacent to each other, that is, the cut surfaces of the semiconductor substrate 1 and the support substrate 11 are abutted. This is done by placing. Further, the bonding between the support substrate 11 and the package 47 can be performed by die bonding using a resin (for example, an epoxy resin or the like).
- a protective plate 51 is adhered to the CCD chip mounting portion 47a of the package 47 so as to cover the opening 47c (see FIG. 8B).
- the protection plate 51 is bonded to the package 47 using a resin (for example, an epoxy resin).
- a resin for example, an epoxy resin
- the manufacturing method according to the above-described fourth embodiment simplifies the manufacturing process and reduces the manufacturing cost as in the manufacturing methods according to the first to third embodiments. Can be reduced. Further, miniaturization of the electric wiring 7 and the electrode pad 9 can be easily performed.
- the package 47 having the electrode pad 49 and having the opening 47 c formed at a position corresponding to the electrode pad 49 is provided. And a step of mounting a plurality of CCD chips 15 on the package 47. The step of mounting a plurality of CCD chips 15 on the package 47 is performed so that the thinned portions of the semiconductor substrate 1 are adjacent to each other.
- a process of arranging a plurality of CCD chips 15 and bonding the support substrate 11 to the CCD chip mounting portion 47 a of the package 47, and an electrode pad 4 of the package 47 via the opening 47 c A step of electrically connecting the electrode pad 9 formed on the semiconductor substrate 1 to the electrode pad 9 by a bonding wire 21; and a step of bonding a protective plate 51 to the package 47 so as to close the opening 47c. , And are included.
- a plurality of CCD chips 15 can be appropriately mounted on the package 47.
- the area of the light detection section (CCD section 3) in the backside illumination light detection device can be easily increased.
- the electrical wiring 7 and the electrode pad 9 can be miniaturized, the dead area that does not contribute to light detection does not increase. Industrial applicability
- the present invention can be used for a backside illumination type CCD image sensor and the like.
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Dicing (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020057019523A KR101052670B1 (ko) | 2003-04-16 | 2004-04-14 | 이면 조사형 광검출 장치의 제조 방법 |
EP04727414A EP1619722B1 (en) | 2003-04-16 | 2004-04-14 | Method for manufacturing backside-illuminated optical sensor |
US10/553,231 US7556975B2 (en) | 2003-04-16 | 2004-04-14 | Method for manufacturing backside-illuminated optical sensor |
DE602004015764T DE602004015764D1 (de) | 2003-04-16 | 2004-04-14 | Eten optischen sensors |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003-112047 | 2003-04-16 | ||
JP2003112047A JP4373695B2 (ja) | 2003-04-16 | 2003-04-16 | 裏面照射型光検出装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
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WO2004093195A1 true WO2004093195A1 (ja) | 2004-10-28 |
Family
ID=33296019
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/005333 WO2004093195A1 (ja) | 2003-04-16 | 2004-04-14 | 裏面照射型光検出装置の製造方法 |
Country Status (7)
Country | Link |
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US (1) | US7556975B2 (ja) |
EP (1) | EP1619722B1 (ja) |
JP (1) | JP4373695B2 (ja) |
KR (1) | KR101052670B1 (ja) |
CN (1) | CN100459137C (ja) |
DE (1) | DE602004015764D1 (ja) |
WO (1) | WO2004093195A1 (ja) |
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JP4463793B2 (ja) | 2006-10-10 | 2010-05-19 | 浜松ホトニクス株式会社 | 光検出装置 |
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KR101460141B1 (ko) * | 2007-03-05 | 2014-12-02 | 인벤사스 코포레이션 | 관통 비아에 의해 전면 컨택트에 연결되는 배면 컨택트를 갖는 칩 |
WO2009017758A2 (en) | 2007-07-27 | 2009-02-05 | Tessera, Inc. | Reconstituted wafer stack packaging with after-applied pad extensions |
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US8043895B2 (en) | 2007-08-09 | 2011-10-25 | Tessera, Inc. | Method of fabricating stacked assembly including plurality of stacked microelectronic elements |
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EP2406821A2 (en) | 2009-03-13 | 2012-01-18 | Tessera, Inc. | Stacked microelectronic assemblies having vias extending through bond pads |
US9640437B2 (en) | 2010-07-23 | 2017-05-02 | Tessera, Inc. | Methods of forming semiconductor elements using micro-abrasive particle stream |
US8796135B2 (en) | 2010-07-23 | 2014-08-05 | Tessera, Inc. | Microelectronic elements with rear contacts connected with via first or via middle structures |
US8791575B2 (en) | 2010-07-23 | 2014-07-29 | Tessera, Inc. | Microelectronic elements having metallic pads overlying vias |
US8610259B2 (en) | 2010-09-17 | 2013-12-17 | Tessera, Inc. | Multi-function and shielded 3D interconnects |
US8847380B2 (en) | 2010-09-17 | 2014-09-30 | Tessera, Inc. | Staged via formation from both sides of chip |
KR101059490B1 (ko) | 2010-11-15 | 2011-08-25 | 테세라 리써치 엘엘씨 | 임베드된 트레이스에 의해 구성된 전도성 패드 |
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JP6803137B2 (ja) * | 2015-09-30 | 2020-12-23 | 浜松ホトニクス株式会社 | 裏面入射型固体撮像素子 |
JP2020088066A (ja) * | 2018-11-20 | 2020-06-04 | キヤノン株式会社 | 電子部品および機器 |
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Also Published As
Publication number | Publication date |
---|---|
EP1619722A4 (en) | 2007-05-30 |
EP1619722A1 (en) | 2006-01-25 |
EP1619722B1 (en) | 2008-08-13 |
KR20050114723A (ko) | 2005-12-06 |
JP4373695B2 (ja) | 2009-11-25 |
DE602004015764D1 (de) | 2008-09-25 |
US20070275488A1 (en) | 2007-11-29 |
KR101052670B1 (ko) | 2011-07-28 |
CN1774810A (zh) | 2006-05-17 |
US7556975B2 (en) | 2009-07-07 |
CN100459137C (zh) | 2009-02-04 |
JP2004319791A (ja) | 2004-11-11 |
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