WO1999046084A1 - Appareil de polissage - Google Patents

Appareil de polissage Download PDF

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Publication number
WO1999046084A1
WO1999046084A1 PCT/JP1999/001131 JP9901131W WO9946084A1 WO 1999046084 A1 WO1999046084 A1 WO 1999046084A1 JP 9901131 W JP9901131 W JP 9901131W WO 9946084 A1 WO9946084 A1 WO 9946084A1
Authority
WO
WIPO (PCT)
Prior art keywords
polishing
semiconductor wafer
section
unit
wafer
Prior art date
Application number
PCT/JP1999/001131
Other languages
English (en)
Japanese (ja)
Inventor
Masao Yoshida
Masahiko Sekimoto
Original Assignee
Ebara Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ebara Corporation filed Critical Ebara Corporation
Priority to US09/423,445 priority Critical patent/US6293855B1/en
Priority to EP99939175A priority patent/EP0987084A4/fr
Priority to JP54561299A priority patent/JP4156039B2/ja
Priority to KR1019997010295A priority patent/KR100552009B1/ko
Publication of WO1999046084A1 publication Critical patent/WO1999046084A1/fr
Priority to US11/177,278 priority patent/US7063600B2/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/34—Accessories
    • B24B37/345—Feeding, loading or unloading work specially adapted to lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23Q—DETAILS, COMPONENTS, OR ACCESSORIES FOR MACHINE TOOLS, e.g. ARRANGEMENTS FOR COPYING OR CONTROLLING; MACHINE TOOLS IN GENERAL CHARACTERISED BY THE CONSTRUCTION OF PARTICULAR DETAILS OR COMPONENTS; COMBINATIONS OR ASSOCIATIONS OF METAL-WORKING MACHINES, NOT DIRECTED TO A PARTICULAR RESULT
    • B23Q15/00—Automatic control or regulation of feed movement, cutting velocity or position of tool or work
    • B23Q15/20—Automatic control or regulation of feed movement, cutting velocity or position of tool or work before or after the tool acts upon the workpiece
    • B23Q15/22—Control or regulation of position of tool or workpiece
    • B23Q15/24—Control or regulation of position of tool or workpiece of linear position
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/10—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/27—Work carriers
    • B24B37/30—Work carriers for single side lapping of plane surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H01L21/67219—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one polishing chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67745—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber characterized by movements or sequence of movements of transfer devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means

Definitions

  • the present invention relates to a polishing apparatus, and more particularly, to a polishing apparatus for polishing a polishing object such as a semiconductor wafer flat and mirror-like.
  • CMP Chemical-mechanical polishing
  • a device in which a processing unit such as a polishing unit is housed in a housing has also been proposed.
  • a semiconductor wafer is taken out from a wafer cassette mounting section for mounting a wafer cassette, transported to a polishing section and polished, and the polished semiconductor wafer is cleaned by a cleaning section, and then the wafer cassette is cleaned. It is being returned to the wafer cassette in the mounting part.
  • the reference position of the semiconductor wafer is set in a predetermined direction in a separate process using a dedicated machine. The position was adjusted. For this reason, there were problems that a separate process for aligning the semiconductor wafer had to be incorporated into the semiconductor manufacturing process and that a dedicated machine for aligning the semiconductor wafer was required. Disclosure of the invention
  • the present invention has been made in view of the above circumstances, and provides an independent room using a partition wall with a shutter between a processing unit such as a polishing unit and a cleaning unit and a housing unit such as a wafer cassette unit. It is a first object of the present invention to provide a polishing apparatus capable of preventing contamination from a processing section to a storage section by increasing the degree of leaning.
  • the present invention provides a polishing machine capable of performing positioning, in which a reference position (an orientation flat, a notch, etc.) of a semiconductor wafer is stopped in a predetermined direction during a transfer process in a polishing apparatus.
  • the second purpose is to provide equipment.
  • a first aspect of the present invention provides a semiconductor device comprising: In a polishing apparatus for polishing an object to be polished such as a wafer, a processing section for polishing the object to be polished, and a supply of the object to be polished to the processing section and / or polishing after polishing.
  • the storage unit supplies the polishing target to be polished to the processing unit or receives the polishing target after polishing, or supplies the polishing target to be polished to the processing unit. At the same time, the polishing object after polishing is accepted.
  • a second aspect of the present invention provides a polishing apparatus for polishing a semiconductor wafer, a processing section for polishing a semiconductor wafer, and a polishing section for polishing the processing section.
  • the reference position (orientation flat, notch, etc.) of the semiconductor wafer is adjusted in a predetermined direction during the transfer process between the processing section and the storage section in the polishing apparatus. To stop and position.
  • FIG. 1 is a plan view schematically showing a polishing apparatus of the present invention.
  • FIG. 2 is a side view showing the appearance of the polishing apparatus of the present invention.
  • FIG. 3 is a perspective view showing details of the polishing unit and the cleaning unit shown in FIGS. 1 and 2.
  • FIG. 4 is a cross-sectional view taken along the line IV-IV of FIG.
  • FIG. 5 is a sectional view taken along line VV of FIG.
  • FIG. 6 is a sectional view taken along the line VI-VI of FIG.
  • FIG. 7 is a front view of the handling table.
  • FIG. 8 is a plan view of the handling table.
  • FIG. 9 is a view taken along line IX-IX in FIG.
  • FIGS. 10A and 10B are diagrams showing the relationship between the notch detection sensor, the support member, and the alignment member.
  • FIG. 11 is a block diagram showing a control circuit for a notch detection sensor, a wafer detection sensor, and a motor.
  • FIG. 1 is a plan view of a polishing apparatus according to the present invention
  • FIG. 2 is a side view showing an appearance of the polishing apparatus.
  • the polishing apparatus comprises a polishing section 1, a cleaning section 10, a clean chamber 20, a mouth unload section 30, a wafer cassette section 40, and a force. Being done.
  • the entire polishing apparatus except the wafer cassette section 40 is housed in the housing 100.
  • a pair of polishing units 2a and 2b are disposed to face left and right.
  • two SCARA robots 11a and 11b are arranged at the center, and one SCARA robot 11a and 11b are placed on both sides of the SCARA robots.
  • Machines 1 2 and 1 3 are arranged, and two washing machines are placed on both sides of the reversing machines 1 2 and 1 3, that is, the primary washing machines 14 a and 14 b and the secondary washing machine 15 a : 1 5b and are arranged.
  • a partition wall 101 is provided between the polishing section 1 and the cleaning section 10. The transfer of the semiconductor wafer between the polishing section 1 and the cleaning section 10 is performed by an opening formed in the partition wall 101.
  • a partition 102 is provided to separate the cleaning section 10 from the clean room 20 and the load-an opening section 30.
  • a partition 103 is provided to separate the clean room 20 and the load unloading section 30.
  • a power distribution board is housed in a room 69 surrounded by a washing unit 10 and a tarin room 20.
  • the wafer cassette section 40 adjacent to the load unloading section 30 is of a sealed type capable of accommodating the wafer cassette in a space sealed by the housing, and the shutter is used when taking out a semiconductor wafer. It is open to the public.
  • the wafer cassette section 40 supplies a semiconductor wafer to be polished to a processing section such as the polishing section 1 and the cleaning section 10 and constitutes a storage section for receiving the polished semiconductor wafer.
  • finoletter units 70 and 80 are installed above the cleaning unit 10 and the load unloading unit 30, and the cleaning unit 70 is provided by the filter unit 70.
  • the air in the load / unload section 30 is cleaned by the filter unit 80.
  • the cleaning unit 10 is provided with an exhaust unit E for forcibly exhausting dirty air in the cleaning unit 10 to the outside of the polishing apparatus.
  • the filter unit 80 has the same configuration as that of the filter unit 70, and has a suction port on the floor of the load unloading section 30 and communicates with the filter unit 80 in the same manner as described above.
  • an exhaust means E1 for forcibly exhausting air out of the polishing apparatus is provided in the polishing section 30.
  • a slit 103b is provided in the partition wall 103, and the inside of the clean room 20 is connected to the duct RD 1 by the intake port on the floor of the clean room 20.
  • the air is sucked by the filter unit 80 through the filter unit 80, and the air in the clean room 20 is cleaned by the filter unit 80.
  • the filter unit 80 is constantly adjusted to have a higher pressure than the filter unit # 0 so as to maintain the cleanliness of the tarin chamber 20. That is, the slit 103 b and the duct RD 1 generate a circulating flow in the clean room 20, and the cleanness of the clean room 20 is maintained.
  • the pressure in the load / unload section 30, the clean room 20, and the washing section 10 was increased in order. , PP,.
  • the pressure P of the washing section 10 is set to.
  • Pressure P 3 of is adjusted power sale by decreases below the pressure in the clean room which is installed in the apparatus, mouth one Doan mouth once part 3 0. Is adjusted to be higher than the clean room pressure.
  • the pressure P, of the polishing section 1 is the pressure P! . It is set lower. With such a pressure setting and shutter, the semiconductor wafer contained in the wafer cassette can be kept in a highly clean state, and the dirty atmosphere of the polishing section 1 and the cleaning section 10 can be reduced. It can prevent the semiconductor wafer in the wafer from being affected.
  • FIG. 3 is a perspective view showing details of the polishing section 1 and the cleaning section 10.
  • the housing 100 and the gap between the polishing section 1 and the cleaning section 10 are shown.
  • the wall 101 is not shown.
  • the two polishing units 2a and 2b are basically symmetrical devices with the same specifications, and each has a turntable with a polishing cloth 9 attached to the upper surface. 3, a topping head 4 for holding the semiconductor wafer by vacuum suction and pressing it against the turntable surface, and a dressing head 5 for dressing (sharpening) the polishing pad.
  • the topping head 4 is provided above the turntable 3 and has a topping 7 for holding the semiconductor wafer 6 and pressing the semiconductor wafer 6 against the turntable 3.
  • the turntable 3 is connected to a motor (not shown), and is rotatable around its axis.
  • the top ring 7 is connected to a motor and a lifting cylinder (not shown).
  • the topping 7 can be moved up and down and rotatable around its axis, so that the semiconductor wafer 6 can be pressed against the polishing cloth 9 with an arbitrary pressure. I have.
  • the semiconductor wafer 6 is attracted to the lower end surface of the topping 7 by a vacuum or the like.
  • a polishing liquid supply nozzle (not shown) is provided above the turntable 3, and the polishing liquid is supplied onto the polishing cloth 9 attached to the turntable 3 by the polishing liquid supply nozzle. It has become to be.
  • the dressing head 5 has a dressing member 8.
  • the dressing member 8 is located on the side opposite to the position of the topping 7 on the polishing cloth 9 and is configured to be able to dress the polishing cloth 9.
  • a dressing liquid used for dressing, for example, pure water is supplied to the polishing pad 9 from a dressing liquid supply nozzle (not shown) extending on the table.
  • the dressing member 8 is connected to a lifting cylinder and a rotation motor, and can be raised and lowered and rotatable around its axis.
  • the semiconductor wafer 6 held by the topping 7 is pressed onto the polishing cloth 9, and the turntable 3 and the top ring 7 are rotated, whereby the lower surface ( The surface to be polished is rubbed with the polishing pad 9.
  • the surface to be polished of the semiconductor wafer 6 causes the mechanical polishing action of the abrasive grains in the polishing liquid and the liquid of the polishing liquid. It is polished by a combined action with the chemical polishing action of the component, aluminum.
  • the polishing is completed when the semiconductor wafer 6 is polished to a predetermined polishing amount.
  • the characteristics of the polishing cloth 9 are changed by the polishing, and the polishing performance of the next polishing is degraded. Therefore, the dressing member 8 dresses the polishing cloth 9.
  • the polishing stub 2 a 2 b includes a pusher 81 for exchanging a semiconductor wafer with the top ring 7.
  • the top ring 7 can turn in a horizontal plane, and the pusher 81 can move up and down.
  • the structure of the washing machine is arbitrary.
  • the first washing machine 14a14b is a washing machine of the type that wipes both sides of the semiconductor wafer with a sponge-equipped roller
  • the second washing machine 15a Reference numeral 15b denotes a washing machine of a type in which a cleaning liquid is supplied while gripping an edge of a semiconductor wafer and rotating the semiconductor wafer in a horizontal plane.
  • the latter has a function as a dryer for drying by centrifugal dehydration.
  • Primary cleaning of semiconductor wafers can be performed in the primary cleaning machines 14a and 14b, and secondary cleaning of semiconductor wafers after the primary cleaning can be performed in the secondary cleaning machines 15a and 15b. You can do it.
  • Sukararobo' DOO 1 1 a 1 1 b for example freely bent in the horizontal plane on top of the robot arm in which the articulated arm is provided, above and below, respectively It has two gripping parts, and these gripping parts are used as dry fingers and ⁇ et fingers.
  • the first robot 11a covers an area closer to the cassette than the reversing machine 1213 and the second robot 11a.
  • b is responsible for the area on the polishing unit side with respect to the reversing machines 12 and 13.
  • Fig. 4 to Fig. 6 show the cleaning section 10, the tarin chamber 20, and the load un
  • FIG. 4 is a sectional view taken along line IV-IV of FIG. 1
  • FIG. 5 is a sectional view taken along line V--V of FIG. 1
  • FIG. 6 is a sectional view taken along line VI--VI of FIG. is there.
  • a scalar robot 31 is installed in the load unloading section 3 ⁇ .
  • the SCARA robot 31 can travel between the solid line and the broken line in FIG. 1 by the linear motor 32.
  • the semiconductor wafers 6 are taken out one by one from the wafer cassette 41 in the wafer cassette unit 40 by the SCARA robot 31 and supplied to the adjacent clean room 20.
  • the opening 100a is closed by a vertically moving door 110.
  • the door 110 opens and forms an opening 100a, but before processing, after processing, and when the equipment is stopped, the door 11 is closed, and the load unloading port 30 and the wafer cassette are closed. Perform maintenance and exchange wafer cassettes while isolating part 40.
  • the wafer cassette perform maintenance and exchange wafer cassettes while isolating part 40.
  • an opening 103 a is provided in the partition wall 103 that separates the clean room 20 from the load / unload section 30, and a shirt 22 that opens and closes the opening 103 a is provided.
  • Shirtta 2 2 It is opened and closed by the cylinder 23.
  • an opening 102 a is provided in a partition wall 102 that separates between the clean room 20 and the washing section 10, and the opening 102 a is opened and closed.
  • Shutters 24 are provided. The shutter 24 is opened and closed by an air cylinder 25.
  • the scalar robot 31 takes out the semiconductor wafer 6 from the wafer cassette section 40 when loading the wafer into the processing section.
  • the shutter 22 on the loading / unloading part 30 side is opened, and the semiconductor wafer 6 is set on the handing table 50 in the clean room 20.
  • the shutter 22 is closed, the shirt 24 on the processing unit side is opened, the semiconductor wafer 6 on the handling table 50 is taken out by the SCARA robot 11a, and then the shirt 2 on the processing unit is removed. Close 4.
  • the procedure is reversed. By carrying the wafer in and out of the processing section in this procedure, contamination from each wafer processing section does not enter the load-and-open port section 30.
  • FIG. 7 to 9 are diagrams showing details of the handling table 50.
  • FIG. 7 is a front view of the handling table
  • FIG. 8 is a plan view of the handling table
  • FIG. It is an IX line arrow view.
  • the handing table 50 has a box-shaped frame 51 and a plate 51 a on the upper surface of the frame 51 and is fixed to an inverted conical tapered surface.
  • the four support members 52 that have 52 a and support the semiconductor wafer 6 by contacting the outer peripheral edge of the semiconductor wafer 6 and the semiconductor wafer 6 supported by the support member 52 are received by a predetermined amount.
  • It has four alignment members 53 to be rotated.
  • the four positioning members 53 are fixed to a turntable 54, and the turntable 54 is rotatable by a motor 55 (
  • the motor 55 and the turntable 54 are supported by an elevating table 56, and the elevating table 56 can be moved up and down by an air cylinder 57.
  • Reference numeral 60 is a spline shaft.
  • a notch detection sensor 58 for detecting a notch on the outer peripheral portion of the semiconductor wafer 6 is fixed on the upper surface of the plate 51a.
  • the upper surface of the frame 5 1, the wafer detecting sensor 5 9 for detecting whether or not the semiconductor wafer 6 is present is fixed to the support member 5 and second tapered surfaces 5 on 2 a.
  • FIGS. 10A and 10B are diagrams showing the relationship among the notch detection sensor 58, the support member 52, and the alignment member 53.
  • the notch detection sensor 58 is composed of a light projecting unit 58a, a light receiving unit 58b, and a force.
  • the semiconductor wafer 6 supported on a predetermined circumference of the tapered surface 52 a of the support member 52 is received by the positioning member 53 raised by the air cylinder 57, and thereafter, the positioning member 53 is driven to rotate by the motor 55.
  • the notch detection sensor 58 has its optical axis aligned with a position where the notch of the rotating semiconductor wafer 6 can be detected, and the light from the light emitting section 58a is normally in a light-blocking state.
  • the light receiving portion 58b receives the light from the light projecting portion 58a only when the notch of the semiconductor wafer 6 passes through the optical axis, converts the light into an electric signal, and outputs the signal.
  • the notch detection sensor 58, the positioning member 53, the turntable 54, and the motor 55 constitute a notch position alignment mechanism of the semiconductor wafer 6.
  • the wafer detection sensor 59 includes a light projecting portion 59a and a light receiving portion 59b, and the light from the light projecting portion 59a supports the supporting member 5a.
  • FIG. 11 is a block diagram showing a control circuit of the notch detection sensor 58, the wafer detection sensor 59, and the motor 55. As shown in FIG. 11, the notch detection sensor 58 is connected to the drive unit 62 via the sensor amplifier 61.
  • the drive unit 62 and the motor (direct drive motor) 55 are connected to each other by a motor cable and a resolver cable.
  • the drive unit 62 is connected to the on-board computer 64 by an RS232C cable.
  • the wafer detection sensor 59 is connected to the board computer 64 via the sensor amplifier 66.
  • an origin confirmation sensor 67 for confirming the origin of the motor 55 is installed.
  • the confirmation sensor 67 is connected to the board computer 64 via the sensor amplifier 68.
  • a detection target 75, which is detected by an origin confirmation sensor 67, is fixed to the turntable 54 (see FIG. 7).
  • the semiconductor wafer 6 processed in the processing section is transferred to the taper surface 52a of the support member 52 in the handling table 50 by the robot 11a. At this time, the semiconductor wafer 6 is centered by the four taper surfaces 52a (see FIG. 10A).
  • the semiconductor wafer 6 is detected by the wafer detection sensor 59 (when a wafer is detected, the air cylinder 57 operates to raise the positioning member 53). Then, the semiconductor wafer 6 is received, and the semiconductor wafer 6 becomes rotatable (see FIG. 10B) In this state, the board computer 64 starts driving the motor 55.
  • a sensor signal is output (ON), and this signal is input to the drive unit 62.
  • the motor 55 rotates and stops by the preset number of pulses from the timing when the signal is output (ON). As a result, the notch position of the semiconductor wafer is aligned in a predetermined direction.
  • the SCARA robot 31 receives the semiconductor wafer 6 on the support member 52, and stores the semiconductor wafer 6 in the wafer cassette 41 in the wafer cassette unit 40.
  • the top ring 7 swivels on the polishing cloth of the polishing unit to polish the wafer.
  • the top ring 7 holding the polished semiconductor wafer again pivots above the pusher 81, the pusher 81 rises and the semiconductor wafer is delivered to the pusher 81, and the semiconductor wafer is pushed to the pusher 81.
  • the rinse is performed by the rinse liquid supply device provided at the position.
  • the semiconductor wafer is cleaned in a state of being separated from the top ring 7 by the pusher 81 and the cleaning machine 14a, so that the semiconductor wafer adheres not only to the polished surface but also to the back surface and side surfaces.
  • the polishing liquid for the first polishing can be completely removed.
  • After being subjected to the second polishing it is washed in the washer 14b and the washer 15a, dried by spinning, and returned to the cassette 41 via the handing table 50.
  • the polishing conditions in the first polishing unit 2a and the polishing conditions in the second polishing unit 2b are different.
  • washing machines In this case, four washing machines are operated. Two cassettes may be used or one cassette may be shared.
  • Semiconductor wafer is wafer cassette 4 1 ⁇ handling table 50 ⁇ reversing machine 1 2 ⁇ polishing unit 2a ⁇ washing machine 14a ⁇ reversing machine 13 ⁇ washing machine 15a ⁇ handling table 50 ⁇
  • the flow of moving with the wafer cassette 41 and the semiconductor wafer are transferred from the wafer cassette 41 to the handling table 50 lb
  • the reversing machines 12 and 13 are the same in the case of the series processing. However, the reversing machine 12 handles a dry semiconductor wafer before polishing and the reversing machine 1 uses a wet semiconductor wafer after polishing.
  • the washing machine may be used on either side of the transport line.
  • the polishing conditions in the polishing units 2a and 2b were the same, and the cleaning conditions in the washing machines 14a and 14b were the same.
  • the washing machines 15a and 15b Are the same. In the cleaning machines 15a and 15b, the semiconductor wafer is cleaned and spun dried, and then the soldering table 5 is removed.
  • the closed type wafer cassette is described.
  • the wafer cassette may be a normal open type wafer cassette.
  • a processing unit in a polishing apparatus is provided.
  • the reference position (orientation flat notch or the like) of the semiconductor wafer can be stopped in a predetermined direction. Therefore, a plurality of processed semiconductor wafers can be aligned in a predetermined direction in the housing portion without requiring a separate step for aligning the semiconductor wafers. For this reason, a dedicated machine for positioning can be omitted.
  • three steps of polishing a semiconductor wafer, cleaning, and aligning a reference position of a semiconductor wafer can be performed during automatic operation in the same apparatus.
  • the present invention relates to a polishing apparatus for polishing an object to be polished such as a semiconductor wafer in a flat and mirror-like manner, and is suitably used for chemical mechanical polishing (CMP) which is one of semiconductor device manufacturing processes.
  • CMP chemical mechanical polishing

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Cet appareil de polissage d'un objet à polir, tel qu'une plaquette à semi-conducteur, comprend une unité de traitement présentant une polisseuse (1) servant à polir une plaquette à semi-conducteur (6), ainsi qu'une section (10) de nettoyage de la plaquette polie, une unité de logement (40) destinée à acheminer une plaquette (6) à polir vers l'unité de traitement et à recevoir la plaquette polie (6), ainsi qu'une salle blanche (20) disposée entre les deux unités et délimitée par des cloisons (102, 103) présentant des volets (22, 24) servant à isoler cette salle des deux unités.
PCT/JP1999/001131 1998-03-09 1999-03-09 Appareil de polissage WO1999046084A1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US09/423,445 US6293855B1 (en) 1998-03-09 1999-03-09 Polishing apparatus
EP99939175A EP0987084A4 (fr) 1998-03-09 1999-03-09 Appareil de polissage
JP54561299A JP4156039B2 (ja) 1998-03-09 1999-03-09 ポリッシング装置
KR1019997010295A KR100552009B1 (ko) 1998-03-09 1999-03-09 폴리싱 장치
US11/177,278 US7063600B2 (en) 1998-03-09 2005-07-11 Polishing apparatus

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP10/74870 1998-03-09
JP7487098 1998-03-09
JP25341898 1998-09-08
JP10/253418 1998-09-08

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US09/423,445 A-371-Of-International US6293855B1 (en) 1998-03-09 1999-03-09 Polishing apparatus
US09/931,412 Division US6929529B2 (en) 1998-03-09 2001-08-17 Polishing apparatus

Publications (1)

Publication Number Publication Date
WO1999046084A1 true WO1999046084A1 (fr) 1999-09-16

Family

ID=26416048

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1999/001131 WO1999046084A1 (fr) 1998-03-09 1999-03-09 Appareil de polissage

Country Status (5)

Country Link
US (3) US6293855B1 (fr)
EP (1) EP0987084A4 (fr)
JP (1) JP4156039B2 (fr)
KR (1) KR100552009B1 (fr)
WO (1) WO1999046084A1 (fr)

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JP5155517B2 (ja) * 2005-04-21 2013-03-06 株式会社荏原製作所 ウエハ受渡装置及びポリッシング装置
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JP6055648B2 (ja) * 2012-10-26 2016-12-27 株式会社荏原製作所 研磨装置及び研磨方法
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US9539699B2 (en) * 2014-08-28 2017-01-10 Ebara Corporation Polishing method
JP6587379B2 (ja) * 2014-09-01 2019-10-09 株式会社荏原製作所 研磨装置
KR101616464B1 (ko) * 2014-11-18 2016-04-29 주식회사 엘지실트론 웨이퍼 연마장비의 웨이퍼 로딩장치 및 웨이퍼 로딩위치 조정 방법
JP6971676B2 (ja) * 2016-08-29 2021-11-24 株式会社荏原製作所 基板処理装置および基板処理方法
CN107799436B (zh) * 2016-08-29 2023-07-07 株式会社荏原制作所 基板处理装置及基板处理方法
US11292101B2 (en) * 2017-11-22 2022-04-05 Taiwan Semiconductor Manufacturing Co., Ltd. Chemical mechanical polishing apparatus and method
US20220111485A1 (en) * 2020-10-08 2022-04-14 Kctech Co., Ltd. Substrate processing system
KR102513857B1 (ko) * 2021-01-14 2023-03-27 에스케이실트론 주식회사 기류 순환 시스템 및 이를 구비한 파이널 폴리싱 장치

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Also Published As

Publication number Publication date
KR100552009B1 (ko) 2006-02-20
US7063600B2 (en) 2006-06-20
US6929529B2 (en) 2005-08-16
EP0987084A1 (fr) 2000-03-22
US20060003672A1 (en) 2006-01-05
KR20010012343A (ko) 2001-02-15
JP4156039B2 (ja) 2008-09-24
US6293855B1 (en) 2001-09-25
EP0987084A4 (fr) 2006-11-15
US20010053663A1 (en) 2001-12-20

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