TWI743610B - 半導體基板、半導體基板的製造方法以及半導體元件的製造方法 - Google Patents

半導體基板、半導體基板的製造方法以及半導體元件的製造方法 Download PDF

Info

Publication number
TWI743610B
TWI743610B TW108144217A TW108144217A TWI743610B TW I743610 B TWI743610 B TW I743610B TW 108144217 A TW108144217 A TW 108144217A TW 108144217 A TW108144217 A TW 108144217A TW I743610 B TWI743610 B TW I743610B
Authority
TW
Taiwan
Prior art keywords
layer
removal layer
removal
semiconductor
etching
Prior art date
Application number
TW108144217A
Other languages
English (en)
Chinese (zh)
Other versions
TW202038301A (zh
Inventor
荻原光彦
Original Assignee
日商菲爾尼克斯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商菲爾尼克斯股份有限公司 filed Critical 日商菲爾尼克斯股份有限公司
Publication of TW202038301A publication Critical patent/TW202038301A/zh
Application granted granted Critical
Publication of TWI743610B publication Critical patent/TWI743610B/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H01L21/30621—Vapour phase etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02392—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02395—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02543—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Recrystallisation Techniques (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)
  • Led Devices (AREA)
  • Bipolar Transistors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
TW108144217A 2018-12-10 2019-12-04 半導體基板、半導體基板的製造方法以及半導體元件的製造方法 TWI743610B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018230683 2018-12-10
JP2018-230683 2018-12-10

Publications (2)

Publication Number Publication Date
TW202038301A TW202038301A (zh) 2020-10-16
TWI743610B true TWI743610B (zh) 2021-10-21

Family

ID=71077231

Family Applications (2)

Application Number Title Priority Date Filing Date
TW108144217A TWI743610B (zh) 2018-12-10 2019-12-04 半導體基板、半導體基板的製造方法以及半導體元件的製造方法
TW110133490A TWI804977B (zh) 2018-12-10 2019-12-04 半導體基板、半導體基板的製造方法以及半導體元件的製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW110133490A TWI804977B (zh) 2018-12-10 2019-12-04 半導體基板、半導體基板的製造方法以及半導體元件的製造方法

Country Status (5)

Country Link
US (2) US11894272B2 (enExample)
JP (2) JP6836022B2 (enExample)
CN (1) CN113169049B (enExample)
TW (2) TWI743610B (enExample)
WO (1) WO2020121649A1 (enExample)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006080305A (ja) * 2004-09-09 2006-03-23 Sharp Corp 化合物半導体素子エピタキシャル成長基板、半導体素子およびそれらの製造方法
JP2013183125A (ja) * 2012-03-05 2013-09-12 Sharp Corp 化合物半導体素子エピタキシャル成長基板

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0646026Y2 (ja) 1987-08-19 1994-11-24 沖電気工業株式会社 メンブレンキ−ボ−ドの防塵構造
JP2560601B2 (ja) * 1993-03-12 1996-12-04 日本電気株式会社 元素半導体基板上の金属膜／化合物半導体積層構造の製造方法
JP3377022B2 (ja) * 1997-01-23 2003-02-17 日本電信電話株式会社 ヘテロ接合型電界効果トランジスタの製造方法
JP3371871B2 (ja) * 1999-11-16 2003-01-27 日本電気株式会社 半導体装置の製造方法
JP3716906B2 (ja) * 2000-03-06 2005-11-16 日本電気株式会社 電界効果トランジスタ
KR100438895B1 (ko) * 2001-12-28 2004-07-02 한국전자통신연구원 고전자 이동도 트랜지스터 전력 소자 및 그 제조 방법
JP3813123B2 (ja) 2002-12-25 2006-08-23 株式会社沖データ 半導体装置及びｌｅｄヘッド
JP4315744B2 (ja) * 2003-06-25 2009-08-19 株式会社沖データ 積層体及び半導体装置の製造方法
JP2005191022A (ja) * 2003-12-24 2005-07-14 Matsushita Electric Ind Co Ltd 電界効果トランジスタ及びその製造方法
US7205176B2 (en) * 2004-05-24 2007-04-17 Taiwan Semiconductor Manufacturing Company Surface MEMS mirrors with oxide spacers
US20060208265A1 (en) * 2005-03-17 2006-09-21 Hitachi Cable, Ltd. Light emitting diode and light emitting diode array
KR101430587B1 (ko) 2006-09-20 2014-08-14 더 보오드 오브 트러스티스 오브 더 유니버시티 오브 일리노이즈 전사가능한 반도체 구조들, 디바이스들 및 디바이스 컴포넌트들을 만들기 위한 릴리스 방안들
JP4200389B2 (ja) * 2007-02-22 2008-12-24 セイコーエプソン株式会社 光素子
JP4466668B2 (ja) 2007-03-20 2010-05-26 セイコーエプソン株式会社 半導体装置の製造方法
JP2008270794A (ja) * 2007-03-29 2008-11-06 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP4871973B2 (ja) 2009-04-28 2012-02-08 株式会社沖データ 半導体薄膜素子の製造方法並びに半導体ウエハ、及び、半導体薄膜素子
JP2011249776A (ja) * 2010-04-30 2011-12-08 Sumitomo Chemical Co Ltd 半導体基板、半導体基板の製造方法、電子デバイス、および電子デバイスの製造方法
JP5893246B2 (ja) * 2010-11-08 2016-03-23 キヤノン株式会社 面発光レーザ及び面発光レーザアレイ、面発光レーザの製造方法及び面発光レーザアレイの製造方法、面発光レーザアレイを備えた光学機器
JP2013211355A (ja) * 2012-03-30 2013-10-10 Oki Data Corp ３端子発光素子、３端子発光素子アレイ、プリントヘッドおよび画像形成装置
US9859112B2 (en) * 2013-07-18 2018-01-02 Taiwan Semiconductor Manufacturing Co., Ltd Bonded semiconductor structures
CN106463553A (zh) * 2014-01-16 2017-02-22 伊利诺斯州大学信托董事会 基于印刷的多结、多端光伏装置
KR102178828B1 (ko) * 2014-02-21 2020-11-13 삼성전자 주식회사 멀티 나노와이어 트랜지스터를 포함하는 반도체 소자
KR102282141B1 (ko) * 2014-09-02 2021-07-28 삼성전자주식회사 반도체 발광소자
WO2016079929A1 (ja) * 2014-11-21 2016-05-26 信越半導体株式会社 発光素子及び発光素子の製造方法
US9299615B1 (en) * 2014-12-22 2016-03-29 International Business Machines Corporation Multiple VT in III-V FETs
US9444019B1 (en) * 2015-09-21 2016-09-13 Epistar Corporation Method for reusing a substrate for making light-emitting device
US9461159B1 (en) * 2016-01-14 2016-10-04 Northrop Grumman Systems Corporation Self-stop gate recess etching process for semiconductor field effect transistors
US9685539B1 (en) * 2016-03-14 2017-06-20 International Business Machines Corporation Nanowire isolation scheme to reduce parasitic capacitance
JP6729275B2 (ja) * 2016-10-12 2020-07-22 信越半導体株式会社 発光素子及び発光素子の製造方法
WO2019134075A1 (en) * 2018-01-03 2019-07-11 Xiamen Sanan Integrated Circuit Co., Ltd. Consumer semiconductor laser
JP6431631B1 (ja) 2018-02-28 2018-11-28 株式会社フィルネックス 半導体素子の製造方法
US10461154B1 (en) * 2018-06-21 2019-10-29 International Business Machines Corporation Bottom isolation for nanosheet transistors on bulk substrate
US11087974B2 (en) * 2018-10-08 2021-08-10 The Regents Of The University Of Michigan Preparation of compound semiconductor substrate for epitaxial growth via non-destructive epitaxial lift-off

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006080305A (ja) * 2004-09-09 2006-03-23 Sharp Corp 化合物半導体素子エピタキシャル成長基板、半導体素子およびそれらの製造方法
JP2013183125A (ja) * 2012-03-05 2013-09-12 Sharp Corp 化合物半導体素子エピタキシャル成長基板

Also Published As

Publication number Publication date
JPWO2020121649A1 (ja) 2021-02-15
WO2020121649A1 (ja) 2020-06-18
TW202038301A (zh) 2020-10-16
CN113169049B (zh) 2022-07-05
TWI804977B (zh) 2023-06-11
US11894272B2 (en) 2024-02-06
CN113169049A (zh) 2021-07-23
JP6836022B2 (ja) 2021-02-24
US12183636B2 (en) 2024-12-31
JP2021077909A (ja) 2021-05-20
US20240120238A1 (en) 2024-04-11
US20210280467A1 (en) 2021-09-09
JP7441525B2 (ja) 2024-03-01
TW202147392A (zh) 2021-12-16

Similar Documents

Publication Publication Date Title
TWI767788B (zh) 工程基板結構
US5071792A (en) Process for forming extremely thin integrated circuit dice
JP6650463B2 (ja) 電荷トラップ層を備えた高抵抗率の半導体・オン・インシュレーターウェハーの製造方法
JP2020505767A (ja) パワーデバイス用の窒化ガリウムエピタキシャル構造
KR20110105860A (ko) 열팽창 계수의 국부적 적응을 갖는 헤테로구조를 제조하는 방법
TWI734359B (zh) 用於製作光電半導體晶片的方法及其所使用的鍵合晶圓
US7491966B2 (en) Semiconductor substrate and process for producing it
CN103000492B (zh) 制造堆叠的氮化物半导体结构的方法以及制造氮化物半导体发光装置的方法
TWI743610B (zh) 半導體基板、半導體基板的製造方法以及半導體元件的製造方法
TW201718930A (zh) 具有經減低之線差排密度的基材之製造方法
JP5484578B2 (ja) 複合基板および製造方法
CN111509095B (zh) 复合式基板及其制造方法
WO2008090426A1 (en) Process for forming and controlling rough interfaces
TWI241651B (en) Semiconductor etch speed modification
TWI588886B (zh) 製造半導體裝置之方法
WO2021192938A1 (ja) 接合ウェーハの製造方法及び接合ウェーハ
EP3370249B1 (en) Bonded soi wafer manufacturing method
CN101147253A (zh) 包括至少一个厚半导体材料膜的异质结构的制作工艺
TW202240653A (zh) 製作含凝聚物之交界區之半導體結構之方法
JP2608443B2 (ja) 半導体ウエハの製造方法
CN119349500A (zh) 一种绝压式传感器的制作方法及绝压式传感器结构
KR20120021946A (ko) 질화물 단결정 제조방법 및 질화물 반도체 발광소자 제조방법
CN114823479A (zh) 一种Si基SiC晶圆及其制备方法
JP2021077909A5 (enExample)
Ashrafi et al. Phase stability of CdO on zincblende layers grown on GaAs substrates by metalorganic molecular-beam epitaxy