TWI710062B - 切割金屬閘極之方法 - Google Patents

切割金屬閘極之方法 Download PDF

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TWI710062B
TWI710062B TW105136459A TW105136459A TWI710062B TW I710062 B TWI710062 B TW I710062B TW 105136459 A TW105136459 A TW 105136459A TW 105136459 A TW105136459 A TW 105136459A TW I710062 B TWI710062 B TW I710062B
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metal gate
metal
hard mask
gate
forming
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TW201727833A (zh
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張博欽
王志豪
楊凱傑
洪士庭
吳偉豪
吳琬瑤
傅依婷
蘇嘉偉
蕭怡瑄
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台灣積體電路製造股份有限公司
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Abstract

一種製造半導體元件之方法，此方法包括在基板上形成第一鰭與第二鰭。此第一鰭具有第一閘極區域且此第二鰭具有第二閘極區域。此方法亦包括在此第一及第二閘極區域上形成金屬閘極接線。此金屬閘極接線從第一鰭延伸至第二鰭。此方法亦包括施加線切割以將金屬閘極接線分為第一子金屬閘極接線及第二子金屬閘極接線，並且在線切割中形成隔離區域。

Description

切割金屬閘極之方法
本揭露是關於一種切割金屬閘極之方法。
積體電路材料與設計之先進技術已產生數代積體電路，其中與前代相比各代具有更小且更複雜之電路。在積體電路發展過程中，功能密度(即，每晶片面積互連元件之數量)通常已增加而幾何尺寸(即，使用製造製程可產生之最小組件(或接線))已減小。此按比例縮小製程一般藉由增加生產效率並降低相關成本來提供優勢。此按比例縮小亦增加積體電路處理與製造之複雜性，且對於此等進步而言，需要更多積體電路處理與製造之發展。
在一些積體電路設計中，一種作為技術節點(node)縮小實施之進展已經使用金屬閘電極取代通常聚矽閘電極以改良具有減小特徵尺寸之元件效能。儘管一般而言現存製造積體電路元件之方法針對預期目的已足夠，但是在各方面並未完全滿意。例如，將金屬電極接線切割為子金屬電極接線時會出現困難。
本揭露之一實施例為一種切割金屬閘極之方法包括在基板上形成第一鰭及第二鰭。第一鰭具有第一閘極區域而第二鰭具有第二閘極區域。此方法亦包括在第一及第二閘極區域上形成金屬閘極線。此金屬閘極線從第一鰭延伸至第二鰭。此方法亦包括施加線切割以將金屬閘極線分為第一子金屬閘極線與第二子金屬閘極線，並且在線切割中形成隔離區域。
本揭露之實施例為一種切割金屬閘極之方法包括在基板上形成複數個金屬閘極堆疊，以使得此複數個閘極堆疊彼此連接以形成金屬閘極線。此複數個金屬閘極堆疊具有沿著金屬閘極堆疊側壁配置之側壁間隔。此方法亦包括在鄰近金屬閘極堆疊之基板中形成源極/汲極特徵、在金屬閘極堆疊及源極/汲極特徵上形成層間介電層、開槽複數個金屬閘極堆疊及側壁間隔、在被開槽之複數個金屬閘極堆疊及被開槽之側壁間隔上形成硬遮罩、移除部分層間介電層以曝露源極/汲極特徵，此硬遮罩保護開槽之金屬閘極堆疊及開槽之側壁間隔。此方法亦包括在經曝露之源極/汲極特徵上形成接觸金屬層、形成線切割以將金屬閘極線切割為子金屬閘極線，並在線切割中形成隔離區域。
本揭露之實施例為一種切割金屬閘極之方法包括在基板上形成複數個鰭，每一鰭包含閘極區域，在每一閘極區域中形成虛設閘極堆疊，沿各虛設閘極堆疊之側壁形成側壁間隔，在包括除虛設閘極堆疊以外之基板上形成層間介電層。此方法亦包括移除虛設閘極堆疊以在此閘極區域中曝露部分鰭，在經曝露之部分鰭上形成金屬閘極堆疊，其中此金屬閘極 堆疊形成金屬閘極線，開槽金屬閘極堆疊，在經開槽之金屬閘極堆疊上形成硬遮罩，形成線切割以將金屬閘極線切割為子金屬閘極線，同時此硬遮罩保護金屬閘極堆疊並在線切割中形成隔離區域。
100:方法
102:步驟
104:步驟
106:步驟
108:步驟
110:步驟
112:步驟
200:半導體元件
205:工件
210:基板
220:隔離特徵
230:鰭特徵
240:虛設閘極堆疊
242:閘極區域
245:側壁間隔
245’:側壁間隔
250:源極/汲極特徵
252:源極/汲極區域
260:層間介電層
310:閘極溝槽
410:閘極堆疊
410’:高介電常數/金屬閘極堆疊
410L:高介電常數/金屬閘極線
410LA:子高介電常數/金屬閘極線
410LB:子高介電常數/金屬閘極線
412:閘極介電層
414:閘極金屬層
510:經圖案化之硬遮罩
515:開口
610:線切割
715:隔離區域
1000:方法
1002:步驟
1004:步驟
1006:步驟
1008:步驟
1010:步驟
1012:步驟
1014:步驟
1016:步驟
1018:步驟
1210:子溝槽
1220:硬遮罩
1220’:硬遮罩
1230:硬遮罩
1235:開口
1240:線切割
1255:隔離區域
2000:半導體元件
3000:方法
3002:步驟
3004:步驟
3006:步驟
3008:步驟
3010:步驟
3012:步驟
3014:步驟
3016:步驟
3018:步驟
3020:步驟
3022:步驟
3024:步驟
3026:步驟
3028:步驟
3030:步驟
3210:第一溝槽
3210’:第二溝槽
3230:第二硬遮罩
3240:第一經圖案化之硬遮罩
3245:開口
3250:源極/汲極接觸溝槽
3410:第二經圖案化之硬遮罩
3415:開口
3420:線切割
3515:隔離區域
4000:半導體元件
A-A:線
B-B:線
當結合隨附圖式閱讀時，自以下詳細描述將最佳地理解本揭露之態樣。應注意，根據工業中的標準實務，各特徵並非按比例繪製。事實上，出於論述清晰之目的，可任意增加或減小各所示特徵之尺寸。
第1圖為本揭露之部分實施例的製造半導體元件之方法的流程圖。
第2A圖為本揭露之部分實施例的半導體元件之工件的透視圖。
第2B圖為第2A圖中沿線A-A之半導體元件之工件的截面圖。
第2C圖為第2A圖中沿線B-B之半導體元件之工件的截面圖。
第3A、4A、5A、6A、6C及7A圖為依照一些實施例，在第2A圖中沿線A-A之半導體元件之截面圖。
第3B、4B、5B、6B、6D及7B圖係依照一些實施例，在第2A圖中沿線B-B之半導體元件之截面圖。
第8圖為本揭露之部分實施例的製造半導體元件之另一方法的流程圖。
第9A、10A、11A、12A、13A、13C及14A圖係依照一些實施例，在第2A圖中沿線A-A之示例性半導體元件的截面圖。
第9B、10B、11B、12B、13B、13D及14B圖係依照一些實施例，在第2A圖中沿線B-B之半導體元件的截面圖。
第15圖為本揭露之部分實施例的製造之半導體元件的另一方法的流程圖。
第16A、17A、18A、19A、20A、20C、21A、22A、23A、24A、24C及25A圖係依照一些實施例的在第2A圖中沿線A-A之半導體元件的截面圖。
第16B、17B、18B、19B、20B、20D、21B、22B、23B、24B、24D及25B圖係依照一些實施例，在第2A圖中沿線B-B之半導體元件的截面圖。
以下揭示內容提供許多不同實施例或實例，以便實施本揭露之不同特徵。下文描述元件及排列之特定實例以簡化本揭露。當然，此等實例僅為實例且並不意欲為限制性。舉例而言，以下描述中在第二特徵上方或第二特徵上形成第一特徵可包括以直接接觸形成第一特徵及第二特徵的實施例，且亦可包括可在第一特徵與第二特徵之間形成額外特徵以使得第一特徵及第二特徵可不處於直接接觸的實施例。另外，本揭露可在各實例中重複元件符號及/或字母。此重複係出於簡明性及清晰之目的，且本身並不指示所論述之各實施例及/或配置之間的關係。
進一步地，為了便於描述，本文可使用空間相對性術語，諸如「在……之下」、「在……下方」、「下部」、「在……上方」、「上部」及類似術語，來描述諸圖中所示之一個元件或特徵與另一元件(或多個元件)或特徵(或多個特徵)之關係。除了諸圖所描繪之定向外，空間相對性術語意欲包含在使用或操作中之裝置之不同定向。裝置可經其他方式定向(旋轉90度或處於其他定向)且因此可同樣相應解讀本文所使用之空間相對性描述詞。
本案係關於，但並非以其他方式受限於，鰭式場效電晶體(FinFET)元件。此元件可包括P-型金屬氧化物半導體鰭式場效電晶體元件或N-型金屬氧化物半導體鰭式場效電晶體元件。鰭式場效電晶體元件可為雙閘極元件、三閘極元件、塊狀元件、絕緣體上矽(silicon on insulator；SOI)元件、及/或其他構造。一般技術者可瞭解可受益於本案態樣之半導體元件其他實施例。例如，如本文描述之一些實施例亦可應用於環繞式閘極(GAA)元件、Ω-閘極元件、或Pi-閘極(II-閘極)元件。以下揭示內容將以鰭式場效電晶體實例繼續來闡明本揭露之各實施例。然而，應瞭解此應用不應受限於特定類型之元件。
第1圖為本揭露之部分實施例的製造一或多個半導體元件之方法100的流程圖。下文以在第2A圖至第7B圖中所示之半導體元件200來詳細論述方法100。
參看第1、2A、2B、及2C圖，方法100藉由接收半導體元件200之工件205起始於步驟102。工件205包括基板 210。基板210可為塊狀矽基板。或者，基板210可包含元素半導體，諸如結晶結構之矽(Si)或鍺(Ge)；化合物半導體，諸如鍺化矽(SiGe)、碳化矽(SiC)、砷化鎵(GaAs)、磷化鎵(GaP)、磷化銦(InP)、砷化銦(InAs)、及/或銻化銦(InSb)；或其組合。可能之基板210亦包括絕緣體上矽(SOI)基板。使用氧離子植入矽晶隔離法(separation by implantation of oxygen；SIMOX)、晶圓接合、及/或其他適宜方法來製造絕緣體上矽基板。
一些示例性基板210亦包括絕緣體層。此絕緣體層包含任何適宜材料，包括氧化矽、藍寶石、及/或其組合。示例性絕緣體層可為內埋式氧化物層(BOX)。藉由任何適宜製程，諸如注入(例如，氧離子植入矽晶隔離法)、氧化、沉積、及/或其他適宜製程來形成此絕緣體。在一些示例性半導體元件200中，絕緣體層係絕緣體上矽基板之組件(例如，一層)。
基板210亦可包括各摻雜區域。摻雜區域可摻雜有P-型摻雜劑，諸如硼或二氟化硼(BF2)；N-型摻雜劑，諸如磷或砷；或其組合。可直接在基板210上、在P-阱結構中、在N-阱結構中、在雙-阱結構中、及/或使用凸起結構來形成摻雜區域。基板210可進一步包括各種有效區域，諸如針對N-型金屬氧化物半導體電晶體元件配置之區域及針對P-型金屬氧化物半導體電晶體元件配置之區域。
基板210亦包括各種隔離特徵220。隔離特徵220分離基板210之各元件區域。隔離特徵220包括藉由使用不同處理技術形成之不同結構。例如，隔離特徵220可包括淺溝槽 隔離(STI)特徵。形成淺溝槽隔離可包括在基板210中蝕刻溝槽並使用絕緣體材料(諸如氧化矽、氮化矽、或氮氧化矽)填充此溝槽。經填充之溝槽可具有多層結構，諸如熱氧化襯層，其中氮化矽填充此溝槽。可進行化學機械研磨(chemical mechanical polishing；CMP)來回磨平過量絕緣體材料並使隔離特徵220之頂面平坦。
工件205亦包括在基板210上形成之複數個鰭特徵230。鰭特徵230可包括矽(Si)、矽鍺(SiGe)、錫鍺矽(SiGeSn)、砷化鎵(GaAs)、砷化銦(InAs)、磷化銦(InP)、或其他適宜材料。在一些實施例中，藉由包括各沉積、光微影、及/或蝕刻製程之任何適宜製程來形成鰭特徵230。例如，藉由圖案化及蝕刻部分基板210來形成鰭特徵230。
工件205亦包括在基板210上的閘極區域242中之複數個虛設閘極堆疊240，並包覆部分之鰭特徵230。在本實施例中，虛設閘極堆疊240後續將由高介電常數/金屬閘極取代。虛設閘極堆疊240可包括介電層、聚矽層。可藉由任何適宜製程或製程等，諸如沉積、圖案化及蝕刻，來製造虛設閘極堆疊240。
沿虛設閘極堆疊240之側壁形成側壁間隔245。側壁間隔245可包括介電材料，諸如氧化矽。或者，側壁間隔245可包括氮化矽、碳化矽、氮氧化矽、或其組合。在實施例中，側壁間隔245具有多個層。如在此項技術中已知，可藉由沉積閘極側壁間隔層並隨後各向異性乾蝕刻此閘極側壁間隔層來形成側壁間隔245。
除虛設閘極堆疊240(具有側壁間隔245)之外，工件205亦包括在基板210上的源極/汲極區域252中之源極/汲極特徵250。在一些實施例中，源極/汲極特徵250為源極特徵，且另一源極/汲極特徵250為汲極特徵。源極/汲極特徵250由虛設閘極堆疊240分離。在一實施例中，對虛設閘極堆疊240以外之部分鰭特徵230進行開槽以形成源極/汲極溝槽並隨後藉由包括化學氣相沉積(chemical vapor deposition；CVD)沉積技術(例如，汽相磊晶(vapor-phase epitaxy；VPE)及/或超高真空化學氣相沉積(UHV-CVD))、分子束磊晶法、及/或其他適宜製程的磊晶生長製程在此源極/汲極溝槽上形成源極/汲極特徵250。源極/汲極特徵250可包括鍺(Ge)、矽(Si)、砷化鎵(GaAs)、砷化鎵鋁(AlGaAs)、矽鍺(SiGe)、磷化砷鎵(GaAsP)、銻化鎵(GaSb)、銻化銦(InSb)、砷化鎵銦(InGaAs)、砷化銦(InAs)、或其他適宜材料。繼由源極/汲極特徵250填充源極/汲極溝槽之後，源極/汲極特徵250頂層之進一步磊晶生長，往水平方向延伸並可開始形成側面，諸如菱形側面。在磊晶製程期間可原位摻雜源極/汲極特徵250。在一些實施例中，未原位摻雜源極/汲極特徵，進行注入製程(即，接合注入製程)來摻雜源極/汲極特徵250。可進行一或多個退火製程來活化摻雜劑。退火製程包括快速熱退火(rapid thermal annealing；RTA)及/或雷射退火製程。
工件205亦包括在基板210上沉積之層間介電(interlayer dielectric；ILD)層260，包括形成在各虛設閘極堆疊240之間/之上及在源極/汲極特徵250上。可藉由化學氣相 沉積、原子層沉積(atomic layer deposition；ALD)、旋塗式塗覆法、或其他適宜技術沉積層間介電層260。層間介電層260可包括氧化矽、氮化矽、氮氧化物、具有低於熱氧化矽之介電場數(k)的介電材料(由此稱為低介電常數介電材料層)，及/或其他適宜介電材料層。層間介電層260可包括單一層或多個層。可進行化學機械研磨來回磨平層間介電層260以曝露虛設閘極堆疊240之頂面。
應注意，第2B圖係沿圖2A中之線A-A之工件205的截面圖，此工件位於兩個源極/汲極特徵250間。第2C圖係沿垂直於線A-A之線B-B之工件205的截面圖並位於閘極區域242中。
參看第1、3A及3B圖，一旦接收工件205，方法100即藉由移除虛設閘極堆疊240以形成閘極溝槽310進行至步驟104。在一些實施例中，此蝕刻製程可包括選擇性濕式蝕刻及/或選擇性乾式蝕刻，此等蝕刻對於鰭特徵230、側壁間隔245及層間介電層260具有足夠的蝕刻選擇性。在一實施例中，選擇性濕式蝕刻溶液包括氫氧化四甲銨(TMAH)、氫氟酸(HF)/硝酸(HNO3)/乙酸(CH3COOH)溶液、或其他適宜溶液。各蝕刻製程可經各蝕刻參數調整，此等蝕刻參數諸如使用之蝕刻劑、蝕刻溫度、蝕刻溶液濃度、蝕刻壓力、電源、射頻偏壓、射頻偏壓功率、蝕刻劑流速、及/或其他適宜參數。例如，濕式蝕刻溶液可包括氨水(NH4OH)、氫氧化鉀(KOH)、氫氟酸(HF)、氫氧化四甲銨(TMAH)、其他適宜濕式蝕刻溶液、或其組合。在另一實例中，乾式蝕刻製程包括使用氯基化學試劑的 偏壓電漿蝕刻製程。其他乾式蝕刻劑氣體包括四氟化碳(CF4)、三氟化氮(NF3)、六氟化硫(SF6)，及氦(He)。亦可使用如深反應性離子蝕刻(deep reactive-ion etching；DRIE)之此機制各向異性地進行乾蝕刻。或者，可藉由包括光微影、圖案化及回蝕刻之一系列製程來移除虛設閘極堆疊240。
參看第1、4A及4B圖，方法100進行至步驟106，藉由在半導體元件200之閘極溝槽310中形成閘極堆疊410，且覆蓋鰭特徵230之上部分。可進行化學機械研磨製程以從閘極金屬層414移除過量金屬層，以此提供閘極金屬層414實質上平坦之頂面。由此，沿線B-B之方向，閘極堆疊410從一鰭特徵230繼續延伸至另一鰭特徵230以形成閘極線410L。閘極堆疊410可為高介電常數/金屬閘極堆疊，而其他組分係可能的。
在本實施例中，在閘極溝槽310中形成閘極堆疊410，包括包覆部分鰭特徵230。在各實施例中，閘極堆疊410包括分界層、在分界層上形成之閘極介電層412及在閘極介電層412上形成之閘極金屬層414。如本文中使用及描述，閘極介電層包括具有高介電常數的介電材料，例如，大於熱氧化矽之介電常數(~3.9)之介電材料。閘極金屬層414可包括金屬、金屬合金、及/或金屬矽化物。此外，製造閘極堆疊410可包括沉積以形成各閘極材料、一或多個襯層、及一或多個化學機械研磨製程來移除過量閘極金屬並由此使半導體元件200之頂面平坦化。
在一些實施例中，分界層可包括介電材料，諸如氧化矽(SiO2)、矽酸鉿(HfSiO)、及/或氮氧化矽(SiON)。此 分界層可藉由化學氧化、熱氧化、原子曾沉積、化學氣相沉積、及/或其他適宜方法來形成。閘極介電層412可包括諸如氧化鉿(HfO2)之高介電常數介電層。或者，閘極介電層412可包括其他高介電常數介電材料，諸如二氧化鈦(TiO2)、氧化鋯鉿(HfZrO)、三氧化二鉭(Ta2O3)、矽酸鉿(HfSiO4)、二氧化鋯(ZrO2)、矽酸鋯(ZrSiO2)、氧化鑭(LaO)、氧化鋁(AlO)、氧化鋯(ZrO)、氧化鈦(TiO)、五氧化二鉭(Ta2O5)、氧化釔(Y2O3)、鈦酸鍶(SrTiO3；STO)、鈦酸鋇(BaTiO3；BTO)、氧化鋇鋯(BaZrO)、氧化鋯鉿(HfZrO)、氧化鉿鑭(HfLaO)、氧化鉿矽(HfSiO)、氧化鑭矽(LaSiO)、氧化矽鋁(AlSiO)、氧化鉿鉭(HfTaO)、氧化鉿鈦(HfTiO)、鈦酸鍶鋇((Ba,Sr)TiO3；BST)、氧化鋁(Al2O3)、氮化矽(Si3N4)、氮氧化物(SiON)、其組合、或其他適宜材料。高介電常數閘極介電層412可藉由原子層沉積、物理氣相沉積、化學氣相沉積、氧化、及/或其他適宜方法來形成。
閘極金屬層414可包括單一層或者多層結構，諸如具有經選擇功函數以增強元件效能的金屬層(功函數金屬層)、襯層、潤濕層、黏合層、金屬合金或金屬矽化物之各種組合。舉例而言，閘極金屬層414可包括鈦(Ti)、金(Ag)、鋁(Al)、氮化鈦鋁(TiAlN)、碳化鉭(TaC)、氮碳化鉭(TaCN)、氮矽化鉭(TaSiN)、氮化鈦(TiN)、氮化鉭(TaN)、錳(Mn)、鋯(Zr)、釕(Ru)、鉬(Mo)、鋁(Al)、氮化鎢(WN)、銅(Cu)、鎢(W)、錸(Re)、銥(Ir)、鈷(Co)、鎳(Ni)、其他適宜金屬材料或其組合。在各實施例中，閘極金屬層414可由原子層沉積、 物理氣相沉積、化學氣相沉積、電子束蒸鍍、或其他適宜製程形成。此外，可分別針對可使用不同金屬層之N-場效電晶體及P-場效電晶體形成閘極金屬層414。在各實施例中，可進行化學機械研磨製程以從閘極金屬層414移除過量金屬，以此提供閘極金屬層414之大體上平坦頂面。
參看第1、5A、及5B圖，在形成閘極堆疊410之後，方法100藉由在閘極金屬層414上形成經圖案化之硬遮罩510而進行至步驟108。經圖案化之硬遮罩510具有界定待後續形成之線切割的開口515。在開口515內曝露部分高介電常數/金屬閘極線410L(高介電常數/金屬閘極堆疊)。在一些實施例中，開口515具有沿線A-A之方向的較大寬度，以使得相鄰側壁間隔245及層間介電層260在開口515中曝露以獲得優點，諸如放寬微影製程解析度限制，尤其是當半導體元件200按比例縮小時，使得在兩個相鄰鰭特徵230之間的空間變得越來越小。
在一些實施例中，經圖案化之硬遮罩510可包括經圖案化之光阻層並藉由微影製程形成。示例性微影製程可包括形成光阻層、藉由微影曝光製程曝光此光阻層、進行後曝光烘烤製程、及顯像此光阻層以形成經圖案化之光阻層。或者，可藉由沉積硬遮罩層、在硬遮罩層上藉由微影製程形成經圖案化之光阻層，再藉由經圖案化光阻層蝕刻此硬遮罩材料層來形成經圖案化之硬遮罩510。
參看第1、6A、及6B圖，方法100藉由通過開口515移除經曝露之閘極堆疊410以形成線切割610來進行至步驟110。在本實施例中，線切割610延伸至隔離特徵220並將高 介電常數/金屬閘極線410L分為兩個子高介電常數/金屬閘極線410LA及410LB。子高介電常數/金屬閘極線410LA沿著線B-B方向藉由具有寬度d之線切割610與子高介電常數/金屬閘極線410LB分離。
蝕刻製程可包括濕式蝕刻、乾式蝕刻、及/或其組合。例如，乾式蝕刻製程可實施含氟氣體(例如，四氟化碳(CF4)、六氟化硫(SF6)、二氟甲烷(CH2F2)、三氟甲烷(CHF3)及/或六氟乙烷(C2F6))、含氯氣體(例如，氯(Cl2)、三氯甲烷(CHCl3)、四氯化碳(CCl4)及/或三氯化硼(BCl3))、含溴氣體(例如，溴酸(HBr)及/或三溴甲烷(CHBr3))、含碘氣體、其他適宜氣體及/或電漿、及/或上述氣體之組合。在一些實施例中，執行選擇蝕刻製程以選擇性蝕刻閘極堆疊410，而實質上並不蝕刻側壁間隔245及層間介電層260。如圖所示，針對其中部分側壁間隔245及層間介電層260曝露在開口515中(如在第5A及5B圖中所示)之情況，經曝露部分之側壁間隔245及層間介電層260一起充當子蝕刻遮罩。因此，可放寬製程限制之自動對準性質形成線切割610。
在形成線切割610之後，如在第6C及6D圖中顯示，藉由蝕刻製程移除經圖案化之硬遮罩510。在其中經圖案化之硬遮罩510係光阻圖案之一實例中，藉由濕式剝離及/或電漿灰化移除經圖案化之硬遮罩510。
參看第1、7A及7B圖，方法100藉由使用介電層710填充線切割610以在兩子高介電常數/金屬閘極線410LA及410LB之間形成隔離區域715而進行至步驟112。可藉由化 學氣相沉積、原子層沉積、旋塗式塗覆法、或其他適宜技術沉積介電層710。介電層710可包括氧化矽、氮化矽、氮氧化物、具有低於熱氧化矽介電常數(k)之介電材料(由此稱為低介電常數介電材料層)，及/或其他適宜介電材料層。可進行化學機械研磨來回磨平介電層710，以此提供閘極堆疊410與介電層710具有實質上平坦頂面。由此，將高介電常數/金屬閘極線410L切割為子高介電常數/金屬閘極線410LA及410LB，並且高介電常數/金屬閘極線410L藉由隔離區域715分離。
在方法100之前、期間、或之後可提供額外步驟，且可圍繞方法100之額外實施例取代、消除、或移動所描述之一些步驟。其他替代或實施例可不脫離本案之精神及範圍存在。
第8圖係包括製造半導體元件2000之半導體製造之方法1000。步驟1002、1003、1004、1005至步驟1006分別與上文在方法100之步驟102至106中論述之彼等內容相似。因此，上文關於步驟102至106之論述分別適用於步驟1002至1006。本案可在各實例中重複元件符號及/或字母。此重複係出於簡明性及清晰之目的，以使得除非另作聲明，否則重複之元件符號及/或字母指明在各實施例間之相似特徵。
參看第8、9A、及9B圖，方法1000藉由開槽閘極堆疊410以在閘極溝槽310中形成子溝槽1210來進行至步驟1008。後文將開槽後之閘極堆疊410稱為高介電常數/金屬閘極堆疊410’。蝕刻製程可包括濕式蝕刻、乾式蝕刻、及/或其組合。例如，乾式蝕刻製程可實施含氟氣體(例如，四氟化碳 (CF4)、六氟化硫(SF6)、二氟甲烷(CH2F2)、三氟甲烷(CHF3)及/或六氟乙烷(C2F6))、含氯氣體(例如，氯(Cl2)、三氯甲烷(CHCl3)、四氯化碳(CCl4)及/或三氯化硼(BCl3))、含溴氣體(例如，溴酸(HBr)及/或三溴甲烷(CHBr3))、含碘氣體、其他適宜氣體及/或電漿、及/或上述氣體之組合。在一些實施例中，執行選擇蝕刻製程以選擇性蝕刻閘極堆疊410而實質上並不上蝕刻側壁間隔245及層間介電層260。
參看第8、10A、及10B圖，方法1000藉由在子溝槽1210中，包括在高介電常數/金屬閘極線410L上之高介電常數/金屬閘極堆疊410’上形成硬遮罩1220而進行至步驟1010。在一些實施例中，硬遮罩1220在隨後源極/汲極接觸蝕刻製程中，藉由在移除層間介電層260期間保護高介電常數/金屬閘極堆疊410’提供針對高介電常數/金屬閘極堆疊410’之保護。硬遮罩1220可包括氮化矽、碳化矽、氮氧化矽、及/或其他適宜材料。在本實施例中，硬遮罩1220包括不同於側壁間隔245及層間介電層260之材料以在隨後蝕刻製程期間達成蝕刻選擇性。在實施例中，硬遮罩1220包括氮化矽而側壁間隔245及層間介電層260包括氧化矽。可藉由化學氣相、原子層沉積、及/或其他適當技術沉積硬遮罩1220。可進行化學機械研磨來回磨平硬遮罩1220及以此提供關於層間介電層260及側壁間隔245之硬遮罩1220的大體上平坦頂面。
參看第8、11A、及11B圖，在高介電常數/金屬閘極堆疊410’上形成硬遮罩1220之後，方法1000藉由在硬遮罩1220上形成經圖案化之硬遮罩1230而進行至步驟1012。經 圖案化之硬遮罩1230具有界定待後續形成之線切割的開口1235。開口1235對準高介電常數/金屬閘極線410L之指定部分(例如，在兩個鰭特徵230之間)，此部分隨後可移除。在一些實施例中，開口1235沿線A-A之方向具有較大寬度，以使得相鄰側壁間隔245及部分層間介電層260在開口1235中曝露以獲得優點，諸如放寬微影製程解析限制，尤其是當半導體元件2000按比例縮小時，兩個相鄰鰭特徵230之間的空間變得越來越小。在眾多方面中，經圖案化之硬遮罩1230與上文結合第5A及5B圖論述之經圖案化硬遮罩510的方法相似，包括其中論述之材料。
參看第8、12A、及12B圖，方法1000藉由通過開口1235移除硬遮罩1220以曝露部分高介電常數/金屬閘極堆疊410’來進行至步驟1014。此蝕刻製程可包括濕式蝕刻、乾式蝕刻、及/或上述蝕刻之組合。在一些實施例中，執行選擇此蝕刻製程以選擇性蝕刻硬遮罩1220而實質上並不蝕刻側壁間隔245及層間介電層260。如圖所示，針對其中側壁間隔245及部分層間介電層260在開口1235中曝露之情況(如在第11A圖中所示)，經曝露之側壁間隔245與部分層間介電層260一起充當子蝕刻遮罩。因此，使用放寬製程限制的自動對準性質移除硬遮罩1220。
參看第8、13A、及13B圖，方法1000藉由通過開口1235移除經曝露之高介電常數/金屬閘極堆疊410’以形成線切割1240來進行至步驟1016。在本實施例中，線切割1240延伸至隔離特徵220並將高介電常數/金屬閘極線410L分為兩 子高介電常數/金屬閘極線410LA及410LB。子高介電常數/金屬閘極線410LA藉由沿第2A圖之線B-B方向寬度d之線切割1240與子高介電常數/金屬閘極線410LB分離開。此蝕刻製程係在眾多方面與上文結合第6A及6B圖論述之蝕刻製程相似。在形成線切割1240之後，如在第13C及13D圖中所示，藉由蝕刻製程移除經圖案化之硬遮罩1230。在其中經圖案化之硬遮罩1230係光阻圖案之一實例中，藉由濕剝離及/或電漿灰化移除經圖案化之硬遮罩1230。
參看第8、14A、及14B圖，方法1000藉由使用介電層1250填充線切割1240以在兩子高介電常數/金屬閘極線410LA及410LB間形成隔離區域1255來進行至步驟1018。在眾多方面中，形成介電層1250之方法與上文結合第7A及7B圖論述之介電層710相似，包括其中論述之材料。可進行化學機械研磨以回磨平介電層1250並以此提供硬遮罩1220頂面之介電層1250實質上平坦頂面。由此，將高介電常數/金屬閘極線410L切割為子高介電常數/金屬閘極線410LA及410LB，並且高介電常數/金屬閘極線410L藉由隔離區域1255分離。
在方法1000之前、期間、或之後可提供額外步驟，且可圍繞方法1000之額外實施例取代、消除、或移動所描述之一些步驟。其他替代或實施例可不脫離本案之精神及範圍存在。
第15圖係包括製造半導體元件4000之半導體製造之方法3000。步驟3002、3003、3004、3005至步驟3006係分別與上文在方法100之步驟102至106中論述之彼等內容 相似。步驟3008及步驟3010係分別與上文在方法1000之步驟1008及1010中論述之彼等內容相似。因此，上文有關步驟102至106之論述分別適用於步驟1002至1006。相似地，上文有關步驟1008及1010之論述分別適用於步驟3008及3010。本案可在各實施例中重複元件符號及/或字母。此重複係出於簡明性及清晰之目的，以使得除非另作聲明，否則重複之元件符號及/或字母指明在各實施例間之相似特徵。
參看第15、16A及16B圖，在子溝槽1210中形成硬遮罩1220之後，方法3000藉由開槽硬遮罩1220以形成第一溝槽3210而進行至步驟3012。經開槽之硬遮罩1220係稱為硬遮罩1220’。開槽硬遮罩1220之蝕刻製程可包括濕式蝕刻、乾式蝕刻、及/或上述蝕刻之組合。在一些實施例中，選擇此蝕刻製程以選擇性蝕刻第一硬遮罩1220而不大體上蝕刻側壁間隔245及層間介電層260。因此，使用放寬製程限制之自動對準性質形成第一溝槽3210。
參看第15、17A及17B圖，方法3000藉由開槽側壁間隔245以更寬地擴展(或加大)第一溝槽3210，下述稱為第二溝槽3210’而進行至步驟3014。此蝕刻製程可包括濕式蝕刻、乾式蝕刻、及/或上述蝕刻之組合。在一些實施例中，選擇此蝕刻製程以選擇性蝕刻側壁間隔245而不大體上蝕刻層間介電層260及硬遮罩1220。因此，使用放寬製程限制的自動對準性質形成經擴展之第二溝槽3210’。經開槽之側壁間隔245稱為側壁間隔245’。在一些實施例中，控制蝕刻製程使得經 開槽之側壁間隔245’之頂面係大體上與硬遮罩1220’之頂面共面。
參看第15、18A及18B圖，方法3000藉由在第二溝槽3210’中形成第二硬遮罩3230而進行至步驟3016。在一些實施例中，第二硬遮罩3230覆蓋硬遮罩1220’並延伸以覆蓋側壁間隔245’以在隨後蝕刻製程中增強對高介電常數/金屬閘極堆疊410’之保護，諸如藉由在隨後源極/汲極接觸蝕刻製程中移除層間介電層260期間保護經開槽之高介電常數/金屬閘極堆疊410’，並改良對隨後源極/汲極接觸微影製程之容差。
在眾多方面中，與上文結合第10A及10B圖論述之硬遮罩1220相似地形成第二硬遮罩3230，包括其中論述之材料。在本實施例中，第二硬遮罩3230包括不同於層間介電層260之材料以在隨後蝕刻製程期間達成蝕刻選擇性。或者，進行化學機械研磨來磨平過量第二硬遮罩3230。
參看第15、19A及19B圖，方法3000藉由在第二硬遮罩3230上形成第一經圖案化之硬遮罩3240而進行至步驟3018。第一經圖案化之硬遮罩3240具有界定待後續形成之源極/汲極觸點的開口3245。開口3245對準在指定源極/汲極特徵250上之層間介電層260。在一些實施例中，開口3245具有沿線A-A方向之較大寬度，以使得相鄰第二硬遮罩3230在開口3245中曝露以獲得優點，諸如放寬微影製程解析限制，特定言之當半導體元件4000按比例縮小時，以使得在兩個相鄰鰭特徵230之間的空間變得越來越小。在眾多方面中，形成第一 經圖案化之硬遮罩3240之方法與上文結合第5A及5B圖論述之經圖案化之硬遮罩510相似，包括其中論述之材料。
參看第15、20A、20B及20C圖，方法3000藉由通過開口3245移除層間介電層260來形成源極/汲極接觸溝槽3250而進行至步驟3020。由此，在源極/汲極接觸溝槽3250中曝露指定之源極/汲極特徵250。如先前提及，執行選擇此溝槽蝕刻製程來選擇性移除層間介電層260而實質上不蝕刻第二硬遮罩3230。如圖所示，針對其中部分第二硬遮罩3230在開口3245中曝露之情況(如在第19A及19B圖中所示)，第二硬遮罩3230充當子蝕刻遮罩。因此，使用放寬製程限制之自動對準性質形成源極/汲極接觸溝槽3250。溝槽蝕刻可包括選擇性濕式蝕刻、選擇性乾式蝕刻、及/或上述蝕刻之組合。例如，溝槽蝕刻包括使用氟基化學，諸如四氟化碳(CF4)、六氟化硫(SF6)、二氟甲烷(CH2F2)、三氟甲烷(CHF3)及/或六氟乙烷(C2F6)的電漿乾式蝕刻製程。
在形成源極/汲極接觸溝槽3250之後，如在第20D圖中所示，藉由蝕刻製程移除第一經圖案化之硬遮罩3240。在其中第一經圖案化硬遮罩3240係光阻圖案之一實例中，藉由濕汽提及/或電漿灰化移除第一經圖案化之硬遮罩3240。
參看第15、21A及21B圖，方法3000藉由在源極/汲極接觸溝槽3250中沉積導電層以形成源極/汲極接觸金屬3310而進行至步驟3022。如圖所示，源極/汲極接觸金屬3310在源極/汲極接觸溝槽3250中延伸至源極/汲極特徵250。源極/汲極接觸金屬3310可包括銅(Cu)、鋁(Al)、鎢(W)、銅、鎂銅 (CuMn)、鋁銅(CuAl)或矽銅(CuSi)、及/或其他適宜導電材料。可藉由物理氣相沉積、化學氣相沉積、金屬有機化學氣相沉積(metal-organic chemical vapor deposition；MOCVD)、或電鍍形成源極/汲極接觸金屬3310。在一些實施例中，進行化學機械研磨製程以從第二硬遮罩3230移除過量源極/汲極接觸金屬3310，以此提供與第二硬遮罩3230之頂面大體上共面的頂面。
參看第15、22A及22B圖，在形成源極/汲極接觸金屬3310之後，方法3000藉由在第二硬遮罩3230及源極/汲極接觸金屬3310上形成第二經圖案化之硬遮罩3410而進行至步驟3024。此第二經圖案化之硬遮罩3410具有界定待後續形成之線切割的開口3415。開口3415對準高介電常數/金屬閘極線410L之指定部分(例如，在兩個鰭特徵230間)，隨後將其移除。在一些實施例中，開口3415具有沿線A-A方向之較大寬度，以使得相鄰開槽之側壁間隔245’及部分源極/汲極接觸金屬3310在開口3415中以獲得優點，諸如放寬微影製程解析限制，尤其是當半導體元件4000按比例縮小時，以使得在兩個相鄰鰭特徵230之間的空間變得越來越小。在眾多方面中，形成第二經圖案化之硬遮罩3410之方法與上文結合第5A及5B圖論述之經圖案化硬遮罩510相似，包括其中論述之材料。
參看第15、23A及23B圖，方法3000藉由通過開口3415移除第二硬遮罩3230、硬遮罩1220’及側壁間隔245’以曝露高介電常數/金屬閘極堆疊410’之指定部分來進行至步驟3026。此蝕刻製程可包括濕式蝕刻、乾式蝕刻、 及/或上述蝕刻之組合。在一些實施例中，選擇此蝕刻製程以選擇性蝕刻第二硬遮罩3230及側壁間隔245’而實質上不蝕刻高介電常數/金屬閘極堆疊410’及源極/汲極接觸金屬3310。如圖所示，針對其中部分源極/汲極接觸金屬3310在開口3415中曝露之情況(如在第22A及22B圖中所示)，源極/汲極接觸金屬3310充當子蝕刻遮罩。
參看第15、24A及24B圖，方法3000藉由通過開口3415移除經曝露之高介電常數/金屬閘極堆疊410’以形成線切割3420而進行至步驟3028。在本實施例中，線切割3420延伸至隔離特徵220並將高介電常數/金屬閘極線410L分為兩子高介電常數/金屬閘極線410LA及410LB。子高介電常數/金屬閘極線410LA沿著第2A圖之線B-B方向與子高介電常數/金屬閘極線410LB分離，且其距離具有寬度d。在眾多方面中，此蝕刻製程係與上文結合第6A及6B圖論述之蝕刻製程相似。在形成線切割3420之後，如在第24C及24D圖中所示，藉由蝕刻製程移除第二經圖案化之硬遮罩3410。
參看第15、25A及25B圖，方法3000藉由使用介電層3510填充線切割3420以在兩子高介電常數/金屬閘極線410LA及410LB之間形成隔離區域3515而進行至步驟3030。在眾多方面中，與上文結合第7A及7B圖論述之介電層710相似地形成介電層3510，包括其中論述之材料。可進行化學機械研磨來回磨平介電層3510並以此提供關於第二硬遮罩3230之頂面之介電層3510的大體上平坦頂面。由此，將高介電常數/金屬閘極線410L切割為子高介電常數/金屬閘極線410LA 及410LB，並且高介電常數/金屬閘極線410L由隔離區域3515分離。
在方法3000之前、期間、或之後可提供額外步驟，且可圍繞方法3000之額外實施例取代、消除、或移動所描述之一些步驟。其他替代或實施例可不脫離本案之精神及範圍存在。
半導體元件200、2000及4000可經進一步互補式金屬氧化物半導體或金屬氧化物半導體技術處理以形成在此項技術中已知的各特徵及區域。例如，後續處理可在基板210上形成各觸點/通道/接線及多層互連特徵(例如，金屬層及層間介電)，此等特徵經配置以連接鰭式場效電晶體半導體元件200之各特徵或結構。例如，多層互連包括垂直互連，諸如常規通道或觸點，及水準互連，諸如金屬線。各互連特徵可實施包括銅、鎢、及/或矽化物的各導電材料。在一實例中，鑲嵌及/或雙重鑲嵌製程係用於形成銅相關多層互連結構。
基於上文，可瞭解本案提供在高介電常數/金屬閘極取代虛設閘極堆疊之後切割金屬閘極線之方法。此方法提供切割金屬閘極線的各製程方案，諸如在高介電常數/金屬閘極取代虛設閘極堆疊之後切割金屬閘極線或在形成源極/汲極接觸金屬之後切割金屬閘極線。此方法闡明用於切割金屬閘極線的可行且撓性製程。
本案提供製造半導體元件之眾多不同實施例，此半導體元件提供在現存途徑基礎上之一或多個改良。本揭露之一實施例為一種用於製造半導體元件之方法包括在基板上形 成第一鰭及第二鰭。第一鰭具有第一閘極區域而第二鰭具有第二閘極區域。此方法亦包括在第一及第二閘極區域上形成金屬閘極線。此金屬閘極線從第一鰭延伸至第二鰭。此方法亦包括施加線切割以將金屬閘極線分為第一子金屬閘極線與第二子金屬閘極線，並且在線切割中形成隔離區域。
依據本揭露之部分實施例，其中施加線切割以將金屬閘極線分為第一子金屬閘極線與第二子金屬閘極線包括形成第一經圖案化之硬遮罩於金屬閘極線上方，其中第一經圖案化之硬遮罩界定一開口。經由開口蝕刻金屬閘極線。
依據本揭露之部分實施例，其中在線切割中形成隔離區域包括形成介電層於線切割中，以及開槽介電層。
依據本揭露之部分實施例，此方法更包含先形成金屬閘極線於第一閘極區域及第二閘極區域上方，並形成虛設閘極堆疊於第一閘極區域及第二閘極區域上方。形成層間介電層於基板以及虛設閘極堆疊上方。
依據本揭露之部分實施例，其中形成金屬閘極線於第一閘極區域及第二閘極區域上方包含移除虛設閘極堆疊以曝露第一閘極區域及第二閘極區域之一部分。沉積閘極介電層於第一閘極區域及第二閘極區域之曝露的部分上方。沉積金屬線於第一閘極區域及第二閘極區域內之閘極介電層上方。
依據本揭露之部分實施例，其中形成金屬閘極線於第一閘極區域及第二閘極區域上方包括移除虛設閘極堆疊以曝露第一閘極區域及第二閘極區域之一部分。沉積閘極介電層於第一閘極區域及第二閘極區域之曝露的部分上方。沉積金 屬閘極線於第一閘極區域及第二閘極區域內之閘極介電層上方。開槽第一閘極區域及第二閘極區域內之閘極金屬層之一部分。以及形成硬遮罩於經開槽之第一閘極區域及第二閘極區域內之閘極金屬層之部分上方。
依據本揭露之部分實施例，其中施加線切割以將金屬閘極線分為第一子金屬閘極線與第二子金屬閘極線包括形成經圖案化之硬遮罩於硬遮罩上方，其中經圖案化之硬遮罩具有開口，使得金屬閘極線之一部分對齊開口。經由開口蝕刻硬遮罩。經由開口蝕刻金屬閘極線。
依據本揭露之部分實施例，其中形成金屬線於第一閘極區域及第二閘極區域內之閘極介電層上方包括形成金屬閘極線於側壁間隔之間。其中側壁間隔及介電層之一部分自開口中曝露。其中經由開口蝕刻金屬閘極線包含將曝露之側壁間隔及介電層之一部分作為蝕刻遮罩。
本揭露之另一實施例為一種用於製造半導體元件之方法包括在基板上形成複數個金屬閘極堆疊，以使得此複數個閘極堆疊彼此連接以形成金屬閘極線。此複數個金屬閘極堆疊具有沿著金屬閘極堆疊側壁配置之側壁間隔。此方法亦包括在鄰近金屬閘極堆疊之基板中形成源極/汲極特徵、在金屬閘極堆疊及源極/汲極特徵上形成介電層、開槽複數個金屬閘極堆疊及側壁間隔、在經開槽之複數個金屬閘極堆疊及經開槽之側壁間隔上形成硬遮罩、移除部分介電層以曝露源極/汲極特徵，同時此硬遮罩保護開槽之金屬閘極堆疊及經開槽之側壁間隔。此方法亦包括在經曝露之源極/汲極特徵上形成接觸金屬 層、形成線切割以將金屬閘極線切割為子金屬閘極線，並在線切割中形成隔離區域。
依據本揭露之部分實施例，其中在基板上形成複數個金屬閘極堆疊，以使得此複數個閘極堆疊彼此連接以形成金屬閘極線包括形成延伸自基板外的複數個鰭，各鰭具有源極/汲極區域及閘極區域。形成虛設閘極堆疊於各閘極區域中。移除虛設閘極堆疊以曝露各鰭之部分。形成複數個金屬閘極堆疊於曝露之鰭之部分上方。
依據本揭露之部分實施例，其中開槽複數個金屬閘極堆疊及側壁間隔包括開槽複數個閘極堆疊而實質上不蝕刻側壁間隔。形成另一硬遮罩於經開槽之閘極堆疊上方。開槽側壁間隔而實質上不蝕刻另一硬遮罩，其中經開槽之側壁間隔之上表面與硬遮罩之上表面實質上共平面。
依據本揭露之部分實施例，其中在經開槽之複數個金屬閘極堆疊及經開槽之側壁間隔上形成硬遮罩包括形成硬遮罩於另一硬遮罩上方，並開槽側壁間隔。
依據本揭露之部分實施例，其中形成線切割以將金屬閘極線切割為子金屬閘極線包括形成經圖案化之硬遮罩於金屬閘極線上方，其中經圖案化之硬遮罩具有開口。經由開口蝕刻金屬閘極線。
依據本揭露之部分實施例，其中經開槽之側壁間隔及接觸金屬層之一部分曝露於開口中。其中經由開口蝕刻金屬閘極線包括將側壁間隔及接觸金屬層之部分作為蝕刻遮罩。
依據本揭露之部分實施例，其中在線切割中形成隔離區域包括以介電層填補於線切割內。開槽介電層。
本揭露之又一實施例為一種切割金屬閘極之方法包括在基板上形成複數個鰭，此等鰭中之各者具有閘極區域，在各閘極區域中形成虛設閘極堆疊，沿各虛設閘極堆疊之側壁形成側壁間隔，在包括除虛設閘極堆疊以外之基板上形成層間介電層。此方法亦包括移除虛設閘極堆疊以在此閘極區域中曝露部分鰭，在經曝露之部分鰭上形成金屬閘極堆疊，其中此金屬閘極堆疊形成金屬閘極線，開槽金屬閘極堆疊，在經開槽之金屬閘極堆疊上形成硬遮罩，形成線切割以將金屬閘極線切割為子金屬閘極線，同時此硬遮罩保護金屬閘極堆疊並在線切割中形成隔離區域。
依據本揭露之部分實施例，其中開槽金屬閘極堆疊包括開槽金屬閘極堆疊而實質上不蝕刻側壁間隔及層間介電層。
依據本揭露之部分實施例，其中在經開槽之金屬閘極堆疊上形成硬遮罩包括形成硬遮罩於另一硬遮罩上方。
依據本揭露之部分實施例，其中形成線切割以將金屬閘極線切割為子金屬閘極線包括形成經圖案化之硬遮罩於金屬閘極線上方，其中經圖案化之硬遮罩具有開口。經由開口蝕刻硬遮罩。以及經由開口蝕刻金屬閘極線。
依據本揭露之部分實施例，其中在線切割中形成隔離區域包括以介電層填補於線切割內。開槽介電層。
上文概述若干實施例之特徵，使得熟習此項技術者可更好地理解本揭露之態樣。熟習此項技術者應瞭解，可輕易使用本揭露作為設計或修改其他製程及結構的基礎，以便實施本文所介紹之實施例的相同目的及/或達成相同優點。熟習此項技術者亦應認識到，此類等效結構並未脫離本揭露之精神及範疇，且可在不脫離本揭露之精神及範疇的情況下進行本文的各種變化、替代及更改。
205:工件
210:基板
230:鰭特徵
242:閘極區域
245:側壁間隔
250:源極/汲極特徵
252:源極/汲極區域
260:層間介電層
410:閘極堆疊
412:閘極介電層
414:閘極金屬層
610:線切割
710:介電層
715:隔離區域

Claims (10)

  1. 一種切割金屬閘極之方法，包含：在一基板上形成一第一鰭及一第二鰭，該第一鰭具有一第一閘極區域及該第二鰭具有一第二閘極區域；在該第一與該第二閘極區域上形成一金屬閘極線，其中該金屬閘極線從該第一鰭延伸至該第二鰭；施加一線切割以將該金屬閘極線分為一第一子金屬閘極線與一第二子金屬閘極線；以及在該線切割中形成一隔離區域。
  2. 如請求項1所述的方法，其中施加該線切割以將該金屬閘極線分為該第一子金屬閘極線與該第二子金屬閘極線包含：形成一圖案化硬遮罩於該金屬閘極線上方，其中該圖案化硬遮罩定義一開口；以及經由該開口蝕刻該金屬閘極線。
  3. 如請求項1所述的方法，還包含：在該第一與該第二閘極區域上形成該金屬閘極線之前，在該第一與該第二閘極區域上形成一虛設閘極；以及在該基板上及該虛設閘極上形成一層間介電層。
  4. 如請求項3所述的方法，其中在該第一與該第二閘極區域上形成該金屬閘極線包括： 移除該虛設閘極以曝露該第一與該第二閘極區域的一部分；沉積一閘極介電質層於該第一與該第二閘極區域的該曝露部分的上方；沉積一金屬層於該第一與該第二閘極區域內的該閘極介電質層上方；開槽該第一與該第二閘極區域內的該金屬層的一部分；以及形成一硬遮罩於該第一與該第二閘極區域內的被開槽的該金屬層。
  5. 一種切割金屬閘極之方法，包含：在一基板上形成複數個金屬閘極堆疊，使得該些金屬閘極堆疊彼此連接以形成一金屬閘極線，其中該些金屬閘極堆疊具有配置於該些金屬閘極堆疊的側壁上的複數個側壁間隔；在鄰近該些金屬閘極堆疊之該基板中形成複數個源/汲極特徵；在該些金屬閘極堆疊和該些源/汲極特徵上形成一層間介電層；開槽該些金屬閘極堆疊和該些側壁間隔；形成一硬遮罩於被開槽的該些金屬閘極堆疊和被開槽的該些側壁間隔上； 移除該層間介電層的一部分以曝露該些源/汲極特徵，而該硬遮罩保護被開槽的該些金屬閘極堆疊和被開槽的該些側壁間隔；在曝露的該些源/汲極特徵上形成一接觸金屬層；形成一線切割以切割該金屬閘極線為複數個子金屬閘極線；形成一隔離區域於該線切割內。
  6. 如請求項5所述的方法，其中開槽該些金屬閘極堆疊和該些側壁間隔包含：開槽該些金屬閘極堆疊且實質上未蝕刻該些側壁間隔；形成另一硬遮罩於被開槽的該些金屬閘極堆疊上；以及開槽該些側壁間隔且實質上未蝕刻該另一硬遮罩，其中被開槽的該些側壁間隔的一頂表面與該硬遮罩的頂表面實質上共平面。
  7. 如請求項6所述的方法，其中形成該硬遮罩於被開槽的該些金屬閘極堆疊和被開槽的該些側壁間隔上包含形成該硬遮罩於該另一硬遮罩和被開槽的該些側壁間隔上。
  8. 一種切割金屬閘極之方法，包含：於一基板上形成複數個鰭，每一鰭包含一閘極區域；在每一閘極區域內形成一虛設閘極堆疊； 形成複數個側壁間隔於每一個該虛設閘極堆疊的側壁上；形成一層間介電層於該基板上，以及鄰近該些虛設閘極堆疊；移除該些虛設閘極堆疊以曝露該些閘極區域內的該些鰭的部分；形成複數個金屬閘極堆疊於該些閘極區域內的該些鰭的該些曝露部分上方，其中該些金屬閘極堆疊形成一金屬閘極線；開槽該些金屬閘極堆疊；形成一硬遮罩於被開槽的該些金屬閘極堆疊上方；形成一線切割以切割該金屬閘極線為複數個子金屬閘極線，其中該硬遮罩保護該些金屬閘極堆疊；以及形成一隔離區域於該線切割內。
  9. 如請求項8所述的方法，其中開槽該些金屬閘極堆疊包含開槽該些金屬閘極堆疊且實質上未蝕刻該些側壁間隔和該層間介電層。
  10. 如請求項8所述的方法，其中形成該線切割以切割該金屬閘極線為複數個子金屬閘極線包含：形成一圖案化硬遮罩於該金屬閘極線上方，其中該圖案化硬遮罩具有一開口；經由該開口蝕刻該硬遮罩；以及經由該開口蝕刻該金屬閘極線。
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