TWI672748B - 半導體裝置及半導體裝置的製造方法 - Google Patents
半導體裝置及半導體裝置的製造方法 Download PDFInfo
- Publication number
- TWI672748B TWI672748B TW106145499A TW106145499A TWI672748B TW I672748 B TWI672748 B TW I672748B TW 106145499 A TW106145499 A TW 106145499A TW 106145499 A TW106145499 A TW 106145499A TW I672748 B TWI672748 B TW I672748B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor wafer
- conductive paste
- electrode plate
- bonding layer
- recessed portion
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 147
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 26
- 230000002093 peripheral effect Effects 0.000 claims abstract description 49
- 238000000034 method Methods 0.000 claims abstract description 13
- 239000002923 metal particle Substances 0.000 claims abstract description 12
- 238000010438 heat treatment Methods 0.000 claims abstract description 5
- 239000002184 metal Substances 0.000 claims description 3
- 238000003825 pressing Methods 0.000 abstract description 4
- 230000008646 thermal stress Effects 0.000 description 13
- 238000005336 cracking Methods 0.000 description 4
- 230000005489 elastic deformation Effects 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
- H01L23/4828—Conductive organic material or pastes, e.g. conductive adhesives, inks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4871—Bases, plates or heatsinks
- H01L21/4875—Connection or disconnection of other leads to or from bases or plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29005—Structure
- H01L2224/29007—Layer connector smaller than the underlying bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
- H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
- H01L2224/32058—Shape in side view being non uniform along the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
- H01L2224/32059—Shape in side view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32111—Disposition the layer connector being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/75301—Bonding head
- H01L2224/75302—Shape
- H01L2224/7531—Shape of other parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75703—Mechanical holding means
- H01L2224/75705—Mechanical holding means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75754—Guiding structures
- H01L2224/75756—Guiding structures in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83024—Applying flux to the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3512—Cracking
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Die Bonding (AREA)
- Wire Bonding (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
半導體裝置的製造方法包括:將含有金屬微粒之導電膏施加至包括該電極板的表面中之凹部的電極板中之指定區域,該指定區域係鄰接該凹部。半導體裝置的製造方法包括將半導體晶片放置在該導電膏上,以致該半導體晶片之外周邊緣係位於該凹部上方。半導體裝置的製造方法包括藉由加熱該導電膏來硬化該導電膏,同時在朝該電極板之方向中將壓力施加至該半導體晶片。
Description
[0001] 藉由本說明書所揭示的技術有關半導體裝置及半導體裝置之製造方法。
[0002] 日本專利申請案公告第2016-115865號揭示用於將半導體晶片及電極板接合在一起的技術。於此技術中,含有金屬微粒之導電膏被施加至電極板的表面,且半導體晶片被放置在此導電膏上。此後,該導電膏係藉由加熱該導電膏、同時於朝該電極板之方向中將壓力施加至該半導體晶片所硬化。如此,該半導體晶片及該電極板藉由接合層被接合在一起,該接合層係當導電膏硬化時產生。
[0003] 為藉由導電膏將半導體晶片及電極板接合在一起,其係需要加熱該導電膏,同時將壓力施加至該半導體晶片及該電極板間之導電膏。當該導電膏被加熱及硬化時,該接合層被接合至該半導體晶片及該電極板。此後,當該半導體晶片、該接合層、及該電極板係返回至室溫時,這些零組件因該溫度減少而收縮。在此製程期間,由於該半導體晶片及該接合層間之線性膨脹係數的差異,高熱應力作用在該半導體晶片上。尤其是,高熱應力作用在該半導體晶片之外周邊緣的附近上。此作用於該半導體晶片上之熱應力影響該半導體晶片的可靠性。本發明提供一減少作用在半導體晶片之外周邊緣的附近上之熱應力、同時電極板及該半導體晶片係藉導電膏所接合在一起的技術。 [0004] 本發明之第一態樣係半導體裝置的製造方法。半導體裝置之製造方法包括將含有金屬微粒的導電膏施加至電極板中之指定區域,包括於該電極板的表面中之凹部,該指定區域係鄰接該凹部。半導體裝置的製造方法包括將半導體晶片放置在該導電膏上,以致該半導體晶片之外周邊緣係位於該凹部上方。半導體裝置的製造方法包括藉由加熱該導電膏、同時在朝該電極板之方向中將壓力施加至該半導體晶片來硬化該導電膏。 [0005] 當壓力於該硬化步驟中在朝該電極板的方向中被施加至該半導體晶片時,於該半導體晶片及該電極板之間所擠壓的導電膏之一部分朝該凹部流出。已流出的導電膏將與該外周邊緣附近中之半導體晶片的一部分及與該凹部之內表面接觸。當被加熱及硬化時,該導電膏形成金屬微粒被彼此接合的接合層。該指定區域及該半導體晶片間之導電膏在高壓之下硬化。如此,該指定區域及該半導體晶片間之導電膏硬化及形成低孔隙率接合層。該指定區域及該半導體晶片係藉由此低孔隙率接合層牢固地接合在一起。在另一方面,此高壓未被施加至該凹部及該半導體晶片間之導電膏。如此,該凹部及該半導體晶片間之導電膏硬化及形成高孔隙率接合層。該凹部及該半導體晶片係藉由此高孔隙率接合層接合在一起。當該半導體晶片、該接合層、及該電極板係在該導電膏的硬化之後返回至室溫時,熱應力作用於該半導體晶片上。如上述,被接合至該半導體晶片的外周邊緣附近中之接合層的該部分具有高孔隙率。因此,該接合層之此部分係極可能根據該熱應力而變形。如此,在該半導體晶片的外周邊緣附近中發生之熱應力被釋放。如已在上面被敘述,根據此製造方法,在該半導體晶片的外周邊緣附近中發生之熱應力能被減少。 [0006] 於該上面態樣中,該導電膏不能在施加該導電膏的步驟中被施加至該凹部之底部表面,且已由該指定區域流入該凹部的導電膏可於硬化該導電膏之步驟中與該凹部的底部表面接觸。 [0007] 根據此態樣,該接合層鄰接該半導體晶片之外周邊緣的部分之表面採取一相對該半導體晶片的下表面傾斜之形狀,以便移位朝該凹部的底部表面,同時延伸遠離該指定區域。如此,破裂係較不會在該接合層中發生。 [0008] 於該上面態樣中,夾具可被設置在該凹部上方及接近該半導體晶片之外周邊緣的位置。 [0009] 根據此態樣,該導電膏能被防止向上膨脹。 [0010] 本發明之第二態樣有關半導體裝置。該半導體裝置包括電極板,其包括凹部及鄰接該凹部的指定區域,該凹部係在該電極板之表面中。該半導體裝置包括接合層,其係由金屬所組成,且蓋住由該指定區域延伸至該凹部的區域。該半導體裝置包括被設置以便面朝該指定區域及該凹部之半導體晶片,該半導體晶片被接合至在該指定區域及該凹部上方的接合層,且該半導體晶片之外周邊緣係位於該凹部上方。該凹部中的接合層之孔隙率係高於該指定區域中的接合層之孔隙率。 [0011] 根據此態樣,將該半導體晶片的外周邊緣及該電極板之凹部接合在一起的接合層具有高孔隙率,以致作用於該半導體晶片之外周邊緣上的熱應力能被抑制。 [0012] 在該上面態樣中,鄰接該半導體晶片之外周邊緣的接合層之一部分的表面可為相對該半導體晶片之下表面傾斜,以便移位朝該凹部的底部表面,同時延伸遠離該指定區域。 [0013] 根據此態樣,破裂係較不可能於該接合層中發生。 [0014] 在該上面態樣中,該接合層可為導電膏。 [0015] 在該上面態樣中,該凹部可於該電極板之表面中以環狀形狀延伸,以便環繞該半導體晶片,且該指定區域可為藉由該凹部所環繞的區域。
[0017] 如圖1中所顯示,半導體裝置10之實施例具有半導體晶片12、接合層14、及電極板16。該半導體裝置10包括異於該接合層14及該電極板16的布線構件(例如其他電極板及接合導線),但這些未被顯示在圖1中。 [0018] 該電極板16係由金屬所組成之導電板。凹部20被提供於該電極板16的上表面中。該凹部20係以環狀形狀延伸在該電極板16之上表面中的溝槽。該電極板16之上表面被該凹部20分成中心部分22及外周邊部分24。該中心部分22係藉由該凹部20所環繞的部分。該外周邊部分24係比該凹部20更遠地位在外周邊側面上之部分。 [0019] 該半導體晶片12包括半導體基板、及電極、設在該半導體基板的表面上之絕緣層等。雖然這未被顯示,該半導體晶片12的下表面被以電極覆蓋。該半導體晶片12被設置在該電極板16上。該半導體晶片12之外周邊緣12a係位於該凹部20上方。如此,該半導體晶片12被設置在該電極板16上,以致當該半導體晶片12及該電極板16係在平面圖中沿著其堆疊方向觀看時,該整個外周邊緣12a重疊該凹部20。 [0020] 該接合層14被設置於該電極板16及該半導體晶片12之間。該接合層14被接合至該電極板16及該半導體晶片12(更明確地是,構成該半導體晶片12的下表面之電極)。該電極板16及該半導體晶片12係藉由該接合層14彼此電連接。該接合層14被接合至該電極板16的中心部分22及該凹部20之內表面,且不與該外周邊部分24接觸。該接合層14被接合至該半導體晶片12的下表面之整個區域。該接合層14於該半導體晶片12及該電極板16之間被暴露在該凹部20上方。該接合層14的被暴露表面係相對該半導體晶片12之下表面傾斜。該接合層14的被暴露表面移位朝該凹部20之底部表面,同時由該半導體晶片12的外周邊緣12a延伸朝該外周邊部分24(亦即,同時延伸遠離該中心部分22)。圖2及3概要地顯示該接合層14之截面。如圖2及3中所顯示,該接合層14具有一結構,其中金屬微粒60被彼此連接。在該金屬微粒60之中有空隙62。該接合層14具有第一部分14a及第二部分14b。圖2顯示該第一部分14a在預定位置的截面,且圖3顯示該第二部分14b在預定位置之截面。該名詞孔隙率意指每單位體積的空隙62之比率。高孔隙率意指每單位體積的金屬微粒60之低比率(亦即,該金屬微粒60的低密度)。該孔隙率由第一部分14a朝該第二部分14b增加。如此,該第一部分14a之平均孔隙率係低於該第二部分14b的平均孔隙率。該高孔隙率之第二部分14b係比該低孔隙率的第一部分14a更可能遭受彈性變形。如圖1中所顯示,該第一部分14a被設置在該電極板16的中心部分22及該半導體晶片12之間,同時該第二部分14b被設置於該電極板16的凹部20及該半導體晶片12之間。 [0021] 其次,該半導體裝置10的製造方法將被敘述。首先,如圖4中所顯示,導電膏30被施加至該電極板16之上表面的中心部分22。該導電膏30係一含有溶劑及擴散於該溶劑中之金屬微粒的膏體。在此。該導電膏30被施加在該中心部分22的整個區域之上。該導電膏30不被施加至該凹部20及該外周邊部分24。 [0022] 其次,如圖5中所顯示,該半導體晶片12被放置在該導電膏30上。在此,該半導體晶片12被放置,以致該中心部分22的整個上側面被覆蓋以該半導體晶片12,且該半導體晶片12之外周邊緣12a係位於該凹部20上方。 [0023] 其次,該電極板16、該導電膏30、及該半導體晶片12的堆疊被加熱,同時壓力係在朝該電極板16之方向中施加至該半導體晶片12,如藉由圖5中的箭頭100所指示。當壓力如此於朝該電極板16之方向中被施加至該半導體晶片12時,壓力被施加至該導電膏30。其結果是,該導電膏30由該半導體晶片12及該中心部分22間之位置流動至外側面,如藉由圖5中的箭頭102所指示。已流出之導電膏30流入該凹部20。如此,如在圖6中所顯示,該凹部20的內表面被覆蓋以該導電膏30。換句話說,該導電膏30將與該凹部20之底部表面及側表面接觸。雖然該導電膏30係於圖6中的外周邊部分24之側面上與該凹部20的側表面接觸,該導電膏30不需要與此側表面接觸。如圖6中所顯示,已由該半導體晶片12及該中心部分22間之位置流出至該外側面的導電膏30將與位在該凹部20上方之半導體晶片12的下表面之一部分接觸。 [0024] 該加熱揮發來自該導電膏30的溶劑。再者,當該導電膏30係在壓力之下加熱時,該導電膏30中所含有的金屬微粒係彼此接合。如此,如圖6中所顯示,該導電膏30形成該接合層14。在此,位於該中心部分22及該半導體晶片12間之導電膏30係在高壓之下加熱,以致該導電膏30的此部分形成該低孔隙率第一部分14a。在另一方面,位於該凹部20及該半導體晶片12間之導電膏30係在相對低的壓力之下加熱,以致該導電膏30的此部分形成該高孔隙率第二部分14b。該導電膏30流入該凹部20,如藉由該箭頭102所指示,以致被暴露於該半導體晶片12及該電極板16間之接合層14的表面採取傾斜之形狀,以便移位朝該凹部20的底部表面,同時由該半導體晶片12之外周邊緣12a延伸朝該外周邊部分24。 [0025] 此後,當該電極板16、該導電膏30、及該半導體晶片12的堆疊被冷卻至室溫,該電極板16、該導電膏30、及該半導體晶片12之每一者收縮。由於線性膨脹係數中的差異,收縮量在該電極板16、該接合層14、及該半導體晶片12之中變動。據此,熱應力作用於該半導體晶片12上。在該半導體晶片12的外周邊部分(亦即,該外周邊緣12a附近中之部分)比於該半導體晶片12的中心部分較高之熱應力係極可能發生。然而,在此製造方法中,該接合層14的高孔隙率第二部分14b被接合至該半導體晶片12的外周邊部分。具有高孔隙率,該第二部分14b係極可能遭受彈性變形。該第二部分14b之彈性變形釋放作用於該半導體晶片12的外周邊部分上之熱應力。如此,根據此製造方法,該半導體晶片12的可靠性能被改善。再者,高熱應力係極可能發生之半導體晶片12的中心部分藉由該接合層14之第一部分14a被牢固地接合至該電極板16。如此,可保證於該半導體晶片12及該電極板16間之充分高的接合強度。 [0026] 圖7顯示一案例,在此當該電極板16之上表面為平坦時(亦即,該凹部20不被提供),該電極板16及該半導體晶片12經過該接合層14(亦即,該導電膏30)被接合。當該電極板16的上表面為平坦時,已在壓力之下由該半導體晶片12及該電極板16間之區域流動至該外側面的導電膏30於鄰接該半導體晶片12之外周邊緣12a的位置向上膨脹,並藉此形成突出部分120。該突出部分120可與該半導體晶片12之外周邊緣12a接觸,其可導致在該半導體晶片12內側的元件之短路。再者,當該突出部分120被形成時,破裂係極可能由於應力而在該突出部分120中發生。如果已在該突出部分120中發生的破裂成長至該半導體晶片12及該電極板16間之區域,譬如,該接合層14的電阻上升。藉由對比,於藉由該上面製造方法所製成之半導體裝置10中,該接合層14的表面具有傾斜之形狀,以便移位朝該凹部20的底部表面,同時由該半導體晶片12之外周邊緣12a延伸朝該外周邊部分24。具有此形狀的接合層14能被防止與該半導體晶片12之外周邊緣12a接觸。如此,在該半導體晶片12內側的元件之短路能被避免。再者,破裂係較不可能在具有此形狀的接合層14中發生,以致該接合層14之電阻的上升能被避免。 [0027] 使用焊料將半導體晶片連接至電極板之技術一般係已知。此技術有時候涉及於電極板的表面中形成凹部,以防止焊料過度地弄濕及遍布在該電極板的表面之上。此一凹部典型係比該半導體晶片的外周邊緣進一步設在外側面上。藉由對比,用於藉由本說明書所揭示之導電膏的凹部被使用,以致該半導體晶片之外周邊緣係位於此凹部上方。如此,使得該凹部能藉由允許該導電膏流入該凹部來放大該導電膏的面積。藉由本說明書所揭示之凹部在其次亦具有防止該導電膏由該指定區域散佈至超出該凹部的外側面之功能。 [0028] 在該上面的製造方法中,由於製造變動,流入該凹部20之導電膏30的數量可變得過度地大。如果此一現象傾向於發生,夾具80可在硬化該導電膏30之步驟中被安裝於該凹部20上方,如在圖8及9中所顯示。該夾具80被設置成接近該半導體晶片12的外周邊緣12a,且防止該導電膏30向上膨脹。間隙被留在該夾具80及該電極板16的外周邊部分24之間,以允許該導電膏30流動朝該外周邊部分24。當大量導電膏30流入該凹部20時,該導電膏30由該凹部20流至該外周邊部分24的上側面,如藉由圖8及9中之箭頭104所指示。如此,該導電膏30被防止於該凹部20中向上膨脹。據此,亦在此案例中,該接合層14鄰接該半導體晶片12的外周邊緣12a之部分的表面採取移位朝該凹部20之底部表面的形狀,同時延伸朝該外周邊部分24。因此,其係可能防止該接合層14與該外周邊緣12a接觸,以及避免發生在該接合層14中之破裂。
[0029]
10‧‧‧半導體裝置
12‧‧‧半導體晶片
12a‧‧‧外周邊緣
14‧‧‧接合層
14a‧‧‧第一部分
14b‧‧‧第二部分
16‧‧‧電極板
20‧‧‧凹部
22‧‧‧中心部分
24‧‧‧外周邊部分
30‧‧‧導電膏
60‧‧‧金屬微粒
62‧‧‧空隙
80‧‧‧夾具
100‧‧‧箭頭
102‧‧‧箭頭
104‧‧‧箭頭
120‧‧‧突出部分
[0016] 本發明之示範實施例的特色、優點、及技術與產業重要性將在下面參考所附圖式被敘述,其中相像數字表示相像元件,且其中: 圖1係半導體裝置10之直立剖視圖; 圖2係接合層14的第一部分14a之剖視圖; 圖3係該接合層14的第二部分14b之剖視圖; 圖4係一視圖,說明該半導體裝置10的製造過程(環繞凹部20之放大剖視圖); 圖5係一視圖,說明該半導體裝置10的製造過程(環繞該凹部20之放大剖視圖); 圖6係一視圖,說明該半導體裝置10的製造過程(環繞該凹部20之放大剖視圖); 圖7係一視圖,說明比較範例中的製造過程; 圖8係一視圖,說明修改範例中之製造過程(環繞該凹部20的放大剖視圖);及 圖9係一視圖,說明修改範例中之製造過程(環繞該凹部20的放大剖視圖)。
Claims (8)
- 一種半導體裝置的製造方法,該製造方法包含:(a)將含有金屬微粒之導電膏施加至包括該電極板的表面中之凹部的電極板中之指定區域,該指定區域係鄰接該凹部;(b)將半導體晶片放置在該導電膏上,以致該半導體晶片的外周邊緣係位於該凹部上方;及(c)藉由加熱該導電膏來硬化該導電膏,同時在朝該電極板之方向中將壓力施加至該半導體晶片。
- 如申請專利範圍第1項之半導體裝置的製造方法,其中於該步驟(a)中,該導電膏未施加至該凹部之底部表面,及於該步驟(c)中,已由該指定區域流入該凹部的該導電膏與該凹部之底部表面接觸。
- 如申請專利範圍第1或2項之半導體裝置的製造方法,另包含(d)將夾具設置在該凹部上方之位置及接近該半導體晶片的該外周邊緣。
- 一種半導體裝置,包含:電極板,包括凹部及鄰接該凹部之指定區域,該凹部 係在該電極板的表面中;接合層,其係由金屬所組成,且其蓋住由該指定區域延伸至該凹部之區域;及半導體晶片,被設置以便面朝該指定區域及該凹部,該半導體晶片被接合至該指定區域及該凹部上方的該接合層,且該半導體晶片之外周邊緣係位於該凹部上方,其中該凹部中的該接合層之孔隙率係高於該指定區域中的該接合層之孔隙率。
- 如申請專利範圍第4項之半導體裝置,其中鄰接該半導體晶片的該外周邊緣之該接合層的一部分之表面係相對該半導體晶片的下表面傾斜,以便移位朝該凹部之底部表面,同時延伸遠離該指定區域。
- 如申請專利範圍第4或5項之半導體裝置,其中該接合層係導電膏。
- 如申請專利範圍第4或5項之半導體裝置,其中該凹部於該電極板的表面中以環狀形狀延伸,以便環繞該半導體晶片,及該指定區域係藉由該凹部所環繞之區域。
- 如申請專利範圍第6項之半導體裝置,其中該凹部於該電極板的表面中以環狀形狀延伸,以便環 繞該半導體晶片,及該指定區域係藉由該凹部所環繞之區域。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017001924A JP6726821B2 (ja) | 2017-01-10 | 2017-01-10 | 半導体装置の製造方法 |
JP2017-001924 | 2017-01-10 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201841266A TW201841266A (zh) | 2018-11-16 |
TWI672748B true TWI672748B (zh) | 2019-09-21 |
Family
ID=60888260
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW106145499A TWI672748B (zh) | 2017-01-10 | 2017-12-25 | 半導體裝置及半導體裝置的製造方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US10269753B2 (zh) |
EP (1) | EP3346487A1 (zh) |
JP (1) | JP6726821B2 (zh) |
KR (1) | KR102056899B1 (zh) |
CN (1) | CN108321139A (zh) |
BR (1) | BR102017027714A2 (zh) |
RU (1) | RU2678509C1 (zh) |
TW (1) | TWI672748B (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE112018005713T5 (de) * | 2017-10-30 | 2020-07-16 | Mitsubishi Electric Corporation | Leistungshalbleitereinheit und herstellungsverfahren für eine leistungshalbleitereinheit |
JP7074621B2 (ja) * | 2018-09-05 | 2022-05-24 | 株式会社東芝 | 半導体装置及びその製造方法 |
CN111315183B (zh) * | 2018-12-12 | 2022-02-01 | 成都鼎桥通信技术有限公司 | 用于电子元器件的导热组件、制冷装置及电子设备 |
WO2020129930A1 (ja) * | 2018-12-17 | 2020-06-25 | 株式会社トクヤマ | 光学材料用硬化性組成物および光学材料 |
US11488885B2 (en) * | 2019-12-02 | 2022-11-01 | Mitsubishi Electric Corporation | Heat sink |
US11776871B2 (en) * | 2020-12-15 | 2023-10-03 | Semiconductor Components Industries, Llc | Module with substrate recess for conductive-bonding component |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014013855A (ja) * | 2012-07-05 | 2014-01-23 | Mitsubishi Electric Corp | 半導体発光装置の製造方法および半導体発光装置 |
JP2015082614A (ja) * | 2013-10-23 | 2015-04-27 | 株式会社デンソー | 半導体装置 |
JP2016115865A (ja) * | 2014-12-17 | 2016-06-23 | 三菱電機株式会社 | 電力用半導体装置 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04139883A (ja) * | 1990-10-01 | 1992-05-13 | Ricoh Co Ltd | 半導体素子の接着固定構造 |
JPH0493142U (zh) * | 1990-12-25 | 1992-08-13 | ||
JP4904767B2 (ja) * | 2005-10-17 | 2012-03-28 | 富士電機株式会社 | 半導体装置 |
CN101578695B (zh) * | 2006-12-26 | 2012-06-13 | 松下电器产业株式会社 | 半导体元件的安装结构体及半导体元件的安装方法 |
JP4895994B2 (ja) * | 2006-12-28 | 2012-03-14 | 株式会社日立製作所 | 金属粒子を用いた接合方法及び接合材料 |
US7838974B2 (en) * | 2007-09-13 | 2010-11-23 | National Semiconductor Corporation | Intergrated circuit packaging with improved die bonding |
JP2010263108A (ja) * | 2009-05-08 | 2010-11-18 | Elpida Memory Inc | 半導体装置及びその製造方法 |
JP5636720B2 (ja) * | 2010-04-01 | 2014-12-10 | 三菱電機株式会社 | 半導体装置の製造方法および接合治具 |
CN103210703B (zh) * | 2010-09-13 | 2016-08-10 | Pst传感器(私人)有限公司 | 装配和封装分立电子元件 |
JP2013123016A (ja) * | 2011-12-12 | 2013-06-20 | Denso Corp | 半導体装置 |
JP2014029897A (ja) * | 2012-07-31 | 2014-02-13 | Hitachi Ltd | 導電性接合体およびそれを用いた半導体装置 |
WO2015060346A1 (ja) | 2013-10-23 | 2015-04-30 | 日立化成株式会社 | ダイボンドシート及び半導体装置の製造方法 |
JP6143687B2 (ja) | 2014-02-18 | 2017-06-07 | 三菱電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2015177182A (ja) * | 2014-03-18 | 2015-10-05 | 三菱電機株式会社 | パワーモジュール |
DE102014114982B4 (de) * | 2014-10-15 | 2023-01-26 | Infineon Technologies Ag | Verfahren zum Bilden einer Chip-Baugruppe |
JP6610102B2 (ja) * | 2015-09-08 | 2019-11-27 | 株式会社村田製作所 | 半導体モジュール |
JP6572732B2 (ja) * | 2015-10-27 | 2019-09-11 | 三菱マテリアル株式会社 | パワーモジュール |
-
2017
- 2017-01-10 JP JP2017001924A patent/JP6726821B2/ja active Active
- 2017-12-19 US US15/847,083 patent/US10269753B2/en active Active
- 2017-12-20 KR KR1020170176028A patent/KR102056899B1/ko active IP Right Grant
- 2017-12-20 CN CN201711385296.3A patent/CN108321139A/zh active Pending
- 2017-12-21 BR BR102017027714A patent/BR102017027714A2/pt not_active IP Right Cessation
- 2017-12-21 RU RU2017145049A patent/RU2678509C1/ru active
- 2017-12-25 TW TW106145499A patent/TWI672748B/zh active
- 2017-12-26 EP EP17210571.0A patent/EP3346487A1/en not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014013855A (ja) * | 2012-07-05 | 2014-01-23 | Mitsubishi Electric Corp | 半導体発光装置の製造方法および半導体発光装置 |
JP2015082614A (ja) * | 2013-10-23 | 2015-04-27 | 株式会社デンソー | 半導体装置 |
JP2016115865A (ja) * | 2014-12-17 | 2016-06-23 | 三菱電機株式会社 | 電力用半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
TW201841266A (zh) | 2018-11-16 |
CN108321139A (zh) | 2018-07-24 |
KR20180082318A (ko) | 2018-07-18 |
RU2678509C1 (ru) | 2019-01-29 |
US20180197833A1 (en) | 2018-07-12 |
BR102017027714A2 (pt) | 2018-10-30 |
KR102056899B1 (ko) | 2019-12-17 |
EP3346487A1 (en) | 2018-07-11 |
JP2018113301A (ja) | 2018-07-19 |
JP6726821B2 (ja) | 2020-07-22 |
US10269753B2 (en) | 2019-04-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI672748B (zh) | 半導體裝置及半導體裝置的製造方法 | |
TW409371B (en) | Semiconductor device and method of manufacturing the same | |
JP2015128194A (ja) | 半導体装置 | |
JP4501533B2 (ja) | 半導体装置の製造方法 | |
KR20180106957A (ko) | 반도체 장치와 그 제조 방법 및 전극판 | |
JP5983249B2 (ja) | 半導体モジュールの製造方法 | |
JP4967277B2 (ja) | 半導体装置およびその製造方法 | |
JP3823974B2 (ja) | 半導体装置の製造方法 | |
JP2005019829A (ja) | 半導体装置 | |
JP7120256B2 (ja) | 半導体装置 | |
JP2992873B2 (ja) | 半導体装置 | |
JPH07105460B2 (ja) | 半導体装置 | |
WO2019146259A1 (ja) | 半導体装置 | |
JP2007035913A (ja) | 半導体装置 | |
JP4333483B2 (ja) | 半導体装置 | |
JP2018046151A (ja) | 半導体装置 | |
JP4047572B2 (ja) | 電力用半導体装置 | |
WO2017077728A1 (ja) | パワーモジュール及びパワーモジュールの製造方法 | |
JP7294068B2 (ja) | ターミナル、および、その製造方法 | |
JP5477260B2 (ja) | 電子装置およびその製造方法 | |
JP6610577B2 (ja) | 半導体装置 | |
JP2011003631A (ja) | 電力半導体装置 | |
TWI488268B (zh) | 半導體元件 | |
JP2018137290A (ja) | 半導体装置 | |
JP2007311637A (ja) | バンプ状接続部材の形成方法 |