TWI608537B - 電漿蝕刻系統 - Google Patents

電漿蝕刻系統 Download PDF

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TWI608537B
TWI608537B TW105101378A TW105101378A TWI608537B TW I608537 B TWI608537 B TW I608537B TW 105101378 A TW105101378 A TW 105101378A TW 105101378 A TW105101378 A TW 105101378A TW I608537 B TWI608537 B TW I608537B
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heater
substrate
plasma etching
heater zones
etching system
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高夫凱伊斯威廉
席恩哈密特
卡門登特凱伊斯
瓦海地瓦西德
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蘭姆研究公司
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    • HELECTRICITY
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    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76825Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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Description

電漿蝕刻系統
本發明關於一種電漿蝕刻系統及其使用方法。 [相關專利及申請案之參照]
本申請案主張於西元2009年12月15日申請之美國臨時專利申請案第61/286,653號之優先權,其所有內容係合併於此做為參考文獻。
隨著每一接續的半導體技術世代,基板(例如晶圓)的直徑有增加的傾向,且電晶體尺寸減少,導致在基板處理時需要更高的準確度及再現性。藉由包括真空腔室的使用的技術,半導體基板材料(例如矽基板)被處理。這些技術包括非電漿應用,例如電子束沉積;也包括電漿應用,例如濺鍍沉積、電漿輔助化學氣相沉積(PECVD)、光阻剝除、及電漿蝕刻。
現今可取得的電漿蝕刻系統,是那些需要改善準確度及再現性的半導體製造工具之一。一個用於電漿蝕刻系統的度量是增加的均一性,其包括半導體基板表面上的製程結果均一性、也包括以名義上相同的輸入參數加以處理的一系列基板的製程結果均一性。持續地改善基板內均一性是令人期待的。特別是,此需要具有改良的均一性、一致性、及自我診斷的電漿腔室。
本發明揭示一種電漿蝕刻系統的使用方法,該電漿蝕刻系統包括基板支撐組件,用於在電漿蝕刻時支托基板,該基板支撐組件包括複數可獨立控制的加熱器區,該等加熱器區位於基板的元件晶粒位置之下的裝置中;及控制器單元,控制每一加熱器區。該方法包括:(a)量測在基板的基板元件晶粒位置上的蝕刻前關鍵元件參數、或之前被蝕刻基板的蝕刻後關鍵元件參數;(b)將該等蝕刻前或蝕刻後關鍵元件參數傳送至電漿蝕刻系統;(c)接著將基板支托在基板支撐組件上;(d)將製程配方參數傳送至電漿蝕刻系統、及∕或從記憶體將製程配方參數載入至電漿蝕刻系統;(e)由製程配方參數、目標蝕刻後關鍵元件參數資料、及來自進入基板的蝕刻前關鍵元件參數、及∕或來自之前被蝕刻基板的蝕刻後關鍵元件參數,推導出在基板上預定位置處的目標蝕刻溫度;(f)根據在預定位置處的目標蝕刻溫度,使用可控制的加熱器區調整在每一預定位置處的溫度;及(g)對基板進行電漿蝕刻。
在半導體處理設備中,為了達成基板上的目標關鍵尺寸(CD)均一性,開始變得更加要求徑向及方位角基板溫度控制。尤其是當半導體製造處理的CD接近次20奈米時,甚至連小小的溫度差異都可能影響CD至無法接受的程度。
在處理期間,基板支撐組件可被配置為多種功用,例如支托基板、調整基板溫度、及提供射頻功率。基板支撐組件可包括靜電夾盤(ESC),用於在處理期間以靜電方式將基板箝制在基板支撐組件上。ESC可能是可調式ESC(T-ESC)。T-ESC被描述在共同受讓的美國第6,847,014及6,921,724號專利中,其被合併於此做為參考文獻。基板支撐組件可包括陶瓷基板座、流體冷卻散熱器(以下稱之為冷卻板)、及複數同心加熱器區,以實現逐步及徑向的溫度控制。通常,冷卻板被保持在0℃及30℃之間。該等加熱器被配置在冷卻板上,在其間具有一層絕熱體。該等加熱器可保持基板支撐組件的支撐表面在約0℃至80℃之間,高於冷卻板的溫度。藉由改變該等加熱器區內的加熱器功率,基板支撐溫度分佈可以在中央熱、中央冷、及均勻之間變化。此外,平均基板支撐溫度可在高於冷卻板溫度的0到80℃的操作範圍內逐步地改變。當CD隨著半導體技術的進展而減小時,小的方位角溫度差異造成不斷增加的挑戰。
由於幾個原因,控制溫度並非容易的工作。首先,許多因素可能影響熱傳遞,例如熱源及散熱器的位置、介質的移動、材質及形狀。其次,熱傳遞是一種動態的過程。除非討論中的系統是處於熱平衡,否則將發生熱傳遞,且溫度分佈及熱傳遞將隨著時間而改變。第三,在電漿處理中,非平衡現象(例如電漿)是一直存在的,其使得任何實際的電漿處理設備的熱傳遞行為的理論預測是非常困難的(如果不是不可能的話)。
在電漿處理設備中的基板溫度分佈受到許多因素的影響,例如電漿密度分佈、RF功率分佈、及靜電夾盤中各種加熱及冷卻構件的細部結構,因此基板溫度分佈通常不是均勻的,且難以利用小量的加熱或冷卻構件加以控制。這個缺點轉移至整片基板內處理速率的非均一性、及基板上元件晶粒關鍵尺寸的非均一性。
關鍵尺寸的非均一性可能由上游製程所引起,例如微影製程。由於微影的並行性質(亦即,基板上的所有元件晶粒是一起曝光)及難以控制的因素(例如光源非均一性、光罩上的繞射、溫度的非均一性、光阻厚度的非均一性等),微影後及蝕刻前基板的元件特徵部通常具有非均一性。如果未經檢查且被允許傳送到下游製程,這樣的非均一性可能造成元件良率的下降。
有利且令人期待的是,在基板支撐組件中加入多個可獨立控制的加熱器區,以使得電漿蝕刻系統能主動地產生及維持目標空間及時間溫度分佈,及對於影響CD均一性的不利因素進行補償。
具有獨立受控加熱器區的基板支撐組件已被描述在2009年10月21日申請的美國專利申請案第12/582,991號之中,其被合併於此做為參考文獻。
本發明描述一種具有可獨立控制的加熱器區的基板支撐組件的電漿蝕刻系統的使用方法,用於補償待蝕刻基板上的非均一性,其係藉由量測基板的複數元件晶粒位置上的蝕刻前關鍵元件參數、或之前被蝕刻基板的蝕刻後關鍵元件參數,及使用測得的資訊調整蝕刻時在基板上的預定位置處的溫度。
例如,在基板進行微影之後,圖案被形成在基板上的光阻層之中。光阻層中的圖案的關鍵尺寸可能具有非均一性。使用合適的工具可以量測在基板的每一元件晶粒的光阻層中的蝕刻前關鍵尺寸。圖案化的光阻層被使用做為後續的基板電漿蝕刻的遮罩。電漿蝕刻時的溫度可能影響基板的被蝕刻圖案的關鍵尺寸(蝕刻後關鍵尺寸)。若在元件晶粒位置處的蝕刻前關鍵尺寸被判定為落在目標值的容許誤差之外,則可以利用加熱器區調整元件晶粒位置的蝕刻溫度,俾使蝕刻後關鍵尺寸落在目標值的容許誤差內。因此,測得的蝕刻前關鍵尺寸可以被使用於調整每一元件晶粒位置的蝕刻溫度,以便補償元件晶粒位置處的蝕刻前關鍵尺寸的特定誤差量。
電漿蝕刻系統可能具有裝配在加熱板中的可獨立控制加熱器區、及控制每一加熱器區的控制器單元。藉著在控制器單元的控制下調整每一加熱器區的功率,在處理期間的溫度分佈可以在徑向及方位角向皆被塑形。較佳地,加熱器區被配置為經定義的圖案,例如矩形網格、六角形網格、或其它圖案。較佳地,加熱板的每一加熱器區具有與基板上的單一元件晶粒類似的大小(例如,±10%)。在一例示性裝置中,為了減少電連接的數目,電力供應及電力回路線路被配置為俾使每一電力供應線路被連接至不同群組的加熱器區,且每一電力回路線路被連接至不同群組的加熱器區,每一加熱器區是在連接至一特定電力供應線路的該等群組之一者、及連接至一特定電力回路線路的該等群組之一者中。沒有兩個加熱器區被連接至同一對的電力供應及電力回路線路。因此,使電流通過連接至一加熱器區的一對電力供應及電力回路線路,可活化該特定加熱器區。加熱器元件的功率較佳為小於20W,更佳為5至10W。加熱器元件可能是帕耳帖(Peltier)元件及∕或電阻加熱器,例如聚醯亞胺加熱器、矽氧橡膠加熱器、雲母加熱器、金屬加熱器(例如鎢、鎳∕鉻合金、鉬或鉭)、陶瓷加熱器(例如碳化鎢)、半導體加熱器、或碳加熱器。加熱器元件可能是網印、線繞、或蝕箔加熱器。加熱器元件的厚度可能從2微米到1毫米,較佳為5-80微米。為了在加熱器區之間及∕或電力供應及電力回路線路之間提供空間,加熱器區的總面積可能上至基板支撐組件的上表面積的90%,例如,面積的50-90%。電力供應線路或電力回路線路(合稱為電力線路)可被配置在加熱器區之間的間隙(1-10mm)中、或配置在藉由電絕緣層而與加熱器區平面分離的獨立平面中。較佳地,使電力供應線路及電力回路線路在空間允許的狀況下儘可能加寬,以便傳送大電流及減少焦耳熱。電力線可能與加熱器區在同一平面、或可能與加熱器區在不同平面。電力供應及電力回路線路的材質可能與加熱器元件的材質相同或不同。較佳地,電力供應及電力回路線路的材質是具有低電阻率的材質,例如銅、鋁、鎢、英高鎳(Inconel® )、或鉬。基板支撐組件可用於控制基板溫度,且因而控制在每一元件晶粒位置處的電漿蝕刻製程,以使出自該基板的元件的良率最大化。較佳地,電漿蝕刻系統具有至少9個加熱器區。
在一實施例中,電漿蝕刻系統能夠由例如使用者、機上測量工具、主機網路(在生產線的處理工具之間分享資料的網路)之類的來源,接收位於其中的待處理基板上的複數元件晶粒位置處(較佳為在每一元件晶粒位置中至少一位置處)所測得的關鍵元件參數(例如,蝕刻前關鍵尺寸)。較佳地,電漿蝕刻系統經由主機通訊網路、從離機檢驗工具接收一批待處理基板的蝕刻前關鍵元件參數。上述的離機檢驗工具可能是光學及∕或電子束檢驗工具。電漿蝕刻系統可能具有硬體及∕或軟體介面,用於接收蝕刻前關鍵元件參數。電漿蝕刻系統可能具有合適的軟體,用於處理蝕刻前關鍵元件參數。
電漿蝕刻系統也能夠經由硬體及∕或軟體介面接收、及∕或從記憶體載入製程配方參數,該製程配方參數定義出目標蝕刻後關鍵元件參數與已測得的蝕刻前關鍵元件參數及蝕刻溫度之間的相依性;以及從製程配方參數、目標蝕刻後關鍵元件參數、及已測得的蝕刻前關鍵元件參數推導出在基板的預定位置處的目標蝕刻溫度。較佳地,電漿蝕刻系統能夠接收每一製程配方步驟的此類製程配方參數。
較佳地,電漿蝕刻系統更能夠根據每一元件晶粒位置的目標蝕刻溫度,計算每一加熱器區的目標控制參數(可以直接加以控制的參數,例如功率、電壓、電流等),以實現每一元件晶粒的目標關鍵元件參數。
藉由量測基板支撐組件的表面溫度對施加於其的不同控制參數的回應,可以在基板支撐組件的製造期間獲得目標控制參數。此外,利用理論或實驗模型(例如熱傳遞理論或有限元素分析),可以決定目標控制參數。
較佳地,穩定增益矩陣可被用於計算目標控制參數,其係利用每一元件晶粒位置對於施加於下方加熱器區的控制參數的直接回應、以及利用該元件晶粒對於施加於其它加熱器區的控制參數的間接回應(串擾,crosstalk)。穩定增益矩陣的計算,可以利用G. Golub等人所著的Matrix Computation (The Johns Hopkins University Press, Boston 1996)一書中所述的方法。該書的所有內容係合併於此做為參考文獻。
在一實施例中,假設電漿蝕刻系統具有n個獨立的加熱器區。它們的個別控制參數是Xi (i =1, 2, …, n)。所有的控制參數Xi 可以寫成一個向量:
其中,較佳地,Xi 是施加於第i 個加熱器區的時間平均功率。
Ti 是在第i 個加熱器區內的一元件晶粒位置處的目標蝕刻溫度,其可以寫成另一個向量:
向量T是向量X的函數。向量X和T之間的關聯可以用n乘n的矩陣K加以描述,其中T=K•X。對角線元素Kii 可以在基板支撐組件或電漿蝕刻系統的製造期間加以量測。非對角線元素Kij (i≠j )可以在基板支撐組件或電漿蝕刻系統的製造期間加以量測、或從有限元素熱模型、對角線元素的值、及第i 個與第j 個加熱器區之間的物理距離加以推導。矩陣K被儲存在電漿蝕刻系統中。電漿蝕刻系統也具有用來執行演算法的軟體或韌體,以根據T推導出X。該演算法是一矩陣反演、及隨後的矩陣相乘,亦即X=K-1 •T。
在另一實施例中,假設電漿蝕刻系統具有n個獨立的加熱器區。它們的個別控制參數是Xi (i =1, 2, …, n)。所有的控制參數Xi 可以寫成一個向量:
其中,較佳地,Xi 是施加於第i 個加熱器區的時間平均功率。
P ={Pj} 是在基板上的複數預定位置處的一組推測蝕刻溫度,根據先前的模擬或校正測量,在該等預定位置處,對每一加熱器區的溫度回應是已知的。P 可以寫成另一個向量:
T ={Tj} 是在基板上的相同預定位置處的一組目標蝕刻溫度。T 可以寫成另一個向量:
在此實施例中,具有個別目標蝕刻溫度的基板上位置的數目m不等於加熱器區的數目,亦即,m≠n。具有溫度回應的位置可能不同於加熱器區的位置。向量P是向量X的函數。向量P和T之間的關聯可以用m乘n的矩陣K加以描述,其中P=K•X。元素Kij 可以在基板支撐組件或電漿蝕刻系統的製造期間加以量測、或從有限元素熱模型加以推導。矩陣K被儲存在電漿蝕刻系統中。電漿蝕刻系統也具有用來執行演算法的軟體或韌體,以根據T推導出X,其係使用矩陣及最佳化演算法,例如最小平方最佳化。藉由使得在元件晶粒位置處的預測溫度與在基板上的個別位置處的目標溫度之間的差異減少,該最佳化演算法有助於加熱器功率設定點的決定。
在上述實施例中,基板特性(例如,CD測量值)被量測的位置可能不同於加熱器區的數目。此外,基板特性被量測的該等位置、與根據模擬或事先測量(例如在製造期間)的每一加熱器區的溫度回應為已知的該等位置可能不一致。也就是說,基板特性測量位置與用於建構矩陣K的位置是不同的。因此,在與用於建構矩陣K的相同位置處的基板特性需要被估計。在一較佳實施例中,可以使用一技術(例如線性或非線性內插法)以轉換基板特性(例如,CD測量值)的資料,從基板特性測量位置轉換到在校準時個別加熱器回應已經被模擬∕量測的位置,亦即,用於建構矩陣K的位置。
在一替代實施例中,根據在每一加熱器區內的溫度感測器(例如,光學感測器、熱電偶、二極體之類)的輸出,控制電路(例如PID控制器)可以動態地決定該等控制參數。
雖然電漿蝕刻系統的使用方法已經參考特定的實施例而詳細地加以說明,對於熟悉此項技藝者而言,明顯地,在不偏離附加請求項的範圍內,仍可做出不同的變化和修飾。

Claims (11)

  1. 一種電漿蝕刻系統,包括一基板支撐組件,用於在電漿蝕刻時支托一基板,該基板支撐組件包括複數可獨立控制的加熱器區及一控制器單元,該等加熱器區位於該基板下的一裝置中,該控制器單元控制每一加熱器區,其中該控制器單元由在該基板之複數元件晶粒位置上的一光阻層所量測的蝕刻前關鍵元件參數以及來自之前被蝕刻基板的蝕刻後關鍵元件參數,推導出在該基板上之預定位置的目標蝕刻溫度,並且使用該等加熱器區,調整每一元件晶粒位置的溫度至其目標蝕刻溫度。
  2. 如申請專利範圍第1項之電漿蝕刻系統,更包括一介面,該介面經由一主機通訊網路而從一離機檢驗工具接收該等蝕刻前或蝕刻後關鍵元件參數。
  3. 如申請專利範圍第1項之電漿蝕刻系統,其中當該等加熱器區的數目與該等元件晶粒位置的數目不相同時, 根據一矩陣,決定該等加熱器區的加熱器功率設定點,該矩陣描述該等加熱器區的目標控制參數與該基板上的該等預定位置的預測蝕刻溫度之間的關聯。
  4. 如申請專利範圍第1項之電漿蝕刻系統,其中當該等加熱器區的數目與該等元件晶粒位置的數目相同時, 藉由將一反矩陣與一向量相乘,決定該等加熱器區的加熱器功率設定點,該反矩陣描述該等加熱器區的目標控制參數與該等元件晶粒位置的該等目標蝕刻溫度之間的關聯,該向量的元素係該等元件晶粒位置的該等目標蝕刻溫度。
  5. 如申請專利範圍第1項之電漿蝕刻系統,其中該控制器單元判定該等蝕刻前關鍵元件參數是否落在目標值之外,並且控制該等加熱器區的加熱操作,以使該等蝕刻後關鍵元件參數落在該等目標值之內。
  6. 如申請專利範圍第1項之電漿蝕刻系統,其中該等加熱器區係以網格方式加以配置。
  7. 如申請專利範圍第1項之電漿蝕刻系統,其中該等加熱器區係涵蓋該基板支撐組件的一上基板支撐表面之面積的50至90%。
  8. 如申請專利範圍第1項之電漿蝕刻系統,其中該等加熱器區被連接至電力供應線路與電力回路線路,每一電力供應線路與每一電力回路線路被連接至不同群組的加熱器區。
  9. 如申請專利範圍第1項之電漿蝕刻系統,其中該等加熱器區被連接至電力供應線路與電力回路線路,以致沒有兩個加熱器區係被連接至同一對的電力供應線路與電力回路線路。
  10. 如申請專利範圍第1項之電漿蝕刻系統,其中每一加熱器區包括至少一電阻加熱器。
  11. 如申請專利範圍第1項之電漿蝕刻系統,其中該等加熱器區包括至少9個加熱器區以及複數電力供應線路與複數電力回路線路,每一電力供應線路被連接至該等加熱器區其中至少兩者,每一電力回路線路被連接至該等加熱器區其中至少兩者,以及每一加熱器區被連接至不同對的電力供應線路與電力回路線路。
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