TWI470748B - 用於有效散熱之無線半導體封裝 - Google Patents
用於有效散熱之無線半導體封裝 Download PDFInfo
- Publication number
- TWI470748B TWI470748B TW097139088A TW97139088A TWI470748B TW I470748 B TWI470748 B TW I470748B TW 097139088 A TW097139088 A TW 097139088A TW 97139088 A TW97139088 A TW 97139088A TW I470748 B TWI470748 B TW I470748B
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- Taiwan
- Prior art keywords
- die
- lead
- heat sink
- dies
- attach pad
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 29
- 230000017525 heat dissipation Effects 0.000 title description 6
- 239000000853 adhesive Substances 0.000 claims description 29
- 230000001070 adhesive effect Effects 0.000 claims description 29
- 239000000463 material Substances 0.000 claims description 18
- 229910000679 solder Inorganic materials 0.000 claims description 18
- 239000004593 Epoxy Substances 0.000 claims description 17
- 239000004020 conductor Substances 0.000 claims description 17
- 238000002844 melting Methods 0.000 claims description 15
- 230000008018 melting Effects 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 12
- 238000000465 moulding Methods 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000013078 crystal Substances 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 claims 3
- 239000008188 pellet Substances 0.000 claims 1
- 229910052709 silver Inorganic materials 0.000 description 7
- 229910052718 tin Inorganic materials 0.000 description 7
- 229910052745 lead Inorganic materials 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 239000011230 binding agent Substances 0.000 description 3
- 238000004891 communication Methods 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 239000002470 thermal conductor Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000000712 assembly Effects 0.000 description 2
- 238000000429 assembly Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000013021 overheating Methods 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000005094 computer simulation Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002991 molded plastic Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000002952 polymeric resin Substances 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
Classifications
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Description
在一實施例中,本發明係關於一種具有至少兩個半導體晶粒之無線半導體封裝。該兩個晶粒係以此一方式經組態使得熱量可被有效消散。
半導體裝置通常遭受熱量消散問題之害。舉例而言,簡單二極體將在使用期間生成熱量且過多熱量可損壞或破壞該半導體裝置。其他半導體裝置亦遭受相似缺點。除了過熱之外,加熱與冷卻之重複循環通常造成該等裝置之組件出現故障。存在於此等裝置中的電線係機械故障之另一源頭。此外,將此等電線附接至該半導體晶粒為困難且昂貴,因為此附接需要專門的機械及額外的製造步驟。吾人已作出許多嘗試以克服此等不足,但無一證明為完全令人滿意。
Boucher等人之美國專利第4,990,987號(《用於半導體裝置之過熱溫度感測器及保護器》(Over-temperature sensor and protector for semiconductor devices))揭示一種具有一與該半導體具有一熱感應關係的熱敏電阻器之半導體裝置。當該裝置之溫度上升超過一特定臨限值,該熱敏電阻器之電阻提高。如此,可防止該裝置之過熱。
Estes等人之美國專利第5,714,789號(《電路板安裝IC封裝冷卻裝置》(Circuit board-mounted IC package cooling apparatus))揭示一種由一幫助散熱的導熱液體填充的半導體封裝。不幸地,此等液態系統之使用已證明為有問題。
因此,需要一種用於消散由一半導體裝置產生的熱量之更有效的方法。
亦需要提供一消除該晶粒至該引線框之電線連接的半導體裝置。
在其中一種形式上,本發明包括一具有複數個諸如二極體之半導體裝置的封裝總成。在一實施例中,此等晶粒係串聯無線連接。此一組態促進來自該等半導體裝置之熱量的消散並提供一堅固的無線構造。
本發明之一優點係熱量係分佈在一較寬的區域上,且因此被更有效地消散。
本發明之另一優點係不需要電線用以將該等半導體晶粒連接至該引線框。此一組態實質上係比先前技術半導體更堅固並省略該裝置之製造期間的佈線步驟。此外,該無線附接亦作為熱導體並散熱。
圖1係一封裝半導體封裝100之圖。半導體封裝100具有複數個引線106、108及110,其等每者延伸出環氧模造物104。環氧模造物104係以虛象予以顯示以更好地繪示封裝100之該等內部組件。環氧模造物104之底面固持一散熱器102。在一實施例中,散熱器102係一諸如銅的導電及導熱材料。晶粒112及114係配置於環氧模造物104中。在圖1中描繪的該實施例中,此等晶粒係串聯無線連接。在另一實施例(未顯示)中,該等晶粒係並聯無線連接。將在此說明書之別處進一步詳細討論的是:此一無線組態允許該等晶粒112及114被配置於一散熱器102及一晶粒附接墊210(見圖2)間,其等兩者係導熱且導電的。此無線組態使得該兩個晶粒能共用一共通引線(引線110)並提供一種用於散熱的有效機構。典型的先前技術半導體裝置具有一用於該裝置上每個終端的引線。本文揭示的無線組態包含比終端少的引線數。該無線組態亦將該晶粒放置在其鄰近兩個導熱構件:即一散熱器及一引線之位置。在此一系統中,該散熱器及該引線提供作為導熱體及導電體兩者之雙重目的。圖2描繪此新穎組態之部分。
圖2係圖1之該封裝100之側視圖,其繪示環氧模造物104中一些組件。在圖2中描繪的該實施例中,環氧模造物104之一側固持一植入的散熱器102。封裝100可藉由將一螺絲釘穿過安裝孔208被安裝至一表面(未顯示)。晶粒112之一個終端(例如陰極)係與散熱器102電連通且係藉由導電黏合劑202附接至散熱器。舉例而言,該導電黏合劑202可為一導電環氧樹脂或一焊接材料,諸如一含鉛焊料或一無鉛焊料。晶粒112之另一終端(例如陽極)係與引線106之該晶粒附接墊210電連通。此一連接係經由導電黏合劑206予以完成。在一實施例中,導電黏合劑202係一高熔點焊料且黏合劑206係一低熔點焊料。此等焊料之成分係在本說明書之別處予以討論。有利地,此一組態允許黏合劑206之熔化而不致熔化(且因此解接合)導體202。引線106自環氧模造物104內延伸並在端212終止,該端係未配置在環氧模造物104中。
圖2亦描繪引線110及其至散熱器102之連接。引線110(亦見圖1)係經由導電黏合劑206連接至散熱器102。引線110亦延伸出環氧模造物104並平行於引線106延伸(見圖1)。雖然此一連接之細節係在本說明書之別處予以討論,但圖1之晶粒114可以一類似方式連接至引線108。
圖3係圖1之該封裝100之分解圖,其顯示用於本發明之一實施例之環氧模造物104內部的組件層。環氧模造物104大體上係由一諸如模塑膠之塑膠材料製程。模塑膠通常係聚合樹脂,但亦可使用其他適當的封裝材料。晶粒112及114之該等底側係藉由高熔點導電黏合劑202連接至散熱器102。舉例而言,晶粒112及114可為簡單的矽二極體。在另一實施例中,可使用一更複雜的半導體晶粒。舉例而言,可使用一覆晶晶粒。該散熱器102可為導熱且導電的任何材料。舉例而言,散熱器102可由銅組成。舉例而言,導電黏合劑202可為一諸如95.5%鉛、2%錫及2.5%銀的鉛基焊料,或一諸如環氧樹脂之無鉛材料。晶粒112及114之該等頂側係經由導電黏合劑206連接至包含引線106、108及110之引線框300的晶粒附接墊。在一實施例中,黏合劑206係一具有低於黏合劑202之熔點的熔點之焊接材料。舉例而言,當黏合劑202係95.5% Pb、2% Sn及2.5% Ag時,黏合劑202可為88% Pb、10% Sn、2% Ag。有利地,焊料成分中的此差異可用以活化該低熔點焊料而不解接合該高熔點焊料。在一實施例中,該等焊料具有至少大約10℃之熔點的差異。該引線框300及引線106、108及110皆為導熱且導電且可由一包括一諸如銅的導電金屬之導電基板予以形成。該基板可藉由一或更多層的其他導電金屬及導電金屬合金予以電鍍,例如鎳、鈀及同類物。一引線框材料之一實例係TAMAC 4(Fe 0.07、P 0.03、Zn 0.05及其餘為Cu)。熟習此項技術者將可見其他適當的引線框材料。環氧模造物104係被配置於該總成之該等內部組件上方。
圖4描繪一種用於生成一無線半導體封裝100之方法400。圖4中顯示的該實例中,生成封裝100(見圖1)。從閱讀此說明書獲益之後,一般技術者將易於瞭解在本說明書之別處討論的用於生成其他總成之替代方法。與先前技術有線方法比較,該無線方法400之一個優點係省略佈線步驟。由於可省略此一分離步驟,因此該所得方法為更有效且具有成本效益。該所得產品之該無線組態亦具有若干熱優點,其等係在本說明書之別處予以討論。
在方法400之步驟402中,導電黏合劑202係安裝至散熱器102。舉例而言,吾人可將一由95.5% Pb、2% Sn及2.5% Ag形成的焊料用以焊料塗佈該散熱器102。散熱器102可為導電及導熱的任何適當的材料。在步驟404中,該等晶粒112及114係藉由利用黏合劑202被安裝至散熱器102。一旦該等晶粒112及114係穩固附接,則在步驟406中,導電黏合劑206係用以塗佈此等晶粒之上表面。在一些實施例中,導電黏合劑206可選擇為具有比黏合劑202低的熔點。舉例而言,導電黏合劑可由一88% Pb、10% Sn、2% Ag的成分予以形成。在步驟408中,當引線框300被附接時,一適當的溫度可用以熔化黏合劑206而不熔化黏合劑202。引線框300可由一諸如銅的導電材料予以形成,且大體上係藉由多種金屬或金屬合金予以電鍍。此一引線框300係藉由壓印或蝕刻一金屬空白予以定形以形成該等引線106、108及110及繫桿409。在方法400之步驟410中,施加該環氧模造物104,因此生成中間總成411。接著在步驟412中,切掉該引線框之不合需要的該等繫桿409,因此產生封裝100。
圖5係封裝100中該等電連接之示意性的繪示。為了繪示之簡化,已省略該等黏合劑。如在圖5中可見,該晶粒112係陰極側向下被配置於該導電散熱器102上。相反,晶粒114係陽極側向下被配置於該導電散熱器102上。如此,該兩個晶粒112及114係串聯連接。當電流穿過晶粒112及114時產生熱量。封裝100使用至少兩個串聯連接的半導體晶粒。由於該等晶粒為彼此遠隔開,因此該等晶粒係更易藉由環境予以冷卻,且更有效地散熱。此一組態提高熱消散之效率並提供一超過先前技術半導體裝置之實質優點。
再參考圖5,可見該等引線106及108在每個長形引線之一端具有晶粒附接墊。舉例而言,引線108終止於晶粒附接墊502中。該晶粒附接墊502係配置於晶粒114之表面區域上使得該兩個組件之該等表面區域在其等各自區域之實質部分上為鄰近。在一實施例中,晶粒114之該表面區域之至少一半係由晶粒附接墊502覆蓋。此一組態容許作出一無線電連接,其增加該封裝100之耐用性。由於晶粒附接墊502及晶粒114之該等表面之鄰近重疊,因此晶粒附接墊502作為熱導熱體及一導電體。此一組態允許該等引線106及108用以散熱,並極大提高散熱之效率。雖然該等圖中僅顯示兩個晶粒,但應瞭解可如此使用任何數目的晶粒。此外,其他晶粒組態模式為可能且此等模式係視為與本發明連用。
圖6係封裝600之一示意性的描繪,其具有一不同於封裝100之組態之電組態。在封裝600中,晶粒304係連接至導體604,其係經放置為藉由連接606與引線108電連通。舉例而言,連接606可為一諸如一金線或一導電帶之有線連接。舉例而言,導體604可為一銅片。導體604係藉由絕緣體602與散熱器102電絕緣,因此確保晶粒304之一終端為非電連接至散熱器102。舉例而言,絕緣體602可為一鋁層。晶粒304之另一終端係藉由導體608連接至散熱器102。晶粒204係電連接至散熱器102且亦係經由導體610連接至引線106。圖7中給出封裝600之該等電連接之更詳細的示意圖。
一比較電腦模式係用以比較封裝100及封裝600之該等散熱能力。在此模式中,電腦模擬係用以預測封裝100之該等晶粒112及113,及封裝600之晶粒204及304之溫度。在此等類比中兩個總成皆係配置在一由鋁製成的溫度為25℃之大型冷卻區塊上,使得該散熱器102係相鄰於該區塊。在此等模擬中,該低熔點晶粒黏合劑係88% Pb、10% Sn、2% Ag,該高熔點晶粒黏合劑係95.5% Pb、2% Sn及2.5% Ag,該等晶粒係矽樹脂二極體,該絕緣體係氧化鋁,且該散熱器係純銅。每個晶片之功率輸入係100W。每個晶粒所達到的溫度係在下表中給出。
不與散熱器102熱接觸的該晶粒304達到161℃,其幾乎係該無線封裝100中該對應晶粒的兩倍之熱。作為一導熱體之該晶粒附接墊之效果可藉由比較晶粒204(有線附接)與晶粒114(經由一導熱晶粒附接墊之無線附接)之溫度而可見。封裝100之該無線組態係經預測優於對應的有線組態提供7℃之溫度優點。
圖7係封裝700之描繪,其具有第一晶粒702及第二晶粒704。在圖7中描繪的該實施例中,晶粒702及704係MOSFET晶粒。如圖7中顯示,引線110係附接至散熱器102,其係鄰近汲極706a及汲極706b。源極708a及708b係電連接至引線106而閘極710a及710b係電連接至引線108。晶粒702及704經由散熱器102連接至共通引線110。
熟習此項技術者瞭解該散熱器102可為一簡單的金屬夾或可為更複雜。舉例而言,該散熱器102可為具有一絕緣表面之金屬夾,其中接觸件及/或導電介面係在該絕緣表面上。如此,一晶粒之一或更多終端可連接至另一晶粒之終端而無需線。
雖然已藉由參考較佳實施例描述本發明,但熟習此項技術者將瞭解在無違本發明之範圍下,可作出多種變更且等效物可用以替代其中的元件以適合特定情況。因此,其意為本發明不受限於揭示為用於實施本發明所預期的最佳模式的該等特定實施例,但本發明將包含附屬請求項之範圍及精神內的所有實施例。
該複數個圖中對應的參考符號表明對應的部分。本文陳述的該等實例闡明本發明之若干實施例,但不應解釋為以任何方式限制本發明之範圍。
100...半導體封裝
102...散熱器
104...環氧模造物
106...引線
108...引線
110...引線
112...晶粒
114...晶粒
202...導電黏合劑
204...晶粒
206...導電黏合劑
208...安裝孔
210...晶粒附接墊
212...端
300...引線框
304...晶粒
400...方法
402...步驟
404...步驟
406...步驟
408...步驟
409...繫桿
410...步驟
411...中間總成
412...步驟
502...晶粒附接墊
600...封裝
602...絕緣體
604...導體
606...連接
608...導體
610...導體
700...封裝
702...第一晶粒
704...第二晶粒
706a...汲極
706b...汲極
708a...源極
708b...源極
710a...閘極
710b...閘極
圖1係一顯示該外殼之內部組件之封裝半導體總成的圖;
圖2係圖1之該封裝之側視圖;
圖3係圖1之該封裝之該等組件之分解圖;
圖4係本發明之一方法之流程圖;
圖5係本發明之一實施例之該等內部組件之示意圖;
圖6係一有線封裝之該等內部組件之示意性輪廓;及
圖7係本發明之另一實施例之輪廓圖。
100...半導體封裝
102...散熱器
104...環氧模造物
106...引線
108...引線
110...引線
112...晶粒
114...晶粒
Claims (14)
- 一種用於將兩個或更多晶粒無線連接至三個外部引線之多晶片模組,其包括:一散熱器,其具有第一及第二表面且包括一導熱且導電材料;第一及第二晶粒,每個晶粒具有至少一在其上表面上的終端及一在其下表面上的終端,該等晶粒附接彼此相鄰並隔開且至該散熱器之該等表面之一者以在該等終端與該散熱器間建立一電連接;一引線框,其包括三個長形引線,每個引線在一端具有一配置於一封裝材料中之晶粒附接墊,且另一端係自該封裝材料延伸而出,其中一第一引線具有連接至該第一晶粒之晶粒附接墊,一第二引線具有連接至該第二晶粒之晶粒附接墊,及一第三引線具有連接至該散熱器之晶粒附接墊,藉此該第一引線提供一外連接至該第一晶粒,該第二引線提供一外連接至該第二晶粒,且該第三引線提供一外連接至該等晶粒之該等下表面上的該等終端之電連接;及該封裝材料,其封裝該等引線、該等晶粒及該散熱器之一部分並保持該散熱器之其他表面曝露以用於將熱量自該等晶粒轉移至周圍環境。
- 如請求項1之模組,其中該模組具有一安裝孔。
- 如請求項1之模組,其中第一及第二晶粒皆係二極體。
- 如請求項1之模組,其中第一及第二晶粒皆係MOSFET晶 粒。
- 一種封裝半導體總成,其包括:一封裝材料,其至少一側係由一導電且導熱散熱器組成;一第一、第二及第三長形引線,每個引線在一端具有一配置於一封裝材料中之晶粒附接墊,且另一端係自該封裝材料延伸而出;一第一及第二二極體,其等兩者係配置於該封裝材料中,彼此相鄰並隔開,且每個晶粒具有至少一在其上表面上的終端及一在其下表面上的終端,該等二極體無線附接至該散熱器之該等表面之一者以建立該等終端與該散熱器間的一電連接;該第一二極體係無線連接至該第一引線之該晶粒附接墊;該第二二極體係無線連接至該第二引線之該晶粒附接墊;及該散熱器係無線連接至該第三引線。
- 如請求項5之總成,其中該第一二極體之該表面區域係鄰近於該第一引線之該晶粒附接墊使得該第一二極體之該表面區域之至少一半係藉由該第一引線之該晶粒附接墊予以覆蓋。
- 如請求項6之總成,其中該第二二極體之該表面區域係鄰近於該第二引線之該晶粒附接墊,使得該第二二極體之該表面區域之至少一半係藉由該第一引線之該晶粒附 接墊予以覆蓋。
- 如請求項5之總成,其中該第一二極體及該第二二極體係串聯連接。
- 如請求項5之總成,其中該第一及第二二極體係藉由一第一焊料無線附接至該散熱器之該等表面之一者,並利用一第二焊料分別連接至第一及第二引線之該等晶粒附接墊,其中該第一焊料及該第二焊料具有至少大約10℃的熔點差異。
- 一種用於將兩個或更多晶粒無線連接至三個外部引線之多晶片模組,其包括:一散熱器,其具有第一及第二表面且包括一導熱且導電材料;串聯連接之第一及第二晶粒,彼此相鄰並隔開,且每個晶粒具有至少一在其上表面上的終端及一在其下表面上的終端,該等晶粒附接至該散熱器之該等表面之一者以在該等終端與該散熱器間建立一電連接;三個長形引線,每個引線在一端具有一配置於一封裝材料中之晶粒附接墊,且另一端係自該封裝材料延伸而出,其中一第一引線具有附接至該第一晶粒之晶粒附接墊,使得熱量係自該第一晶粒轉移至其晶粒附接墊,一第二引線具有附接至該第二晶粒之晶粒附接墊,使得熱量係自該第二晶粒轉移至其晶粒附接墊,及一第三引線具有附接至該散熱器之晶粒附接墊,藉此 該第一引線提供一外連接至該第一晶粒,該第二引線提供一外連接至該第二晶粒,且該第三引線提供一外連接至該等晶粒之該等下表面上的該等終端之電連接;及該封裝材料,其封裝該等引線、該等晶粒及該散熱器之一表面的一部分並保持該散熱器之其他表面曝露以用於將熱量自該等晶粒轉移至周圍環境。
- 如請求項10之總成,其中該散熱器包括銅。
- 如請求項10之總成,其中該第一半導體晶粒及該第二半導體晶粒係不經導線串聯附接。
- 如請求項10之總成,其中第一及第二半導體晶粒皆係二極體。
- 一種用於形成一封裝半導體總成之方法,其包括以下步驟:將一第一導電黏合劑配置於一散熱器上,其具有第一及第二表面且包括一導熱且導電材料;利用該第一導電黏合劑將一第一及第二晶粒安裝至該散熱器,每個晶粒具有至少一在其上表面上的終端及一在其下表面上的終端,該等晶粒藉由該第一導電黏合劑附接至該散熱器之該等表面之一者以在該等終端與該散熱器間建立一電連接;將一第二導電黏合劑配置於第一及第二晶粒之另一表面上;利用該第二導電黏合劑將一具有三個長形引線的引線框安裝至第一及第二晶粒之另一表面,該三個長形引線 包含:一第一引線,其附接至該第一晶粒,一第二引線,其附接至該第二晶粒,及一第三引線,其附接至該散熱器;將第一及第二晶粒及該等長形引線之一部分密封於一環氧模造物中,使得該等長形引線提供一外連接至該第一晶粒、第二晶粒及該散熱器。
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Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101673722A (zh) * | 2008-09-10 | 2010-03-17 | 日月光半导体制造股份有限公司 | 导线架 |
US7977776B2 (en) * | 2009-03-24 | 2011-07-12 | Fairchild Semiconductor Corporation | Multichip discrete package |
US20140070329A1 (en) * | 2012-09-07 | 2014-03-13 | Fairchild Semiconductor Corporation | Wireless module with active and passive components |
KR102543528B1 (ko) * | 2015-12-07 | 2023-06-15 | 현대모비스 주식회사 | 전력 모듈 패키지 및 그 제조방법 |
CN106252321A (zh) * | 2016-09-12 | 2016-12-21 | 陈文彬 | 串联二极管集成装置 |
US9953904B1 (en) * | 2016-10-25 | 2018-04-24 | Nxp Usa, Inc. | Electronic component package with heatsink and multiple electronic components |
KR20190055662A (ko) * | 2017-11-15 | 2019-05-23 | 에스케이하이닉스 주식회사 | 열 재분배 패턴을 포함하는 반도체 패키지 |
CN108807328A (zh) * | 2018-05-02 | 2018-11-13 | 泰州友润电子科技股份有限公司 | 一种便于塑封脱模的多载型220d8引线框架 |
KR102199360B1 (ko) * | 2019-06-20 | 2021-01-06 | 제엠제코(주) | 반도체 패키지 |
KR102172689B1 (ko) * | 2020-02-07 | 2020-11-02 | 제엠제코(주) | 반도체 패키지 및 그 제조방법 |
CN111613609B (zh) * | 2020-05-06 | 2022-08-23 | 广东威特真空电子制造有限公司 | 高压二极管、高压整流电路和变频式磁控管驱动电源 |
KR102228945B1 (ko) * | 2020-05-21 | 2021-03-17 | 제엠제코(주) | 반도체 패키지 및 이의 제조방법 |
CN113394177A (zh) * | 2021-08-18 | 2021-09-14 | 瑞能半导体科技股份有限公司 | 半导体封装结构及其制造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW503541B (en) * | 2001-06-01 | 2002-09-21 | Chino Excel Technology Corp | Packaging method of semiconductor power device and device of the same |
US20040256703A1 (en) * | 2001-11-19 | 2004-12-23 | Chino-Excel Technology Corp. | Wireless bonded semiconductor device and method for packaging the same |
CN2681356Y (zh) * | 2003-12-16 | 2005-02-23 | 伟宏精密工业股份有限公司 | 高功率led组装结构 |
Family Cites Families (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4477827A (en) * | 1981-02-02 | 1984-10-16 | Northern Telecom Limited | Lead frame for leaded semiconductor chip carriers |
US4546374A (en) * | 1981-03-23 | 1985-10-08 | Motorola Inc. | Semiconductor device including plateless package |
US4990987A (en) * | 1986-12-18 | 1991-02-05 | Gte Products Corporation | Over-temperature sensor and protector for semiconductor devices |
JPH0521670A (ja) * | 1991-07-12 | 1993-01-29 | Sumitomo Electric Ind Ltd | ヒートシンク、ヒートシンクの製造方法および製造装置 |
US5200640A (en) * | 1991-08-12 | 1993-04-06 | Electron Power Inc. | Hermetic package having covers and a base providing for direct electrical connection |
US5289344A (en) * | 1992-10-08 | 1994-02-22 | Allegro Microsystems Inc. | Integrated-circuit lead-frame package with failure-resistant ground-lead and heat-sink means |
JPH08139113A (ja) * | 1994-11-09 | 1996-05-31 | Mitsubishi Electric Corp | 樹脂封止型半導体装置 |
US5625227A (en) * | 1995-01-18 | 1997-04-29 | Dell Usa, L.P. | Circuit board-mounted IC package cooling apparatus |
US5859387A (en) * | 1996-11-29 | 1999-01-12 | Allegro Microsystems, Inc. | Semiconductor device leadframe die attach pad having a raised bond pad |
US5926372A (en) * | 1997-12-23 | 1999-07-20 | Ford Global Technologies, Inc. | Power block assembly and method of making same |
US6476481B2 (en) * | 1998-05-05 | 2002-11-05 | International Rectifier Corporation | High current capacity semiconductor device package and lead frame with large area connection posts and modified outline |
US6255722B1 (en) * | 1998-06-11 | 2001-07-03 | International Rectifier Corp. | High current capacity semiconductor device housing |
US6404065B1 (en) * | 1998-07-31 | 2002-06-11 | I-Xys Corporation | Electrically isolated power semiconductor package |
US6040626A (en) * | 1998-09-25 | 2000-03-21 | International Rectifier Corp. | Semiconductor package |
TW388976B (en) * | 1998-10-21 | 2000-05-01 | Siliconware Precision Industries Co Ltd | Semiconductor package with fully exposed heat sink |
US6518885B1 (en) * | 1999-10-14 | 2003-02-11 | Intermec Ip Corp. | Ultra-thin outline package for integrated circuit |
TW451392B (en) * | 2000-05-18 | 2001-08-21 | Siliconix Taiwan Ltd | Leadframe connecting method of power transistor |
JP2001332660A (ja) * | 2000-05-25 | 2001-11-30 | Sanken Electric Co Ltd | 半導体装置及びその製造方法 |
DE10102354C1 (de) * | 2001-01-19 | 2002-08-08 | Infineon Technologies Ag | Halbleiter-Bauelement mit ESD-Schutz |
US6975023B2 (en) * | 2002-09-04 | 2005-12-13 | International Rectifier Corporation | Co-packaged control circuit, transistor and inverted diode |
US20040145037A1 (en) * | 2003-01-24 | 2004-07-29 | Niko Semiconductor Co., Ltd. | Power semiconductor able of fast heat sinking |
JP4056066B2 (ja) * | 2004-03-04 | 2008-03-05 | オーナンバ株式会社 | 太陽電池パネル用端子ボックス |
JP2006165227A (ja) * | 2004-11-15 | 2006-06-22 | Oonanba Kk | 太陽電池パネル用端子ボックス |
US7332808B2 (en) * | 2005-03-30 | 2008-02-19 | Sanyo Electric Co., Ltd. | Semiconductor module and method of manufacturing the same |
WO2007010315A2 (en) * | 2005-07-20 | 2007-01-25 | Infineon Technologies Ag | Leadframe strip and mold apparatus for an electronic component and method of encapsulating an electronic component |
DE102006008632B4 (de) * | 2006-02-21 | 2007-11-15 | Infineon Technologies Ag | Leistungshalbleiterbauteil und Verfahren zu dessen Herstellung |
DE102006012739B3 (de) * | 2006-03-17 | 2007-11-08 | Infineon Technologies Ag | Leistungstransistor und Leistungshalbleiterbauteil |
US7888185B2 (en) * | 2006-08-17 | 2011-02-15 | Micron Technology, Inc. | Semiconductor device assemblies and systems including at least one conductive pathway extending around a side of at least one semiconductor device |
CN201011655Y (zh) * | 2007-01-10 | 2008-01-23 | 上海凯虹科技电子有限公司 | 一种大功率半导体器件的框架 |
US7466016B2 (en) * | 2007-04-07 | 2008-12-16 | Kevin Yang | Bent lead transistor |
-
2007
- 2007-10-09 US US11/869,307 patent/US7586179B2/en active Active
-
2008
- 2008-10-03 KR KR1020107006924A patent/KR101013001B1/ko active IP Right Grant
- 2008-10-03 CN CN2008801105272A patent/CN101821848B/zh not_active Expired - Fee Related
- 2008-10-03 WO PCT/US2008/078666 patent/WO2009048798A1/en active Application Filing
- 2008-10-03 JP JP2010528951A patent/JP4712123B2/ja active Active
- 2008-10-03 DE DE112008002559T patent/DE112008002559T5/de not_active Withdrawn
- 2008-10-09 TW TW097139088A patent/TWI470748B/zh active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW503541B (en) * | 2001-06-01 | 2002-09-21 | Chino Excel Technology Corp | Packaging method of semiconductor power device and device of the same |
US20040256703A1 (en) * | 2001-11-19 | 2004-12-23 | Chino-Excel Technology Corp. | Wireless bonded semiconductor device and method for packaging the same |
CN2681356Y (zh) * | 2003-12-16 | 2005-02-23 | 伟宏精密工业股份有限公司 | 高功率led组装结构 |
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