TWI466196B - 半導體裝置之製造方法、製造程式及製造裝置 - Google Patents

半導體裝置之製造方法、製造程式及製造裝置 Download PDF

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Publication number
TWI466196B
TWI466196B TW100130957A TW100130957A TWI466196B TW I466196 B TWI466196 B TW I466196B TW 100130957 A TW100130957 A TW 100130957A TW 100130957 A TW100130957 A TW 100130957A TW I466196 B TWI466196 B TW I466196B
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Taiwan
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semiconductor wafer
convex portion
manufacturing
substrate
thickness
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TW100130957A
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English (en)
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TW201225189A (en
Inventor
Yasuo Tane
Yukio Katamura
Atsushi Yoshimura
Fumihiro Iwami
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Toshiba Kk
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Publication of TW201225189A publication Critical patent/TW201225189A/zh
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Publication of TWI466196B publication Critical patent/TWI466196B/zh

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    • H—ELECTRICITY
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
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    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
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Description

半導體裝置之製造方法、製造程式及製造裝置
本實施形態一般係關於半導體裝置之製造方法、製造程式及製造裝置。
本申請案享受2010年12月10日申請之日本專利申請號2010-275988號之優先權之利益，該日本專利申請之所有內容在本申請案中援用。
具有NAND型快閃記憶體等之半導體記憶體晶片而被使用之半導體裝置在形成有電路圖案之基板上，搭載有半導體記憶體晶片。如此之半導體裝置中，根據高密度安裝之要求，會有在將複數之半導體記憶體晶片在電路基板上積層成階梯狀之情形。
在將半導體晶片積層成階梯狀之情形，期望在上層半導體晶片中不與下層半導體晶片接觸之區域內提高用以進行電極之連接之晶片強度(即所謂接合強度)。
本發明之實施形態係提高積層成階梯狀之半導體晶片之接合強度。
根據實施形態，半導體裝置之製造方法係在經由切割區域而形成複數之晶片區域之半導體晶圓之晶片區域之第1面形成接著層。沿著切割區域將半導體晶圓分割而將具有晶片區域之半導體晶片單片化，經由接著層將半導體晶片積層成階梯狀。於接著層之形成中，在第1面中、於積層之狀態下不與半導體晶片接觸之第1區域之至少一部分，設置將接著層形成為較與其他半導體晶片接觸之第2區域更厚之凸部。
很據本發明之實施形態，可提高積層成階梯狀之半導體晶片之接合強度。
以下參照附圖，詳細說明實施形態之半導體裝置之製造方法、製造程式及製造裝置。又，本發明非由該實施形態所限定者。
圖1係用以說明實施形態之半導體裝置之製造方法之流程圖。圖2係從表面側觀察半導體晶圓之圖。圖3係沿著圖1所示之A-A線之箭頭指示剖面圖。圖4係顯示實施形態之半導體裝置之製造方法之一步驟之圖。圖5係沿著圖1所示之A-A線之箭頭指示剖面圖，其顯示經過圖4之步驟之狀態之圖。圖6係顯示實施形態之半導體裝置之製造方法之一步驟之圖。圖7係沿著圖1所示之A-A線之箭頭指示剖面圖，其顯示經過圖6之步驟之狀態之圖。圖8係顯示實施形態之半導體裝置之製造方法之一步驟之圖。圖9係沿著圖1所示之A-A線之箭頭指示剖面圖，其顯示經過圖8之步驟之狀態之圖。圖10係從背面側觀察半導體晶圓之圖，其顯示經過圖8之步驟之狀態之圖。圖11係實施形態之半導體裝置之剖面圖。
如圖2及圖3所示，準備於表面側形成有半導體電路等之半導體晶圓1。半導體晶圓1具有設有複數之晶片區域2之表面(第2面)1a及與其相反側之背面(第1面)1b。
於晶片區域2形成有含半導體電路或佈線層之半導體元件部。於複數之晶片區域2間設有切割區域3，沿著該切割區域3將半導體晶圓1切斷，藉此可分別分割複數之晶片區域2而將半導體晶片9單片化。
製造半導體裝置50時，首先如圖4及圖5所示，於半導體晶圓1上從表面1a側沿著切割區域3形成槽4(步驟S1)。半導體晶圓1之槽4例如使用具有對應於切割區域3之寬度之刀厚之刀片5而形成。
槽4之深度設定為比半導體晶圓1之厚度淺，且比單片化之半導體晶片9完成時之厚度深。另，槽4亦可以蝕刻等形成。藉由將如此深度之槽4形成於半導體晶圓1上，而將複數之晶片區域2分別區分成對應於半導體晶片之厚度之狀態。
接著，如圖6及圖7所示，於形成有槽4之半導體晶圓1之表面1a黏貼保護膜6(步驟S2)。保護膜6係在後續步驟中在研磨半導體晶圓1之背面1b時，保護設於晶片區域2之半導體元件部。又，保護膜6係在背面1b之研磨步驟中維持晶片區域2經單片化後之半導體晶圓1之形狀者。作為保護膜6，例如使用具有黏著層之聚對苯二甲酸乙二醇脂(PET)膜片等之樹脂膜片。
接著，如圖8及圖9所示，研磨黏貼有保護膜6之半導體晶圓1之背面1b(步驟S3)。半導體晶圓之背面1b例如如圖8或圖9所示，使用刷磨轉盤7予以機械研磨。
半導體晶圓1之背面1b之研磨步驟係從表面1a側實施直到使所形成之槽4從背面側露出為止。如此，藉由研磨半導體晶圓1之背面1b，將各晶片區域2予以分割，而將半導體晶片9單片化(亦參照圖10)。
於該階段中，藉由以保護膜6予以保持，各半導體晶片9不會拆散而全體維持晶圓形狀。即，在以保護膜6維持半導體晶圓1之形狀下，將半導體晶片9分別單片化。經單片化之半導體晶片9之間存在槽4。
接著，於半導體晶圓1之背面1b塗布接著劑(步驟S4)。接著劑之塗布例如藉由之後詳述之塗布裝置進行。接著，經由保護膜6將半導體晶片9從半導體晶圓1向上推(步驟S5)，將半導體晶片9在形成有電路圖案之基板51上，向與表面1a及背面1b平行之一方向偏移而積層成階梯狀(步驟S6)。然後，將基板51之表面樹脂成型(步驟S7)，從而製造半導體裝置50(亦參照圖11)。
接著，針對將接著劑對半導體晶圓1之背面1b塗布進行詳細說明。如圖12所示，藉由步驟S4所示之接著劑之塗布，而於半導體晶圓1之背面1b形成接著層10。半導體晶片9經由該接著層10而與積層於下層之半導體晶片9接著。
圖13係從半導體晶圓拆散之半導體晶片9之剖面圖。圖14係從背面1b側觀察半導體晶片之圖。如圖13及圖14所示，接著層10之厚度與半導體晶片9之背面1b並非全體一致，於其一部分設有比其他區域較厚地形成之凸部10a。另，接著層10之厚度不僅有膜厚較薄之部分與於凸部10a具有階差之情形，亦有膜厚平滑地變化之情形。即，凸部10a之膜厚只要至少厚於其他部分之膜厚即可。
凸部10a以在半導體晶片9之背面1b側中，位於不與積層於下層之半導體晶片9接觸之區域(第1區域)P1之方式形成。在本實施形態中，以由凸部10a填埋區域P1全體之方式形成。在凸部10a，將接著層形成為厚於不與積層於下層之半導體晶片9接觸之區域(第2區域)P2。又，凸部10a之厚度在積層半導體晶片9之情形中成為與基板51之表面接觸之厚度。
例如半導體晶片9之厚度為20 μm、區域P2中之接著層10之厚度為10 μm之情形中，凸部10a之接著層之厚度為約40 μm(階差之高度為30 μm)。接著層10係藉由將含樹脂與溶媒之接著劑塗布於半導體晶圓1之背面1b並半硬化而形成。另，區域P1全體與凸部10a之形狀亦可不完全一致。因為晶片接合時之荷重或樹脂密封步驟之荷重等會使凸部10a變形，使其成為與區域P1之形狀一致。
另，作為半導體晶片9之單片化之方法，已舉例說明在步驟S3所示之研磨前使用步驟S1所示之刀片5而形成槽(切割)，即所謂預切割，但亦可在研磨後進行切割，即所謂藉由後切割而將半導體晶片9單片化。
接著，針對用以在半導體晶圓1上塗布接著劑之塗布裝置進行說明。圖15係作為半導體製造裝置之塗布裝置之側面圖。圖16係沿著圖15之D-D線之箭頭指示圖。於塗布裝置30中設有基台31、移動部32、載置部33、支持部34、噴出部35等。
基台31呈大致長方體形狀，於其底面設有腳部31a。又，在與底面對向側之面設有底板31b。於移動部32上設有軌道32a、移動塊32b、安裝部32c、驅動部32d等。
軌道32a呈大致矩形之剖面形狀，設於底板31b之上表面。又，軌道32a如圖15所示於底板31b之長度方向延伸，且如圖16所示分別設於基台31之兩端側。
移動塊32b呈大致逆U字狀之剖面形狀，經由未圖示之複數之滾珠而安裝於軌道32a上。且移動塊32b橫跨軌道32a而可在軌道32a上往返自如地移動。安裝部32c呈平板狀，設於移動塊32b之上表面。
於驅動部32d中設有滾珠螺桿部32e、螺母部32f、驅動馬達32g等。滾珠螺桿部32e如圖15所示於底板31b之長度方向延伸設置，其兩端部迴轉自如地安裝於基台31上。螺母部32f如圖16所示設於安裝部32c之下表面，與滾珠螺桿部32e螺合。於滾珠螺桿部32e之一端連接有伺服馬達等之驅動馬達32g。因此，若藉由驅動馬達32g而使滾珠螺桿部32e迴轉驅動，將使安裝部32c在圖15所示之箭頭X方向上往返驅動。
於載置部33中內藏未圖示之靜電夾盤或真空夾盤等，而可於其載置面上載置並保持半導體晶圓1(半導體晶片9)。又，於載置部33中內藏加熱器等之加熱部33a，而可加熱塗布於所保持之半導體晶圓1上之接著劑。另，加熱部33a只要為可加熱接著劑者即可，例如亦可為使熱媒體循環而進行加熱者。又，亦可與載置部33隔離設置加熱部33a。例如亦可在可照射保持於載置部33之半導體晶圓1之位置設置紅外線加熱器等。即，加熱部將塗布於半導體晶圓1上之接著劑加熱並使之半硬化。
支持部34呈大致倒U字狀，以橫跨一對軌道32a之方式從底板31b上立設。又，安裝部34b從支持部34之架設部34a突出而設置。於該安裝部34b上安裝噴出部35。
噴出部35將含樹脂與溶媒之接著劑向半導體晶圓1噴出。噴出部35係藉由噴墨法使接著劑向半導體晶圓1噴出者。噴墨法有藉由加熱產生氣泡而利用膜沸騰現象使液體噴出之「熱感」式，與利用壓電元件之彎曲位移而噴出液體之「壓電式」等，可採用任意方法。另，作為噴出部35，可採用藉由噴墨法噴出液體之已知之噴墨頭。因此對於其詳細構成省略說明。
於噴出部35經由配管35b連接有收納部35a，可向噴出部35供給接著劑。於收納部35a中收納有黏度經調整之接著劑。此情形時，如前述，為抑制噴出噴嘴之堵塞，較佳降低接著劑之25℃之黏度。從收納部35a向噴出部35之接著劑之供給可為利用位能水位等者，亦可為使用泵等送液機構者。
又，設有控制自噴出部35之噴出時序或噴出量等之控制部38。例如在「壓電式」之噴出部35之情形中，改變施加於壓電元件之電壓以控制壓電元件之作動量，從而控制從各壓電元件所對向之噴出噴嘴噴出之接著劑之液滴大小，即接著劑之噴出量。因此，可將使接著劑附著成膜狀時之厚度設為1 μm(微米)以下。又，控制部38控制驅動馬達32g之驅動或從噴出部35噴出接著劑之噴出時序，從而於半導體晶圓1上之期望區域塗布接著劑。
控制部38根據存儲於記憶部39之程式，對塗布裝置實行上述接著劑之塗布。例如亦可在存儲於記憶部39之程式中，記述表示區域P1、P2之範圍之資訊，或表示接著劑之噴出量之資訊。或亦可將表示區域P1、P2或用以形成區域P1、P2之接著劑之噴出量之表格資訊存儲於記憶部39，根據程式之記述由控制部38自記憶部39讀取必要之資訊，而控制驅動馬達32g或噴出部35。
接著層10係將藉由塗布裝置30塗布之接著劑半硬化而形成。例如於區域P1塗布接著劑之情形中，增加接著劑之噴出量，或增加塗布次數，從而可形成比區域P2厚之增大的凸部10a。另，作為凸部10a之形成方法，可為塗布含凸部10a之接著層10全體後使之半硬化，而形成接著層10之共同形成。又，亦可為以區域P2之接著層10之厚度於區域P1及區域P2塗布接著劑並使之半硬化後，於區域P1再次塗布接著劑並使之半硬化而形成凸部10a之分割形成。
例如若為共同形成，則與分割形成相比可削減工數，謀求生產效率之提高。另一方面，即使在因接著劑之黏度低而不易以共同形成之方式形成凸部10a之情形中，只要採用分割形成則凸部10a亦變得容易形成。
如上說明，形成於半導體晶片9之背面1b側之接著層10中，由於在區域P1形成有凸部10a，因此接著層10之厚度增加，區域P1內之半導體晶片9之強度提高。此處，由於在基板51上積層成階梯狀之情形中，區域P1未與下層之半導體晶片9接著，因此與區域P2相比強度易變弱。另一方面，在本實施形態中，由於藉由凸部10a而提高區域P1內之半導體晶片9之強度，故在基板51上積層成階梯狀之情形中，在區域P1不易產生撓曲等變形。
又，在本實施形態中，由於凸部10a與基板51接觸，因此對區域P1施加朝向基板51側之力之情形時，可由接著層10(凸部10a)支持區域P1。因此，可進而確實抑制半導體晶片9產生撓曲等變形。
又，由於填埋基板51與半導體晶片9之間隙之凸部10a係以形成接著層10之步驟共同形成，因此與將半導體晶片9積層於基板51後封塞間隙之情形相比，可減少工數。又亦可謀求作業之容易化。
又，為提高區域P1之強度，無需將半導體晶片9之厚度相對於其他半導體晶片9加厚。其結果，所積層之半導體晶片9之厚度在各個半導體晶片9中可大致設為相等。又，可降低半導體裝置之高度。因此，無需依每個晶圓改變研磨半導體晶圓1之背面1b(步驟S3)之條件。因此可簡化製造步驟。又，可僅以從同一晶圓單片化之晶片製造半導體裝置50。其結果，可提高半導體晶片9之選擇自由度。
另，於半導體晶片9之表面沿著俯視觀察之一邊形成有電極墊40。電極墊40藉由利用金屬導線41之引線接合，而與形成於基板51之連接墊或形成於其他半導體晶片9之電極墊40電性連接。該電極墊40形成於區域P1之背側。在如此之構成中，將金屬導線41引線接合於電極墊40時，朝向基板51側之力易施加於區域P1。但，在本實施形態中，藉由形成於接著層10之凸部10a，而謀求區域P1內之半導體晶片9之強度提高。其結果，於引線接合時亦不易產生半導體晶片9之變形。
又，使用藉由噴墨法塗布接著劑之塗布裝置30，從而可將所要塗布接著劑之區域之形狀或塗布厚度設定為各種各樣，而易形成如形成有凸部10a之接著層10之複雜形狀。
圖17係實施形態之變形例1之半導體裝置之剖面圖。如圖17所示，在本變形例1中，將半導體晶片9積層於基板51上時，以不與基板51接觸之厚度形成凸部10a。如此即使在不使凸部10a與基板51接觸之情形下，只要凸部10a之側面與下層之半導體晶片9之側面接著，則吸收接合時所施加之衝擊之面積增加。其結果，可謀求藉由接著層10之厚度(凸部10a)而提高區域P1內之半導體晶片9之強度。
圖18A係實施形態之變形例2之半導體裝置之剖面圖。圖19係從背面側觀察圖18A所示之半導體裝置所具備之半導體晶片之圖。如圖18A及圖19所示，根據本變形例2，凸部10a不形成於區域P1全體，而形成於區域P1與區域P2之交界部分。即，無需於電極墊40之正下方形成凸部10a。凸部10a與積層於下層之半導體晶片9之側面接觸。藉由對積層於下層之半導體晶片9之接觸及利用凸部10a使接著層10之厚度之增加，可謀求半導體晶片9之強度之提高。又，由於未於區域P1全體形成凸部10a，因此可抑制接著劑之使用量，可有效活用資源。另，亦可以不與基板51接觸之厚度形成凸部10a。
圖18B係實施形態之變形例3之半導體裝置之剖面圖。如圖18B所示，亦可組合圖17與圖18A之構成。即使是如圖18B所示之構造，亦可進而確實抑制半導體晶片9產生彎曲等變形。
圖20係實施形態之變形例4之半導體裝置之剖面圖。圖21係從背面側觀察圖20所示之半導體裝置所具備之半導體晶片之圖。如圖20及圖21所示，在本變形例4中，凸部10a雖形成於區域P1之大致整個區域，但未形成於半導體晶片9之俯視觀察下之外緣部分。如此，不於半導體晶片9之外緣部分形成凸部10a，而易將與基板51接觸之情形之凸部10a之範圍抑制為小於對區域P1之基板51之投影面積。即，從上表面方向觀察，即使將基板51之電極墊40配置於半導體晶片9附近，基板51之電極墊40亦不被接著層10之凸部10a覆蓋。藉此，可抑制基板51之電路設計自由度之降低。
圖22係實施形態之變形例5之半導體裝置之剖面圖。圖23係從背面側觀察圖22所示之半導體裝置所具備之半導體晶片之圖。如圖22及圖23所示，在本變形例5中，凸部10a非形成於區域P1全體，而是沿著半導體晶片9之俯視觀察下之緣部中從與區域P2之交界之位置遠離之緣部而形成凸部10a。又，凸部10a以與基板51接觸之厚度形成。
如此，將凸部10a沿著從與區域P2之交界之位置遠離之緣部形成，且與基板51接觸，從而在對區域P1施加朝向基板51側之力之情形中，可以凸部10a支持區域P1而抑制半導體晶片9之變形，且亦可抑制接著劑之使用量，可有效活用資源。另，凸部10a形成於電極墊40之正下方區域較佳。其結果，以凸部10a支持區域P1，可有效防止半導體晶片9之變形。
進一步之效果或變形例可由相關業者導出。藉此，本發明之更廣泛之態樣不限於如上表述之特定細節及代表性實施形態。因此，在不脫離由隨附之申請專利範圍及其均等物所定義之總括性發明概念之精神或範圍下，得進行各種變更。
1．．．半導體晶圓
1a．．．表面
1b．．．背面
2．．．晶片區域
3．．．切割區域
4．．．槽
5．．．葉片
6．．．保護膜
7．．．包裝平板
9．．．半導體晶片
10．．．接著層
10a．．．凸部
30．．．塗布裝置
31．．．基台
31a．．．腳部
31b．．．底板
32．．．移動部
32a．．．軌道
32b．．．移動塊
32c．．．安裝部
32d．．．驅動部
32e．．．滾珠螺桿部
32f．．．螺母部
32g．．．驅動馬達
33．．．載置部
33a．．．加熱部
34．．．支持部
34a．．．架設部
35．．．噴出部
35a．．．收納部
35b．．．配管
38．．．控制部
39．．．記憶部
40．．．電極墊
41．．．金屬導線
50．．．半導體裝置
51．．．基板
P1．．．區域
P2．．．區域
圖1係用以說明實施形態之半導體裝置之製造方法之流程圖。
圖2係從表面側觀察半導體晶圓之圖。
圖3係沿著圖2所示之A-A線之箭頭指示剖面圖。
圖4係顯示實施形態之半導體裝置之製造方法之一步驟之圖。
圖5係沿著圖2所示之A-A線之箭頭指示剖面圖，係顯示經過圖4之步驟之狀態之圖。
圖6係顯示實施形態之半導體裝置之製造方法之一步驟之圖。
圖7係沿著圖2所示之A-A線之箭頭指示剖面圖，係顯示經過圖6之步驟之狀態之圖。
圖8係顯示實施形態之半導體裝置之製造方法之一步驟之圖。
圖9係沿著圖2所示之A-A線之箭頭指示剖面圖，係顯示經過圖8之步驟之狀態之圖。
圖10係從背面側觀察半導體晶圓之圖，係顯示經過圖8之步驟之狀態之圖。
圖11係實施形態之半導體裝置之剖面圖。
圖12係沿著圖10所示之B-B線之箭頭指示剖面圖，係顯示於背面塗布接著劑之狀態之圖。
圖13係從半導體晶圓拆開之半導體晶片之剖面圖。
圖14係從背面側觀察半導體晶片之圖。
圖15係塗布裝置之側面圖。
圖16係沿著圖15所示之D-D線之箭頭指示圖。
圖17係實施形態之變形例1之半導體裝置之剖面圖。
圖18A係實施形態之變形例2之半導體裝置之剖面圖。
圖18B係實施形態之變形例3之半導體裝置之剖面圖。
圖19係從背面側觀察圖18所示之半導體裝置所具備之半導體晶片之圖。
圖20係實施形態之變形例4之半導體裝置之剖面圖。
圖21係從背面側觀察圖20所示之半導體裝置所具備之半導體晶片之圖。
圖22係實施形態之變形例5之半導體裝置之剖面圖。
圖23係從背面側觀察圖22所示之半導體裝置所具備之半導體晶片之圖。
1a．．．表面
1b．．．背面
9．．．半導體晶片
10．．．接著層
10a．．．凸部
40．．．電極墊
P1、P2．．．區域

Claims (18)

  1. 一種半導體裝置之製造方法，其係於複數之半導體晶片之第1面形成接著層，經由前述接著層將前述半導體晶片於基板上積層成階梯狀，於前述接著層之形成中，在前述第1面中於積層之狀態下不與其他半導體晶片之上表面接觸之第1區域之至少一部分，設置接著層被形成為較與其他半導體晶片接觸之第2區域厚之凸部，前述凸部之接著層之厚度係與前述基板緊密接著之厚度。
  2. 如請求項1之半導體裝置之製造方法，其中前述凸部之側面與前述其他半導體晶片之側面相接。
  3. 如請求項1之半導體裝置之製造方法，其中前述凸部形成於前述第2區域全體。
  4. 如請求項1之半導體裝置之製造方法，其中前述凸部係避開俯視觀察下之半導體晶片之外緣部分而形成。
  5. 如請求項1之半導體裝置之製造方法，其中於前述半導體晶片之前述第1面之相反面即第2面形成電極墊，前述凸部係形成於前述電極墊之正下方區域。
  6. 一種半導體裝置之製造程式，其係控制塗布裝置而製造半導體裝置者，該塗布裝置具備：載置半導體晶片之載置部；及對載置於前述載置部之半導體晶片之第1面噴出接著劑而形成接著層之噴出部；且 在令前述噴出部噴出前述接著劑，使前述半導體晶片於基板上積層成階梯狀之情形中，在前述第1面中、不與其他半導體晶片之上表面接觸之第1區域之至少一部分，形成將前述接著層之厚度較與其他半導體晶片接觸之第2區域更為增厚之凸部。
  7. 如請求項6之半導體裝置之製造程式，其中前述半導體晶片積層於基板上，前述凸部之接著層之厚度係與前述基板密接之厚度。
  8. 如請求項6之半導體裝置之製造程式，其中前述半導體晶片積層於基板上，前述凸部之接著層之厚度係不與前述基板接觸之厚度。
  9. 如請求項6之半導體裝置之製造程式，其中前述凸部之側面與前述其他半導體晶片之側面相接。
  10. 如請求項6之半導體裝置之製造程式，其中前述凸部形成於前述第2區域全體。
  11. 如請求項6之半導體裝置之製造程式，其中前述半導體晶片積層於基板上，前述凸部係避開俯視觀察下之半導體晶片之外緣部分而形成，前述凸部之接著層之厚度係與前述基板密接之厚度。
  12. 如請求項6之半導體裝置之製造程式，其中於前述半導體晶片之前述第1面之相反面即第2面形成電極墊，前述半導體晶片積層於基板上， 前述凸部形成於前述電極墊之正下方區域，前述凸部之接著層之厚度係與前述基板密接之厚度。
  13. 一種半導體裝置之製造裝置，其具備：載置部，係載置半導體晶片；噴出部，係對載置於前述載置部之半導體晶片之第1面噴出接著劑而形成接著層；控制部，係在前述半導體晶片於基板上積層成階梯狀之情形中，以在前述第1面中、不與其他半導體晶片之上表面接觸之第1區域之至少一部分形成將前述接著層之厚度較與其他半導體晶片接觸之第2區域更為增厚之凸部之方式，控制前述噴出部。
  14. 如請求項13之半導體裝置之製造裝置，其中前述半導體晶片積層於基板上，前述凸部之接著層之厚度係與前述基板密接之厚度。
  15. 如請求項13之半導體裝置之製造裝置，其中前述半導體晶片積層於基板上，前述凸部之接著層之厚度係不與前述基板接觸之厚度。
  16. 如請求項13之半導體裝置之製造裝置，其中前述凸部之側面與前述其他半導體晶片之側面相接。
  17. 如請求項13之半導體裝置之製造裝置，其中前述半導體晶片積層於基板上，前述凸部係避開俯視觀察下之半導體晶片之外緣部分而形成， 前述凸部之接著層之厚度係與前述基板密接之厚度。
  18. 如請求項13之半導體裝置之製造裝置，其中於前述半導體晶片之前述第1面之相反面即第2面形成電極墊，前述半導體晶片積層於基板上，前述凸部形成於前述電極墊之正下方區域，前述凸部之接著層之厚度係與前述基板密接之厚度。
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