TWI453819B - SOI wafer manufacturing method and SOI wafer - Google Patents

SOI wafer manufacturing method and SOI wafer Download PDF

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Publication number
TWI453819B
TWI453819B TW098126227A TW98126227A TWI453819B TW I453819 B TWI453819 B TW I453819B TW 098126227 A TW098126227 A TW 098126227A TW 98126227 A TW98126227 A TW 98126227A TW I453819 B TWI453819 B TW I453819B
Authority
TW
Taiwan
Prior art keywords
layer
soi
wafer
soi wafer
thickness
Prior art date
Application number
TW098126227A
Other languages
English (en)
Chinese (zh)
Other versions
TW201025444A (en
Inventor
岡哲史
桑原登
Original Assignee
信越半導體股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 信越半導體股份有限公司 filed Critical 信越半導體股份有限公司
Publication of TW201025444A publication Critical patent/TW201025444A/zh
Application granted granted Critical
Publication of TWI453819B publication Critical patent/TWI453819B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium

Landscapes

  • Recrystallisation Techniques (AREA)
TW098126227A 2008-08-28 2009-08-04 SOI wafer manufacturing method and SOI wafer TWI453819B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008219981A JP4666189B2 (ja) 2008-08-28 2008-08-28 Ｓｏｉウェーハの製造方法

Publications (2)

Publication Number Publication Date
TW201025444A TW201025444A (en) 2010-07-01
TWI453819B true TWI453819B (zh) 2014-09-21

Family

ID=41721000

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098126227A TWI453819B (zh) 2008-08-28 2009-08-04 SOI wafer manufacturing method and SOI wafer

Country Status (7)

Country Link
US (1) US8497187B2 (enExample)
EP (1) EP2320450B1 (enExample)
JP (1) JP4666189B2 (enExample)
KR (1) KR101573812B1 (enExample)
CN (1) CN102119435B (enExample)
TW (1) TWI453819B (enExample)
WO (1) WO2010023816A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI751570B (zh) * 2020-06-02 2022-01-01 合晶科技股份有限公司 半導體基板及其形成方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5447111B2 (ja) * 2010-04-07 2014-03-19 信越半導体株式会社 Ｓｏｉウェーハの熱処理温度を求める方法及びランプ加熱型の気相成長装置における反応炉の温度管理方法
WO2011125305A1 (ja) * 2010-04-08 2011-10-13 信越半導体株式会社 シリコンエピタキシャルウエーハ、シリコンエピタキシャルウエーハの製造方法、及び半導体素子又は集積回路の製造方法
JP6086031B2 (ja) * 2013-05-29 2017-03-01 信越半導体株式会社 貼り合わせウェーハの製造方法
KR102361057B1 (ko) * 2016-06-14 2022-02-08 큐로미스, 인크 전력 및 rf 애플리케이션을 위한 가공된 기판 구조체
JP6824115B2 (ja) * 2017-06-19 2021-02-03 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN107265399A (zh) * 2017-07-03 2017-10-20 上海先进半导体制造股份有限公司 硅片密封腔体的制作方法
CN113764433B (zh) * 2020-06-02 2025-02-07 合晶科技股份有限公司 半导体基板及其形成方法
FR3119849B1 (fr) * 2021-02-12 2024-01-12 Soitec Silicon On Insulator Méthode de configuration pour ajuster les conditions de température d’un procédé d’épitaxie

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1604280A (zh) * 2003-10-01 2005-04-06 株式会社电装 半导体器件、切割半导体器件的切割设备及其切割方法
WO2007083587A1 (ja) * 2006-01-23 2007-07-26 Shin-Etsu Handotai Co., Ltd. Ｓｏｉウエーハの製造方法およびｓｏｉウエーハ
TW200809972A (en) * 2006-05-25 2008-02-16 Sumco Corp Method of producing semiconductor substrate

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
EP1039513A3 (en) * 1999-03-26 2008-11-26 Canon Kabushiki Kaisha Method of producing a SOI wafer
JP2004247610A (ja) 2003-02-14 2004-09-02 Canon Inc 基板の製造方法
EP1806769B1 (en) * 2004-09-13 2013-11-06 Shin-Etsu Handotai Co., Ltd. Soi wafer manufacturing method
JP4587034B2 (ja) * 2005-03-16 2010-11-24 信越半導体株式会社 Ｓｏｉウェーハの設計方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1604280A (zh) * 2003-10-01 2005-04-06 株式会社电装 半导体器件、切割半导体器件的切割设备及其切割方法
WO2007083587A1 (ja) * 2006-01-23 2007-07-26 Shin-Etsu Handotai Co., Ltd. Ｓｏｉウエーハの製造方法およびｓｏｉウエーハ
TW200809972A (en) * 2006-05-25 2008-02-16 Sumco Corp Method of producing semiconductor substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI751570B (zh) * 2020-06-02 2022-01-01 合晶科技股份有限公司 半導體基板及其形成方法

Also Published As

Publication number Publication date
CN102119435A (zh) 2011-07-06
EP2320450A4 (en) 2011-09-28
WO2010023816A1 (ja) 2010-03-04
US8497187B2 (en) 2013-07-30
KR101573812B1 (ko) 2015-12-02
EP2320450B1 (en) 2013-08-28
US20110117727A1 (en) 2011-05-19
CN102119435B (zh) 2014-06-18
KR20110047201A (ko) 2011-05-06
JP2010056311A (ja) 2010-03-11
EP2320450A1 (en) 2011-05-11
JP4666189B2 (ja) 2011-04-06
TW201025444A (en) 2010-07-01

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