FR3119849B1 - Méthode de configuration pour ajuster les conditions de température d’un procédé d’épitaxie - Google Patents

Méthode de configuration pour ajuster les conditions de température d’un procédé d’épitaxie Download PDF

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Publication number
FR3119849B1
FR3119849B1 FR2101375A FR2101375A FR3119849B1 FR 3119849 B1 FR3119849 B1 FR 3119849B1 FR 2101375 A FR2101375 A FR 2101375A FR 2101375 A FR2101375 A FR 2101375A FR 3119849 B1 FR3119849 B1 FR 3119849B1
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Prior art keywords
substrate
temperature conditions
epitaxy process
test
thickness
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FR2101375A
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FR3119849A1 (fr
Inventor
Youngpil Kim
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Soitec SA
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Soitec SA
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Priority to FR2101375A priority Critical patent/FR3119849B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to KR1020237030924A priority patent/KR20230144608A/ko
Priority to JP2023547221A priority patent/JP2024512199A/ja
Priority to US18/546,210 priority patent/US20240120240A1/en
Priority to PCT/EP2022/052002 priority patent/WO2022171458A1/fr
Priority to CN202280014595.9A priority patent/CN116964256A/zh
Priority to EP22702700.0A priority patent/EP4291699A1/fr
Priority to TW111104332A priority patent/TW202234481A/zh
Publication of FR3119849A1 publication Critical patent/FR3119849A1/fr
Application granted granted Critical
Publication of FR3119849B1 publication Critical patent/FR3119849B1/fr
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/16—Controlling or regulating
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

L’invention concerne une méthode de configuration pour un procédé d’épitaxie pour former une couche utile sur un substrat receveur, la méthode étant réalisée avant de traiter le substrat receveur, et comprenant : a) la sélection d’un type de substrat d’essai parmi des tranches à base de silicium : - ayant une épaisseur entre 20 % et 40 % inférieure à une épaisseur habituelle pour un diamètre de substrat donné, et/ou - ayant une concentration en oxygène interstitiel inférieure à 10 ppma, et/ou - comprenant un empilement SOI dont la couche mince de silicium a une épaisseur inférieure ou égale à 300 nm ; b) la fixation de conditions de température initiales définissant des températures à appliquer à (au moins) deux zones du substrat à traiter ; c) la formation de la couche utile sur un substrat d’essai du type sélectionné, en appliquant le procédé d’épitaxie avec les conditions de température initiales ; d) la fixation de nouvelles conditions de température en faisant varier les températures à appliquer aux (au moins) deux zones du substrat ; e) la formation de la couche utile sur un nouveau substrat d’essai du type sélectionné, en appliquant le procédé d’épitaxie avec les nouvelles conditions de température ; f) la comparaison de la quantité de défauts de lignes de glissement mesurés sur les structures d’essai et la sélection des conditions de température générant le moins de défauts. Figure à publier avec l’abrégé : aucune
FR2101375A 2021-02-12 2021-02-12 Méthode de configuration pour ajuster les conditions de température d’un procédé d’épitaxie Active FR3119849B1 (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR2101375A FR3119849B1 (fr) 2021-02-12 2021-02-12 Méthode de configuration pour ajuster les conditions de température d’un procédé d’épitaxie
JP2023547221A JP2024512199A (ja) 2021-02-12 2022-01-28 エピタキシープロセスの温度条件を調節するための設定方法
US18/546,210 US20240120240A1 (en) 2021-02-12 2022-01-28 Setup method for adjusting the temperature conditions of an epitaxy process
PCT/EP2022/052002 WO2022171458A1 (fr) 2021-02-12 2022-01-28 Procédé de réglage permettant de mettre au point les conditions de température d'un procédé d'épitaxie
KR1020237030924A KR20230144608A (ko) 2021-02-12 2022-01-28 에피택시 공정의 온도 조건들을 조정하기 위한 셋업 방법
CN202280014595.9A CN116964256A (zh) 2021-02-12 2022-01-28 用于调节外延工艺的温度条件的设置方法
EP22702700.0A EP4291699A1 (fr) 2021-02-12 2022-01-28 Procédé de réglage permettant de mettre au point les conditions de température d'un procédé d'épitaxie
TW111104332A TW202234481A (zh) 2021-02-12 2022-02-07 用於調整磊晶製程溫度條件之設定方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2101375A FR3119849B1 (fr) 2021-02-12 2021-02-12 Méthode de configuration pour ajuster les conditions de température d’un procédé d’épitaxie
FR2101375 2021-02-12

Publications (2)

Publication Number Publication Date
FR3119849A1 FR3119849A1 (fr) 2022-08-19
FR3119849B1 true FR3119849B1 (fr) 2024-01-12

Family

ID=76807686

Family Applications (1)

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FR2101375A Active FR3119849B1 (fr) 2021-02-12 2021-02-12 Méthode de configuration pour ajuster les conditions de température d’un procédé d’épitaxie

Country Status (8)

Country Link
US (1) US20240120240A1 (fr)
EP (1) EP4291699A1 (fr)
JP (1) JP2024512199A (fr)
KR (1) KR20230144608A (fr)
CN (1) CN116964256A (fr)
FR (1) FR3119849B1 (fr)
TW (1) TW202234481A (fr)
WO (1) WO2022171458A1 (fr)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4666189B2 (ja) * 2008-08-28 2011-04-06 信越半導体株式会社 Ｓｏｉウェーハの製造方法
EP2722423B1 (fr) * 2009-03-25 2017-01-11 Sumco Corporation Procédé de fabrication d'une plaquette de silicium
JP7345245B2 (ja) * 2018-11-13 2023-09-15 信越半導体株式会社 貼り合わせｓｏｉウェーハの製造方法

Also Published As

Publication number Publication date
EP4291699A1 (fr) 2023-12-20
CN116964256A (zh) 2023-10-27
US20240120240A1 (en) 2024-04-11
FR3119849A1 (fr) 2022-08-19
TW202234481A (zh) 2022-09-01
WO2022171458A1 (fr) 2022-08-18
KR20230144608A (ko) 2023-10-16
JP2024512199A (ja) 2024-03-19

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