TWI426545B - 沉積具有改進密度與階梯覆蓋率之非晶系碳膜的方法 - Google Patents
沉積具有改進密度與階梯覆蓋率之非晶系碳膜的方法 Download PDFInfo
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- TWI426545B TWI426545B TW096123596A TW96123596A TWI426545B TW I426545 B TWI426545 B TW I426545B TW 096123596 A TW096123596 A TW 096123596A TW 96123596 A TW96123596 A TW 96123596A TW I426545 B TWI426545 B TW I426545B
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- UMJSCPRVCHMLSP-UHFFFAOYSA-N pyridine Natural products COC1=CC=CN=C1 UMJSCPRVCHMLSP-UHFFFAOYSA-N 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
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- 125000001424 substituent group Chemical group 0.000 description 1
- 230000008093 supporting effect Effects 0.000 description 1
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 1
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Description
本發明之實施例一般係關於積體電路之製造,及特別是非晶系(amorphous)碳層在半導體基板上之沉積。
積體電路已發展成複雜的元件,其在一單一晶片上可包括數百萬計的電晶體、電容器以及電阻器。晶片設計之發展不停地要求更高速的電路系統以及更高的電路密度。對更高速電路且具有更高的電路密度之需求係將負擔加之於用以製造這種積體電路之材料對應的需求上。尤其是,當積體電路元件之尺寸被縮小至次微米尺寸時,其需要使用不僅是低電阻導電材料(例如銅)以增加元件之電性表現,且亦需要使用低介電常數絕緣材料(一般稱為低k材料)。低k材料一般之介電常數係低於4.0。
製造包括僅具有一點或是無表面缺陷或特徵結構變形的低k材料之元件是有困難的。低k介電材料通常為多孔的,且在接下來的製程步驟中容易被刮傷或受損,因此增加在基板表面形成缺陷之可能性。低k材料一般為易碎的,並可能在習知之研磨處理(如:化學機械研磨;CMP)下變形。限制或減少低k材料之表面缺陷及變形的一個解決辦法為在圖案化及蝕刻之前先沉積一硬質光罩(hardmask)在暴露的低k材料上。硬質光罩避免易碎的低k材料之受損及變形。此外,硬質光罩層係作為一蝕刻光罩,並與習知微影(lithographic)技術結合,用以避免在蝕刻的過程中低k材料之移除。
一般地,硬質光罩係為一中間氧化層,例如二氧化矽或氮化矽。然而,某些元件結構已經包括有二氧化矽及/或氮化矽層,例如鑲嵌結構。所以,這種元件結構無法利用二氧化矽或氮化矽硬質光罩來作為蝕刻光罩以形成圖案,因為在硬質光罩及其下方材料之間存在有很小或無蝕刻選擇性,也就是說,硬質光罩之移除將導致對下方層無法接受之損害。為了作為氧化層的蝕刻光罩(例如:二氧化矽或氮化矽),材料必須對那些氧化層具有良好的蝕刻選擇性。含氫之非晶系碳(amorphous hydeogenated carbon)係為針對二氧化矽或氮化矽材料而作為硬質光罩之材料。
含氫之非晶系碳,也稱之為非晶系碳,並且以a
-C:H來代表之,其實質上為缺乏長程結晶序(long-range crystalline order)之碳材料,其可包含實質氫含量,例如在大約10至45原子百分比之等級。因為其所具有之化學惰性、光學透明度、以及良好機械特性,a
-C:H在半導體應用上係用作為硬質光罩材料。雖然可利用各種技術沉積a-C:H膜,但由於成本效率及膜特性之可調性,所以廣泛地使用電漿輔助化學氣相沉積法(Plasma Enhanced Chemical Vapor Deposition,PECVD)。在典型的PECVD製程中,烴來源(例如:夾帶於載氣中的氣相烴或液相烴的蒸氣)係導入PECVD處理室中。電漿引發氣體(一般為氦)亦導入處理室中。電漿接著在處理室中被引發,用以產生激發態的CH-自由基。激發態的CH-自由基係與放置在處理室中基板的表面化學地結合,用以在其上形成所需的a
-C:H膜。
第1A-1E圖說明了在併入作為硬質光罩之a
-C:H層的積體電路製造順序中之不同階段時的基板100之剖視示意圖。基板結構150係代表基板100和形成在基板100上的其他材料層。第1A圖說明具有已為習知形成於其上的材料層102之基板結構150的剖視示意圖。材料層102可以為低k材料及/或氧化物,例如二氧化矽(SiO2
)。
第1B圖描述沉積在第1A圖之基板結構150上的非晶系碳層104。非晶系碳層104係藉由習知之方法(例如藉由PECVD)而形成在基板結構150上。非晶系碳層104之厚度係根據製程之特定階段而可變動。一般來說,非晶系碳層104之厚度係介於約500埃()至約10000埃範圍間。取決於在製造順序中使用的對能量變化靈敏(energy sensitive)之光阻材料108的蝕刻化學性,在形成對能量變化靈敏的光阻材料108之前,在非晶系碳層104上可先形成一可選擇存在的覆蓋層(未顯示)。當其中之圖案被轉移時,可選擇存在的覆蓋層係作為非晶系碳層104之遮蔽物,並且保護非晶系碳層104遠離對能量變化靈敏的光阻材料108。
如描述於第1B圖,對能量變化靈敏的光阻材料108係形成在非晶系碳層104上。對能量變化靈敏的光阻材料108層可以旋轉塗佈在基板上,且厚度為介於約2000埃至約6000埃之間。大部分之對能量變化靈敏的材料係對於波長小於約450奈米之紫外光(UV)靈敏,且在某些應用中係對於波長為245奈米或193奈米的紫外光為靈敏的。
藉由將對能量變化靈敏的光阻材料108透過圖案化裝置(例如:光罩110)而暴露在紫外光130下,以將圖案引入對能量變化靈敏的光阻材料108之層內,並且接著在一適當的顯影劑中使對能量變化靈敏的光阻材料108顯影。在對能量變化靈敏的光阻材料108顯影之後,由孔洞140構成的所需圖案係出現在對能量變化靈敏的光阻材料108上,如第1C圖所示。
接著,如第1D圖所示,利用對能量變化靈敏的光阻材料108來作為光罩,則可將定義在對能量變化靈敏的光阻材料108上之圖案轉移穿過非晶系碳層104。使用適當的化學蝕刻劑以越過對能量變化靈敏的光阻材料108及材料層102而蝕刻非晶系碳層104,以使孔洞140延伸至材料層102的表面。適當的化學蝕刻劑包括臭氧、氧氣或氨電漿。
如第1E圖所示,接著利用非晶系碳層104作為一硬質光罩而將圖案轉移穿過材料層102。在這製程步驟中,使用蝕刻劑以越過非晶系碳層104而選擇性地移除材料層102,例如乾蝕刻,即非反應性電漿蝕刻。在材料層102經圖案化之後,非晶系碳層104可選擇性地由基板100上剝除。在一製造順序之特殊例子中,定義在a
-C:H硬質光罩上的圖案係合併至積體電路之結構,例如一鑲嵌結構。鑲嵌結構一般係用以在積體電路上形成金屬內連線。
使用a
-C:H硬質光罩層之元件製造商需要滿足二關鍵之需求:(1)在下方材料乾蝕刻的期間,硬質光罩之高選擇性,以及(2)為了微影重合(lithographic registration)之準確性,在可見光光譜中的高光學透明度。「乾蝕刻」一詞通常指蝕刻製程中材料並非藉由浸沒於化學溶劑中而溶解,且包括例如反應性離子蝕刻、濺鍍蝕刻、以及氣相蝕刻之方法。進一步,針對硬質光罩層係沉積在具有形態特徵結構(topographic feature)之基板上的應用,對於a
-C:H硬質光罩之額外的需求為硬質光罩層係保形地(conformally)覆蓋該形態特徵結構之全部表面。
往回參照第1A-E圖,為了確保非晶系碳層104在乾蝕刻的期間可適當地保護材料層102,因此重要的是非晶系碳層104係相對於材料層102而具有相對高的蝕刻選擇性或移除率比率。一般來說,在乾蝕刻製程期間,在非晶系碳層104及材料層102之間的蝕刻選擇性係期望為至少約10:1或更高,換言之,材料層102係以快於非晶系碳層104十倍的速度被蝕刻。這樣一來,當藉由乾蝕刻製程形成孔洞140時,由非晶系碳層104形成之硬質光罩層可保護材料層102的區域不會被蝕刻或是受損。
另外,在某些應用中,例如第1B圖中所示之微影處理步驟,係期望硬質光罩對於光學照射(即光波長介於約400奈米及約700奈米)具有高度透明度。對於特定光波長的透明度允許更準確的微影重合,其接著允許光罩110與基板100上特定位置之非常精確的對準。材料對於給定光頻率之透明度一般定量為材料之吸收係數,亦稱為消光係數。舉例來說,對於大約6000埃至7000埃厚的a
-C:H層,在用於微影重合的光頻率下(例如630奈米),a
-C:H層應具有0.12或更小的吸收係數,否則,光罩110可能無法準確地對準。可以藉由調整沉積參數來達到製造具有0.12或更小吸收率之層,該些參數係例如基板溫度或電漿離子能量。
然而,一般在產生擁有高透明度及高蝕刻選擇性之間的a
-C:H膜取捨。具有較好蝕刻選擇性的非晶系碳層一般具有較差的透明度。舉例來說,當把沉積溫度作為調整的因子時,在相對高之溫度(即,大於500℃)下沉積的a
-C:H膜一般具有良好的蝕刻選擇性但卻具有低透明度。降低沉積溫度(特別是低於400℃)可增加a
-C:H膜的透明度,但卻導致對膜較高的蝕刻率且因此具有較小的蝕刻選擇性。
如上所提到的,在某些應用中,可以在具有一下方形態特徵之基板上沉積硬質光罩層,該形態特徵可例如為用以對準圖案化製程的對準鑰匙形物(alignment key)。在這些應用中,亦期望a-C:H層與下方形態特徵為高度保形。第2圖說明了具有特徵結構201及形成於其上之非保形非晶系碳層202的基板200之剖視示意圖。因為非保形非晶系碳層202並未完整覆蓋特徵結構201之側壁204,因此接續的蝕刻製程可能會造成不期望之側壁204腐蝕現象。缺乏由非保形非晶系碳層202完整覆蓋的側壁204也可能導致在非保形碳層202下方的材料之光阻侵蝕(photoresist poisoning),其已知會損壞電子元件。層之保形性(conformality)一般係以沉積在特徵結構之側壁上層的平均厚度與在基板之區域上、或上表面上相同之沉積層的平均厚度之間的比率來量化。
再者,重要的是,硬質光罩層之形成不會在其他方面有害地影響半導體基板。例如,如果,在硬質光罩之形成期間,係產生可能損害基板的大量粒子,或是形成在基板上之元件會被過度地加熱,其導致的問題可能遠超過任何的益處。
因此,需要一種有益於積體電路製造之沉積材料層的方法,其對於氧化物具有良好的蝕刻選擇性、在可見光光譜中具有高光學透明度、可以保形地沉積在具有形態特徵結構之基板上、以及可以在相對低溫下製造而且不會產生大量的粒子。
本發明之實施例係提供一種用以在一基板上沉積一非晶系碳層的方法。根據第一實施例,該方法包括:將一基板放置在一處理室中;將一烴源(hydrocarbon source)導入處理室中;將一重惰性氣體導入處理室中;以及在處理室中產生一電漿。重惰性氣體係選自由氬氣、氪氣、氙氣、及其混合物所組成之群組,並且惰性氣體之莫爾流速係大於烴源之莫爾流速。可包括一後沉積終止步驟,其中烴源及惰性氣體之流動係停止,並且將電漿維持在處理室中一段時間,用以自處理室移除粒子。亦可以在後沉積終止步驟期間將氫氣導入處理室中。
根據第二實施例,該方法包括:將一基板放置在一處理室中;將一烴源導入處理室中;將烴源之稀釋氣體導入處理室中;以及在處理室中產生一電漿。進入處理室之稀釋氣體的莫爾流速為烴源之莫爾流速的約2倍至約40倍之間。在此方法中也可包括類似於第一實施例之後沉積終止步驟。
根據第三實施例,該方法包括:將一基板放置在一處理室中;將一烴源導入處理室中;將烴源之稀釋氣體導入處理室中;在處理室中產生一電漿;以及在處理室中引發電漿之後,將處理室中的壓力維持在約2托(Torr)至8托。非晶系碳層之密度係介於約1.2g/cc至1.8g/cc之間,且非晶系碳層在可見光光譜中的吸收係數可小於約0.10。
發明者已得知不論使用於沉積a
-C:H膜的烴源,a
-C:H膜密度及蝕刻選擇性之間存在有強大的關聯性。第3圖為標繪四種沉積在不同基板上的不同a
-C:H膜301A-D之多個樣本的膜密度及蝕刻選擇性之間的關係圖。蝕刻選擇性係為一因素,且藉由此因素,下方材料則相較於選定的a
-C:H膜而蝕刻,也就是說,為10的蝕刻選擇性意指下方材料以快於a
-C:H膜十倍的速度被移除。每一個膜301A-D係由不同前驅物及製程條件而形成。數據顯示不論前驅物為何,每一個膜之密度與蝕刻選擇性之間實質上為線性相關。這些結果證明即使製程溫度及前驅物實質上不同,但可藉由增加膜密度而達到a
-C:H膜所需的蝕刻選擇性。因此,a
-C:H膜之稠化(densification)可為增進蝕刻選擇性之一種方法。
本發明之實施態樣係包括使用相對大流速的氬或其他重惰性氣體(例如氪或氙)來作為在a
-C:H膜沉積期間的稀釋氣體,用以增加生成膜密度(以及因此增加蝕刻選擇性)、膜的沉積速率、以及膜對於在基板表面上特徵結構的保形性。將重惰性氣體作為大流速稀釋氣體之應用也在沉積製程中增加了烴前驅物的利用效率,以及減少在處理室內表面上不需要的沉積。針對a
-C:H膜之沉積,在PECVD處理室中,氦係用作為工作氣體中之主要的非反應性成分,此乃因為氦容易被離子化,並且因此有益於在處理室中引發電漿而具有低電弧放電之風險。雖然氬有時係用作為載氣以將液相前驅物導入PECVD處理室中,然按照本發明實施態樣之預期並沒有使用非常大量的氬來作為載氣,因此當用作為載氣時沒有因此提供好處。
第3A圖為一基板處理系統(系統1000)之代表示意圖,其可根據本發明之實施例而應用於進行非晶系碳層沉積。適當系統之例子包括可使用DxZTM
處理室之CENTURA系統、PRECISION 5000系統、PRODUCERTM
系統以及PRODUCER SETM
處理室,其皆可由加州聖克拉拉的應用材料有限公司購得。
系統1000包括一處理室1025、一氣體盤1030、一控制單元1010、以及其他硬體構件,例如電源供應器及真空幫浦。使用在本發明中系統之實施例的細節係描述在一共同受讓之美國專利第6,364,954號中,專利名稱為「高溫化學氣相沉積處理室」,公告日為2002年4月2日,於此將其併入以作為參考。
處理室1025一般包括一基板支持架1050,其係用以支撐一基板,例如一半導體基板1090。此基板支持架1050利用一耦合至軸桿1060的位移機械裝置(未顯示)而在處理室1025中以垂直方向移動。取決於製程,在處理之前可加熱半導體基板1090至所需之溫度。基板支持架1050可藉由一嵌入式加熱元件1070而加熱。例如,藉由將來自於一電源供應器1006之電流施加至加熱元件1070,以電阻式加熱基板支持架1050。接著,藉由基板支持架1050來加熱半導體基板1090。一溫度感應器1072,例如一熱電耦,亦嵌設於基板支持架1050中,用以監控基板支持架1050之溫度。量測的溫度係用在一回饋迴路,以針對加熱元件1070而控制電源供應器1006。可以將基板溫度維持或控制在針對特定製程應用所選擇之溫度。
一真空幫浦1002係用以對處理室1025進行抽真空,並且用以維持處理室1025中之適當氣體流速及壓力。製程氣體係透過噴氣頭1020而導入處理室1025中,且噴氣頭1020係位於基板支持架1050上方,並且適以提供一均勻分佈的製程氣體進入處理室1025。噴氣頭1020係連接至氣體盤1030,其控制及提供在不同製程順序步驟中使用的各種製程氣體。製程氣體可包括一烴源以及一電漿引發氣體,下方將會結合示範性的稀釋氬沉積製程的描述而更詳細地敘述之。
氣體盤1030也用於控制及提供各種汽化的液體前驅物。雖然並未顯示,可例如利用液體注入蒸餾器以汽化來自一液體前驅物供應器之液體前驅物,並且在存在有載氣下傳送至處理室1025中。載氣一般為一惰性氣體,例如氮氣、或鈍氣,例如氬或氦。可選擇地,液體前驅物可以藉由一熱及/或真空輔助汽化製程而由一安瓿汽化。
噴氣頭1020及基板支持架1050也可形成一對間隔設置的電極。當在這些電極之間產生電場時,導入處理室1025的製程氣體係點燃成為一電漿1092。一般來說,電場係藉由透過一匹配網絡(未顯示)而將基板支持架1050連接至一單頻或雙頻射頻(Radio Frequency;RF)功率源(未顯示)而產生。可選擇地,射頻功率源及匹配網絡可耦合至噴氣頭1020,或是耦合至噴氣頭1020及基板支持架1050兩者。
PECVD技術係藉由施加至接近基板表面的反應區之電場而促進反應物氣體的激發及/或解難,以產生反應物種之電漿。在電漿中的物種之反應性係降低了發生化學反應所需之能量,而實際上為降低這種PECVD製程所需之溫度。
藉由質流控制器(未顯示)及一控制單元1010(例如一電腦)而可進行流經氣體盤1030之氣體及液體的適當控制及調整。噴氣頭1020允許來自氣體盤1030的製程氣體被均勻地分佈且引入處理室1025中。舉例來說,控制單元1010包括一中央處理單元(Central Processing Unit;CPU)1012、支援電路1014、以及包含相關控制軟體之記憶體1016。控制單元1010係負責基板製程所需數個步驟的自動控制,例如基板傳輸、氣體流控制、液體流控制、溫度控制、處理室真空化等等。當製程氣體混合物噴出噴氣頭1020時,在半導體基板1090之表面1091上會發生烴化合物之電漿輔助熱解離,而導致在半導體基板1090上一非晶系碳層之沉積。
本發明之實施態樣包括a
-C:H層之沉積,其係藉由一製程來進行,該製程包括將一烴源、一電漿引發氣體、及一稀釋氣體引入一處理室,例如上方結合第3A圖所描述的處理室1025。烴源為一或多個烴化合物之混合物。烴源可包括一氣相烴化合物(較佳為丙烯;C3
H6
),及/或包括液相烴化合物之蒸汽及載氣之氣體混合物。電漿引發氣體較佳為氦,因為其容易被離子化,然而也可使用其他氣體,例如氬。稀釋氣體為一種易離子化、相對重及化學惰性氣體。較佳的稀釋氣體包括氬、氪、及氙。較不偏愛比氬輕的氣體,此乃因為其達到有利於增加膜密度、產量、及下面結合第4-9圖所描述的保形性之不穩定性。
此外,本發明之方法也可能有益於利用部份地或完全地摻雜碳烴化合物之衍生物而形成的非晶系碳層。衍生物包括烴化合物之含氮、含氟、含氧、含羥基族、及含硼衍生物,和其氟化衍生物。烴化合物可包含氮或可和含氮氣體(例如氨)一起沉積,或是烴化合物可具有如氟及氧之取代基。由本發明之方法沉積未摻雜的a
-C:H膜所證實之密度、沉積速率及保形性之改善有可能有益於這些製程中之任一者。得益於本發明之實施態樣的製程中所使用之烴化合物及其組成物之摻雜衍生物的更詳細描述可參照在共同受讓之申請於2005年2月24日的美國公開案號第2005/0287771號,專利名稱為「應用於非晶系碳膜之化學氣相沉積的液態前驅物」中,在此將其整體併入以做為參考,且並不與本發明產生不一致。
一般來說,可被包括在烴源中的烴化合物或其衍生物可藉由化學式CA
HB
OC
FD
來表示之,其中A介於1~24之間、B介於0~50之間、C介於0~10之間、D介於0~50之間、以及B及D的總和至少為2。適合的烴化合物之特定例子包括飽和或非飽和脂肪族、飽和或非飽和脂環烴、以及芳香族烴。
舉例來說,脂肪族烴包括:烷類,例如甲烷、乙烷、丙烷、丁烷、戊烷、己烷、庚烷、辛烷、壬烷、癸烷、及其類似物;烯類,例如乙烯、丙烯、丁烯、戊烯、及其類似物;二烯類,例如丁二烯、異戊二烯、戊二烯、己二烯及其類似物;炔類,例如乙炔、乙烯乙炔及其類似物。舉例來說,脂環烴包括:環丙烷、環丁烷、環戊烷、環戊二烯、甲苯、及其類似物。舉例來說,芳香族烴包括:苯、苯乙烯、甲苯、二甲苯、吡啶、乙苯、乙醯苯、苯甲酸甲酯、乙酸苯酯、酚、甲酚、呋喃、及其類似物。另外也可選擇α-松油烯、異丙基甲苯(cymene)、1,1,3,3,-四甲基丁苯、t-丁醚、t-丁基乙烯、甲基-甲基丙烯酸甲酯、及t-丁糠基醚。
烴化合物之適當衍生物的例子為氟化烷、鹵化烯、及鹵化芳香族化合物。氟化烷例如包括:一氟甲烷、二氟甲烷、三氟甲烷、四氟甲烷、一氟乙烷、四氟乙烷、五氟乙烷、六氟乙烷、一氟丙烷、三氟丙烷、五氟丙烷、全氟丙烷、一氟丁烷、三氟丁烷、四氟丁烷、八氟丁烷、二氟丁烷、一氟戊烷、五氟戊烷、四氟己烷、四氟庚烷、六氟庚烷、二氟辛烷、五氟辛烷、二氟四氟辛烷、一氟壬烷、六氟壬烷、二氟癸烷、五氟癸烷、及其類似物。鹵化烯例如包括:一氟乙烯、二氟乙烯、三氟乙烯、四氟乙烯、一氯乙烯、二氯乙烯、三氯乙烯、四氯乙烯、及其類似物。鹵化芳香族化合物包括:一氟苯、二氟苯、四氟苯、六氟苯及其類似物。
PECVD製程係為伴隨氬稀釋之a
-C:H沉積製程。由製程氣體沉積a
-C:H層可藉由將基板溫度維持在約100℃~約450℃之間,並且較佳為約300℃~約450℃之間,以減少生成膜之吸收係數。製程進一步包括將處理室壓力維持在約2托(Torr)~8托之間。將烴源、電漿引發氣體、及稀釋氣體導入處理室,並且引發電漿以開始沉積。更佳地,電漿引發氣體為氦或其他容易離子化的氣體,並且在烴源及稀釋氣體之前導入處理室中,其使得形成一穩定的電漿,並且減少電弧放電的機會。一較佳的烴源為丙烯,然而如上所述者,亦可視所需的膜而使用其他烴化合物,包括夾帶於載氣中的一或多個汽化液相烴化合物。稀釋氣體可為任何至少與氬一樣重的惰性氣體,然而基於經濟上的考量,較佳係為氬。電漿係藉由施加至基板表面區域介於約0.7W/cm2
至約3 W/cm2
之間的功率密度之射頻功率而產生,且較佳為約1.1至2.3 W/cm2
。電極間隔,即基板與噴氣頭間之距離,係介於大約為200密耳(mils)及1000密耳之間。
可利用雙頻射頻系統來產生電漿。相信雙頻可提供通量及離子能量之獨立控制,因為擊中膜表面之離子能量會影響膜密度。高頻電漿控制了電漿密度,且低頻電漿控制了離子擊中晶圓表面之動能。混合之雙頻射頻功率源提供介於約10 MHz~約30 MHz範圍間之高頻功率,例如約13.56 MHz,以及介於約10 KHz至約1 MHz範圍間之低頻功率,例如約350 KHz。當使用雙頻射頻系統來沉積a
-C:H膜時,第二射頻功率與總混合頻率功率之比率係較佳為小於約0.6比1.0(0.6:1)。可根據基板尺寸及使用的設備來修改施加的射頻功率以及所使用之一或多個頻率。
為了使氬稀釋沉積方法之益處最大化,重要的是在PECVD處理室中導入相較於烴化合物的量而為大量的稀釋劑。然而,同樣重要的是,導入處理室之稀釋劑的流速不能太高。藉由增加稀釋劑流速可形成更高密度的a
-C:H層,並產生甚至對a
-C:H膜更高的蝕刻選擇性,但更高的密度亦會導致更高的膜應力。在a
-C:H膜中非常高的膜應力會造成多種嚴重的問題,例如:a
-C:H膜對基板表面不佳的黏著力及/或a
-C:H膜之破裂。然而,加入相較於烴化合物而超出特定莫爾比之氬或其他稀釋劑將會有害地影響膜之特性。因此,有一製程範圍(process window),其中視沉積膜之期望特性而定,進入PECVD處理室的氬稀釋劑之莫爾流速與烴化合物之莫爾流速的比率較佳係維持在約2:1~約40:1之間。針對部分a
-C:H膜之沉積,此比率的最期望範圍係介於約10:1~約14:1之間。
處理300毫米圓形基板之示範沉積製程係使用氦作為電漿引發氣體、丙烯作為烴源、以及氬作為稀釋氣體。氦之流速係介於約200 sccm~約5000 sccm之間、丙烯之流速係介於約300 sccm~約600 sccm之間、以及氬流速係介於約4000 sccm~約10000 sccm之間。單頻射頻功率係介於約800瓦~約1600瓦之間。針對此製程之深入參數,例如處理室壓力、基板溫度等等,皆如上所描述。這些製程參數提供a
-C:H層介於約2000/min~約6000/min範圍間之沉積速率、介於約1.2 g/cc~約1.8 g/cc範圍間之密度、及對633奈米輻射約0.10之吸收係數。熟悉此技藝者在閱讀此處所揭露的技術,則可計算用於產生不同(相較於此處所討論者)密度、吸收係數、或沉積速率之a
-C:H膜的適當製程參數。
表1概述了分別沉積在300毫米圓形基板上的兩種a
-C:H膜之比較結果。膜1係使用習知、以氦為主的沉積製程,也就是現在被視為半導體工業的標準製程。膜2係使用本發明之一實施態樣進行沉積。
如表1所示,膜2係在一實質上較膜1低的溫度,且烴化合物之流速為膜1的1/3之條件下進行沉積。儘管烴的流較低率,但是膜2仍是以膜1的兩倍沉積速度來進行沉積。再者,膜2之特性係優於膜1,也就是說,其具有大幅改善之保形性及非常低的吸收係數。因此,使用此處所述之本發明的方法,相較於習知之a
-C:H層,本發明之非晶系碳層係以較高的沉積速率形成,並且具有較優異的膜特性。
根據本發明之一實施例,本方法重要的益處為能夠增加a
-C:H膜之密度,且因此增加a
-C:H膜之乾蝕刻選擇性。第4圖為說明氬稀釋氣體對a
-C:H膜密度之影響的圖表。該圖描述三個300毫米半導體基板401-403之膜密度。除了在沉積製程期間氬進入處理室之流速以外,三個基板之包括處理室壓力、射頻電漿功率、烴前驅物、及烴流速的製程條件係全部相同。在沉積於基板401之期間,氬流速為每分鐘7200標準立方公分(Standard Cubic Centimeters per Minute;sccm),且分別對基板402及403則增加到8000 sccm及8500 sccm。相較於基板401,基板402、403的膜密度係和在其製程期間中提供之更高的氬流速成比例增加。這表示了非晶系碳層之密度可以藉由加入一相對大流速的氬稀釋劑而增加,而不用改變其他製程變數,例如烴前驅物流速或射頻電漿功率。
重要的是,注意本發明方法之實施態樣係包括使用實質上比引發在PECVD處理室中的電漿或是作為液相前驅物化學藥品的載氣所需還要高流速之氬。例如,當作為液相前驅物之載氣時,氬進入300 mm PECVD處理室之典型流速為約2000 sccm之等級或更少。進入這樣的處理室之氦流速一般甚至是更少。相反的,用於增加非晶系碳膜之密度而作為稀釋氣體的氬之流速係遠遠高了許多,例如大於約7000 sccm。
在膜生長之期間,大概是氦離子十倍重之氬離子在轟擊基板之表面時係更為有效。在沉積期間,更加劇烈的氬離子轟擊有可能產生許多懸空鍵(dangling bonds)以及化學活性區,其中在電漿中的CH-自由基可黏附在該處,以形成一較稠密的膜。更輕之離子,例如氦離子,由於與其較低質量有關之動能缺乏,所以無法產生類似的結果。第5圖說明了稀釋氣體種類對生成膜密度之影響。圖中顯示出在二基板501、502上的膜密度。對於基板501之沉積,係使用氬作為稀釋氣體。針對基板502之沉積,則使用氦。除了稀釋氣體之種類以外,其他所有的製程條件皆保持不變。如第5圖中所示,基板501之a
-C:H密度係實質上高於基板502。
亦判定出可能有益於增加a
-C:H膜之沉積膜密度的其他因素,而可藉此增加乾蝕刻選擇性。這些因素包括:以相對高比率稀釋氣體(不僅為氬)的烴源之稀釋、降低烴源之流速、及降低製程壓力。
增加使用稀釋氣體及/或降低烴源流速係減少了a
-C:H膜之沉積速率,並且藉此允許來自於化學氣相沉積電漿的離子轟擊可更為有效地壓縮成長中的膜。上述現象對於數種稀釋氣體係為事實,包括氦氣及氫氣,雖然這兩種氣體不具備如參照第4圖所述之氬氣及較重之鈍氣的額外稠化能力。較低之烴流速對於膜密度之影響係說明於第6圖中,其中不同的丙烯流速係分別使用於在三個不同基板601-603上a
-C:H膜之沉積。在沉積期間,由於更高的沉積速率及相對應的膜壓縮之缺乏,因此隨著丙烯流速增加,膜密度卻顯示減少。因此,在沉積期間,基板603上之膜具有最低的密度及最高的丙烯流速。
除了稀釋氣體對於烴源之比率外,處理室壓力也對於膜密度具有實質之影響。因為在電漿中之離子能量係直接與鞘電壓(sheath voltage)成比率,並且跨越基板的鞘電壓係隨著壓力的減少而增加,所以膜密度隨著壓力的減少而增加之現象係為可預期的。此係說明於第7圖中,其中不同的製程壓力係分別用於三個不同基板701-703上a
-C:H膜之沉積。由於在更低壓力的電漿中可找到更高能的離子,所以圖中顯示的膜密度係隨著製程壓力的增加而減少。
本發明方法之其他優點為顯著地改善a
-C:H膜之沉積速率。通常,膜密度及沉積速率之間係存在有妥協;標準沉積製程(例如以氦為主)中,可以調整沉積參數以產生較高密度的a
-C:H膜,但值得注意的是卻藉由降低產量而達到。例如,如上方與第6圖關聯之描述,當烴前驅物之流速降低時,可沉積較高密度的a
-C:H膜,但沉積速率也相對地降低。所以,雖然生成膜可具有所需之密度,但是由於在基板上沉積這種膜所需的長製程時間,所以使得這樣的沉積製程無法商業化。
本發明之方法允許同時兼具高密度膜及相對高沉積速率之膜。與標準的氦為主PECVD製程相比較,當以大量的氬作為稀釋氣體時,a
-C:H膜的沉積速率係大幅地增加。如上方與第6圖關聯之描述,烴源之稀釋係導致更高密度之膜以及較低之沉積速率。氬之加入除了可增加膜密度外,亦有效地提升沉積速率。
第8圖說明了在沉積a
-C:H膜之製程期間,藉由導入重惰性氣體(例如氬)來作為高流速稀釋劑以改善沉積速率。比較分別在三個不同基板801-803上的三種稀釋氣體之沉積速率,其中三個基板的稀釋氣體流速皆保持在8000 sccm。氬氣稀釋係用在基板801之沉積,氦氣係用於基板802,及氫氣係用在基板803。三個基板之其他製程參數皆相同。相較於氦氣或氫氣稀釋,氬氣稀釋對於沉積速率產生高於三倍之增加現象。如上方與第4及5圖關聯之描述,容易離子化但較重的氬原子能夠在a
-C:H膜之表面上產生更多反應部位,其係藉由破壞其上的C-H鍵結,因而增加進入之自由基黏附於膜表面之可能性。此外,易離子化氣體(例如氬)之高流速可提供更高電漿密度之提升,並且因此產生更多氣相-CHx
自由基。同時,與氬氣稀釋具關聯性的更具反應性的電漿及更具反應性的膜表面會導致高沉積速率及高膜密度的有益結合。
再者,由於氬氣稀釋而在電漿中存在有更多-CHx
基及在膜表面上包括更具反應性之部位的組合亦可解釋在氬氣稀釋製程中觀察到的化學利用之實質改善。在氬氣稀釋製程中,大部分的烴材料係有效地沉積在基板表面上,而不是沉積在PECVD處理室的所有內側表面而成為不需要的烴殘餘物。在基板上優先的沉積會轉變為主要的產量增益。由於降低了在PECVD處理室中產生的殘餘物,所以相較於氦氣稀釋或氫氣稀釋製程,氬氣稀釋製程的處理室之清潔時間較短。且因為在基板之製程間用在清理處理室的時間較少,所以較短的清理時間係增加了PECVD處理室的產量。再者,來自於PECVD處理室之內表面剝落的烴殘餘物所產生對基板的粒子污染亦可藉由在氬氣稀釋製程之化學利用的改善而大幅地減少;在PECVD處理室之中產生較少的殘餘物同等於在其中進行處理之基板較少的粒子污染。
如第9圖所示,本發明方法之另一個主要的優點為在其他a
-C:H沉積製程之中保形性之增加。第9圖為說明具有特徵結構901及非晶系碳層902形成於其上之基板900的截面示意圖。非晶系碳層902說明了一種使用本發明方法沉積的代表性膜外觀。從品質上來說,非晶系碳層902係高度保形,並且完全地覆蓋住特徵結構901之側壁904及底部903。從量化上來說,非晶系碳層902可具有約20-30%等級的保形性,其中保形性係定義為沉積在側壁904上之非晶系碳層902的平均厚度S與沉積在基板900的上表面905之非晶系碳層902的平均厚度T之比率。往回參照第2圖,非保形非晶系碳層202(其說明了以氫氣或氦氣稀釋的氣體而沉積之膜的一般外觀)一般具有約5%的保形性。將第2圖中的非保形非晶系碳層202之沉積輪廓與第9圖中的非晶系碳層902相比,其提出氬原子之軌道不如氫或氦離子一樣具有方向性之想法。相較於其他稀釋劑,電漿中所存在的氣相物種亦可能與氬氣稀釋不同。這些因素與利用氬氣稀釋製程而在基板表面上-CHx
自由基之較高黏附機率結合,會造成如第9圖中所述之保形性改善。
氬氣稀釋製程之另一優點為可使用較低溫製程以產生具有所需密度及透明度之a
-C:H層。通常地,在沉積期間,較高的基板溫度為用以促進更高密度膜之形成的製程參數。基於上述之原因,氬氣稀釋製程已增加了密度,所以在沉積期間可降低基板溫度,例如約300℃之低溫,並且仍產生所需密度之膜(即,約1.2 g/cc~約1.8 g/cc)。因此,氬氣稀釋製程可產生相對高密度的膜,且其具有低至約0.09的吸收係數。另外,較低的製程溫度通常對於所有基板係為期望的,因為其降低了製程之熱預算(thermal budget),用以保護形成於其上之元件不會出現摻雜物移動(dopant migration)的現象。
在a
-C:H膜之PECVD沉積期間中,由於-CHx
物種之氣相聚合作用,因而在塊材電漿中產生了奈米粒子。這些粒子自然地在電漿中獲得負電荷,並且,因此在沉積期間繼續懸浮在電漿中。然而,當射頻功率關閉並且電漿在處理室中消失時,這些粒子在抽氣期間會因為重力及黏滯拖曳力(viscous drag force)而傾向掉落在基板表面。因此,非常重要的是在抽氣步驟之前,需確保這些粒子由處理室中被趕出。此可以藉由在膜沉積結束後(即,在烴源之流入被停止後),將電漿維持在處理室中一段時間而達成。終止步驟之時間係根據沉積製程之持續期間而變動,因為沉積時間決定了在沉積製程中產生的粒子之尺寸及數量。較長的沉積製程一般係在塊材電漿中產生較多及較大的粒子。後沉積終止步驟之最佳持續時間係介於約5秒及約20秒之間。電漿維持氣體也較佳地為輕的氣體,例如氦或氫,用以減少濺鍍噴氣頭而產生的粒子。在後沉積終止步驟之期間,射頻功率係較佳地被降低至最小的程度,而此程度係為安全地維持穩定的電漿並且避免電弧放電之所需。由於高能電漿可能對基板造成有害之影響,例如蝕刻基板表面或噴氣頭之濺鍍,所以不期望具有更高能的電漿。
此外,在塊材沉積步驟及/或後沉積終止步驟之期間,已發現電漿之氫摻雜可進一步改善粒子之表現。因為氫原子可作為一終止鍵結,而可鈍化存在於電漿中的氣相物種,並且防止該些物種互相鍵結並且成長為不期望產生的奈米粒子。此外,H+
離子可藉由與奈米粒子化學地反應且造成之後的碎斷作用(fragmentation)而可降低尚存的奈米粒子之尺寸。藉此,針對較薄的a
-C:H膜(例如7000),在a
-C:H膜沉積之後,在基板上偵測到的粒子已減少一半以上。針對較厚的a
-C:H膜(例如約1微米),所偵測到的粒子數量已隨著氫摻雜強度之等級而降低。在後沉積終止步驟之較佳實施態樣中,電漿引發氣體之莫爾流速與氫氣之莫爾流速之比率係介於約1:1及約3:1之間。在此製程步驟期間,不期望具有較高的氫氣流速,因為在處理室中較高的氫氣濃度可能會對沉積膜產生不利影響。在塊材沉積製程中,稀釋氣體之莫爾流速與氫氣之莫爾流速的較佳比率係介於約2:1及4:1之間。更高濃度的氫會導致更加激進的粒子減少情形,但亦會降低a
:C-H膜之保形性。
在一例子中,當7000厚的a
-C:H膜沉積於300 mm基材上時,後沉積終止步驟係用以降低污染該基板表面的粒子數量。在沉積製程之後,烴源之流動(在此例中為600 sccm之丙烯)係停止。然而,射頻功率未終止,並且反而降低至在處理室中維持一穩定電漿所需之程度。在此例子中,射頻功率係由約1200瓦降低至約200-500瓦。除了電漿引發氣體(在此例中為氦)之持續流動外,係將氫引入處理室中。氫氣之流速係約1000-2000 sccm,並且氦氣之流速係約4000-6000 sccm。平均上,利用上述後沉積終止製程的300毫米基板表面上所偵測到的大於0.12微米粒子之數量係小於15。相反的,當沒有使用後沉積終止步驟時,基板上所偵測到的大於0.12微米粒子之數量一般係大於約30。
惟本發明雖以較佳實施例說明如上,然其並非用以限定本發明,任何熟習此技術人員,在不脫離本發明的精神和範圍內所作的更動與潤飾,仍應屬本發明的技術範疇。
100...基板
102...材料層
104...非晶系碳層
108...光阻材料
110...光罩
130...紫外光
140...孔洞
150...基板結構
200...基板
201...特徵結構
202...非晶系碳層
204...側壁
301A-D...膜
401-403...基板
501,502...基板
601-603...基板
701-703...基板
801-803...基板
900...基板
901...特徵結構
902...非晶系碳層
903...底部
904...側壁
905...上表面
1000...系統
1002...幫浦
1006...電源供應器
1010...控制單元
1012...中央處理單元/CPU
1014...支援電路
1016...記憶體
1020...噴氣頭
1025...處理室
1030...氣體盤
1050...基板支持架
1060...軸桿
1070...加熱元件
1072...溫度感應器
1090...基板
1091...表面
1092...電漿
S,T...厚度
為讓本發明之上述特徵更明顯易懂,可配合參考實施例說明,其部分乃繪示如附圖式。須注意的是,雖然所附圖式揭露本發明特定實施例,但其並非用以限定本發明之精神與範圍,任何熟習此技藝者,當可作各種之更動與潤飾而得等效實施例。
第1A-1E圖(習知技藝)說明了基板在併入非晶系碳層來作為硬質光罩的積體電路製造順序中不同階段之剖視示意圖。
第2圖(習知技藝)說明了具有形成於其上之特徵結構及非保形非晶系碳層之基板的剖視示意圖。
第3圖為標繪非晶系碳膜之膜密度及蝕刻選擇性間之關係圖。
第3A圖為表示基板處理系統之示意圖,其可根據本發明之實施例而用於實行非晶系碳層沉積。
第4圖為說明氬稀釋氣體對於非晶系碳膜密度之影響的圖示。
第5圖說明了稀釋氣體種類對生成膜密度之影響。
第6圖說明了較低烴流速對膜密度之影響。
第7圖說明了處理室壓力對膜密度之影響。
第8圖說明了沉積速率之改善,其係藉由在沉積非晶系碳膜之同時,引入一重惰性氣體作為高流速稀釋劑。
第9圖說明了具有形成於其上之特徵結構及非晶系碳層的基板之截面示意圖。
為了更清楚表示之,在合適的地方使用相同的元件符號來標出在圖示之間共同的元件。
900...基板
901...特徵結構
902...非晶系碳層
903...底部
904...側壁
905...上表面
S...厚度
T...厚度
Claims (13)
- 一種在一基板上形成一非晶系(amorphous)碳層之方法,其包括:將一基板放置在一基板處理室中;將一烴源(hydrocarbon source)導入該處理室;將一惰性氣體(noble gas)導入該處理室,而該惰性氣體係選自由氬氣、氪氣、氙氣及其混合物所組成之群組,其中該惰性氣體之莫爾流速係大於該烴源之莫爾流速;在該處理室中產生一電漿;在該基板上形成一非晶系碳層;停止該烴源流入該處理室,同時將一電漿維持氣體流入該處理室中,以維持在該處理室中之一電漿;以及將氫氣隨同該電漿維持氣體流入該處理室中,其中該電漿維持氣體之莫爾流速與該氫氣之莫爾流速的比率係介於約1:1至3:1之間。
- 如申請專利範圍第1項所述之方法,其中該惰性氣體之莫爾流速係為該烴源之莫爾流速的約2至40倍大。
- 如申請專利範圍第2項所述之方法,其中該惰性氣體為氬氣。
- 如申請專利範圍第1項所述之方法,其中該電漿維持氣體為氦氣,且其中在停止該烴源流入該處理室之後,氦氣係持續流動進入該處理室約5至20秒。
- 如申請專利範圍第1項所述之方法,其中該烴源係選自由脂肪族烴(aliphatic hydrocarbon)、脂環烴(alicyclic hydrocarbon)、芳香族烴(aromatic hydrocarbon)及其混合物所組成之群組。
- 如申請專利範圍第1項所述之方法,其中該基板處理室係為一電容耦合電漿輔助化學氣相沉積室(capacitively coupled plasma-enhanced CVD chamber)。
- 如申請專利範圍第6項所述之方法,其中在該基板上形成一非晶系碳層的製程期間,該基板處理室中之壓力係為約2托(Torr)至8托。
- 如申請專利範圍第1項所述之方法,其中所形成之該非晶系碳層之密度為約1.2g/cc至1.8g/cc,且該非晶系碳層在可見光光譜中之吸收係數係小於約0.10。
- 如申請專利範圍第8項所述之方法,其更包括在該基板上形成一非晶系碳層之製程期間,加熱該基板至不超過約400℃之溫度。
- 一種在一基板上形成一非晶系碳層之方法,其包括:將一基板放置在一基板處理室中;將一烴源導入該處理室;將該烴源之一稀釋氣體導入該處理室,其中該稀釋氣體之莫爾流速係為該烴源之莫爾流速的約2至40倍;在該處理室中產生一電漿;在該基板上形成一非晶系碳層;停止該烴源流入該處理室,同時將該稀釋氣體流入該處理室中,以維持在該處理室中之一電漿;以及將氫氣隨同該稀釋氣體流入該處理室中,其中該稀釋氣體之莫爾流速與該氫氣之莫爾流速的比率係介於約1:1至3:1之間。
- 如申請專利範圍第10項所述之方法,其中該稀釋氣體為氦氣。
- 一種在一基板上形成一非晶系碳層之方法,其包括:將一基板放置在一基板處理室中;將一烴源導入該處理室;將氬氣導入該處理室,以作為該烴源之一稀釋劑; 在該處理室中產生一電漿;在引發該處理室中之該電漿後,將該處理室中的壓力維持在約2托至8托;在該基板上形成一非晶系碳層;停止該烴源流入該處理室,同時將氬氣流入該處理室中,以維持在該處理室中之一電漿;以及將氫氣隨同氬氣流入該處理室中,其中氬氣之莫爾流速與氫氣之莫爾流速的比率為約2:1至4:1。
- 如申請專利範圍第12項所述之方法,其中氬氣之莫爾流速係為該烴源之莫爾流速的約2至40倍。
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CN101480110A (zh) | 2009-07-08 |
KR100978704B1 (ko) | 2010-08-31 |
US7867578B2 (en) | 2011-01-11 |
WO2008002844A2 (en) | 2008-01-03 |
US20080003824A1 (en) | 2008-01-03 |
CN101480110B (zh) | 2012-12-05 |
KR20080002642A (ko) | 2008-01-04 |
WO2008002844A3 (en) | 2008-08-07 |
KR20100068344A (ko) | 2010-06-23 |
TW200818266A (en) | 2008-04-16 |
US20120208373A1 (en) | 2012-08-16 |
US20110104400A1 (en) | 2011-05-05 |
CN102915925A (zh) | 2013-02-06 |
KR101184072B1 (ko) | 2012-09-19 |
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