TWI413210B - 電子裝置封裝及製造方法 - Google Patents

電子裝置封裝及製造方法 Download PDF

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TWI413210B
TWI413210B TW099118956A TW99118956A TWI413210B TW I413210 B TWI413210 B TW I413210B TW 099118956 A TW099118956 A TW 099118956A TW 99118956 A TW99118956 A TW 99118956A TW I413210 B TWI413210 B TW I413210B
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insulating layer
layer
metal
coplanar
bonding
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TW099118956A
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TW201110267A (en
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Qwai Low
Patrick Variot
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Lsi Corp
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Description

電子裝置封裝及製造方法
本申請案大致上係關於電子裝置封裝及其等之製造方法,且更明確言之,關於具有分離式金屬接合層的裝置封裝。
當前導線框架基礎封裝包括蝕刻於一銅箔中的銅跡線。此等跡線係一積體電路(IC)與外部封裝周邊導線之間之電連接的一部分。由於蝕刻解決方案中的限制,此等銅跡線使封裝在橫向尺寸上的大小增加。該等跡線越長,可干擾傳輸至IC及自IC傳輸之電信號的電寄生效應之概度越大。另外,通常藉由用一抗蝕刻金屬(例如,鎳鈀合金)電鍍銅箔而定義銅跡線的圖案化。然而,此等圖案化方案通常需要多重遮罩及電鍍步驟,此繼而可增加製造成本。
本發明之一實施例係一種製造一電子裝置封裝的方法。該方法包含:用一第一絕緣層塗覆一金屬層的一第一側;及用一第二絕緣層塗覆該金屬層的一第二相對側。該方法進一步包含:圖案化該第一絕緣層以曝露該金屬層之該第一側上的接合位置;及圖案化該第二絕緣層使得該第二相對側上之第二絕緣層的剩餘部分係位於與該第一側上之接合位置恰好相對之處。該方法亦包含:選擇性移除未由該第二相對側上之該第二絕緣層之該等剩餘部分覆蓋的該金屬層之諸部分,以形成分離式共面金屬層。該等分離式共面金屬層包括該等接合位置。該方法進一步包含:選擇性移除該第二絕緣層之該等剩餘部分,藉此曝露該等分離式共面金屬層之第二相對側上的第二接合位置。
另一實施例係一種電子裝置封裝。該封裝包含一電子裝置,該電子裝置係附接至複數個共面分離式金屬接合層中經組態為一裝置安裝部位之一者的一第一側。該裝置亦包含接合至該電子裝置之互連墊並且接合至該等分離式共面金屬接合層中經組態為引線接合墊之其他者的第一側之若干引線。該裝置進一步包括一絕緣層,該絕緣層係與該等分離式共面金屬接合層非共面。該絕緣層中之開口的周邊接觸該等引線所接合之該等共面分離式金屬接合層的周邊。
現在結合隨附圖式參考下列描述。
本發明提供一種製造一電子裝置封裝的方法,其使用一雙側圖案化製程以提供具有由一絕緣層分離之接合位置的分離式金屬層。所揭示之方法消除對於圖案化抗蝕刻金屬的需要,藉此簡化製程並且降低製程成本。該絕緣層對該封裝提供結構穩定性。在該封裝中使用分離式金屬層有助於阻止電寄生效應的發生。
本發明之一實施例係一種製造一電子裝置封裝的方法。圖1呈現製造一電子裝置封裝之一實例方法100的一流程圖。該方法100包含:用一第一絕緣層塗覆一金屬層之一第一側的一步驟110;及用一第二絕緣層塗覆該金屬層之一第二相對側的一步驟115。該方法100亦包含一步驟120:圖案化該第一絕緣層以曝露該金屬層之該第一側上之接合位置。該方法100亦包含一步驟125:圖案化該第二絕緣層使得該第二側上之第二絕緣層的剩餘部分係位於與該金屬層之該第一側上之接合位置恰好相對之處。在一些情形中,用該等絕緣層塗覆該金屬層的兩側(步驟110、115)且接著圖案化該等絕緣層(步驟120、125)。在其他情形中,塗覆該第一側並且圖案化該第一絕緣層(步驟110及120),且接著,塗覆該第二側並且圖案化該第二絕緣層(步驟115及125)。在又其他情形中,直到方法100中之額外步驟(例如,步驟138至步驟155之一者或多者,如下文討論)係經執行時才在步驟125中圖案化該第二絕緣層。
該方法100進一步包含一步驟130:選擇性移除未由該第二相對側上之該第二絕緣層(例如,圖案化之第二絕緣層)之剩餘部分覆蓋的該金屬層之諸部分,以形成分離式共面金屬層。該等分離式共面金屬層包括該等接合位置。該方法100亦包含一步驟135:選擇性移除該第二絕緣層之該等剩餘部分,使得該等分離式共面金屬層之剩餘部分的第二相對側上的第二接合位置曝露。
如圖1中進一步繪示,在一些實施例中,該方法100進一步包括一步驟138:將一金屬電鍍層沈積至該金屬層之第一側之接合位置的至少一者。該金屬電鍍層可促進隨後引線接合至該等接合位置。
如圖1中進一步繪示,在一些實施例中,該方法100進一步包括一步驟140:將一電子裝置附接至一裝置安裝部位。在一些情形中,該金屬層之該第一側上的該等接合位置之至少一者係經組態為一裝置安裝部位。在一些情形中,該電子裝置係附接至沈積於經組態為裝置安裝部位之接合位置上的金屬電鍍層。在其他情形中,該電子裝置係附接至在該裝置安裝部位上的該第一絕緣層之一保留部分。在一些情形中,在步驟140中,將複數個電子裝置各自附接至例如位於足夠大以容納所製造之若干封裝之一金屬層上的不同裝置安裝部位。
在一些實施例中,該方法100亦包括一步驟145:將引線從該電子裝置之互連墊接合至該金屬層之該第一側上的經組態為引線接合墊之接合位置。
該方法100可進一步包括一步驟150:將一絕緣模件沈積於該金屬層之第一側上,使得該模件覆蓋該電子裝置(或該等電子裝置)及其所接合之引線。該方法100亦可包括一步驟155:分離該圖案化之第一絕緣層(例如,在步驟120中所形成),使得該第一絕緣層之分離者各自具有經組態為一裝置安裝部位且在一些情形中亦附接該電子裝置至其處的一接合位置。
如圖1中亦繪示,在一些實施例中,該方法100可包括一步驟160:將焊球接合至該等分離式共面金屬層之第二側的經組態為焊球接合墊之第二接合位置。在步驟165中,可將該等焊球接合至位於一安裝板上的平台墊(landing pad)。或者,在其他實施例中,在步驟170中,將該等第二接合位置之一者或多者組態為直接連接至一安裝板上之平台墊的接合墊,而不存在焊球。
為進一步說明方法100(圖1)之諸態樣,圖2至圖11B呈現本發明之一電子裝置封裝200之製造中所選擇步驟的橫截面圖。在繼續參考圖1的情況下,圖2顯示在分別根據步驟110及步驟115用第一及第二絕緣層220、225來塗覆一金屬層215之第一及第二側205、210之後的封裝200。
在一些情形中,金屬層215包括一銅箔或者為一銅箔,然而可使用其他金屬或金屬合金。在一些情形中,為提供與隨後製造步驟相容的足夠剛性,該金屬層215具有在約2微米至約150微米之一範圍內的一厚度230。
在一些情形中,第一及第二絕緣層220、225包含相同或不同的可圖案化材料,諸如基於環氧樹脂之光阻材料或熟悉此項技術者所熟知的其他光阻材料。熟悉此項技術者應熟知可用於實施步驟110或步驟115以(例如)形成均勻且連續之絕緣層220、225的塗覆製程,諸如旋塗、噴塗或浸塗。
第一絕緣層220之厚度235的選擇使對於一較大厚度以便對封裝200賦予結構穩定性之期望與對於一較小厚度以便不干擾隨後引線接合至金屬層215之第一側205上的特定接合位置之期望達到平衡。舉例而言,在一些情形中,該第一絕緣層220具有在約20微米至約150微米之一範圍內的一厚度235。該第二絕緣層225可具有與該第一絕緣層220相同或不同的厚度。
圖3A顯示在根據步驟120圖案化第一絕緣層220(圖2)以曝露金屬層215之第一側205上之接合位置310之後的封裝200。熟悉此項技術者應熟知可用於根據一預定義互連佈局圖案而在該第一絕緣層220中形成開口315以便曝露接合位置310的圖案化方法。舉例而言,當第一絕緣層220係由一光阻材料組成時,可使該層220之離散部分曝露於電磁輻射(例如,紫外線或可見光)以在該等曝露部分中引起化學反應。取決於所使用之光阻材料的類型(例如,負性光阻或正性光阻),該化學反應可使層220之該等曝露部分與非電磁輻射曝露部分相比較而表現為大體上更容易藉由溶劑沖洗而移除。第一絕緣層220(圖2)之電磁輻射曝露部分或非曝露部分的移除導致該第一絕緣層220之具有開口315在其中的一剩餘圖案化第一絕緣層320。
如圖3A中所示,因為該第一絕緣層220係形成於金屬層215上,故該剩餘圖案化絕緣層320係與該金屬層215非共面。
如圖3A中進一步所示,在步驟120中曝露之接合位置310之一些係經組態為裝置安裝部位325,而其他接合位置310係經組態為引線接合墊330。圖3A亦顯示在根據步驟138將一金屬電鍍層340沈積於接合位置上之後的封裝300。舉例而言,在一些實施例中,該金屬電鍍層340可包括或者為貴金屬,諸如銀或金,或者貴金屬合金(例如,鎳金合金)。舉例而言,在一些實施例中,該金屬電鍍層340可採用熟悉此項技術者應熟知的電沈積製程。如圖3A中所繪示,在一些情形中,該金屬電鍍層340係沈積於經組態為裝置安裝部位325及經組態為引線接合墊330的接合位置310上。
在其他情形中,如圖3B中所示,該金屬電鍍層340係沈積於經組態為引線接合墊330的接合位置310上,且裝置安裝部位325包括絕緣層320的一保留部分350。
圖4顯示在將一電子裝置410附接至金屬層215之第一側205上經組態為一裝置安裝部位325之接合位置310之一者的步驟140之後之圖3A的封裝200。舉例而言,可使用一黏著層415(諸如一環氧樹脂層)將包括或者為一IC的一電子裝置410附接至裝置安裝部位325。該電子裝置410亦可包括互連墊420以促進該裝置410與封裝200之其他裝置之間的電連接,或促進至封裝200外部之裝置的電連接。在其他實施例(未顯示)中,該電子裝置410亦可類似地附接至包括絕緣層320之一保留部分350的一裝置安裝部位325(圖3B)。
圖5顯示在將引線510從電子裝置410之互連墊420接合至第一側205上之經組態為引線接合墊330的接合位置310之步驟145之後的圖4之封裝200。熟悉此項技術者應熟知可用於將引線510(諸如金或銅引線)從互連墊420且通過剩餘絕緣層320中之開口315而接合至引線接合墊330的引線接合製程,諸如楔式接合或黏結接合。剩餘絕緣層320的存在可有利幫助防止配線材料無意地接觸其目標引線接合墊330之外的引線接合墊,因而引起短路。
圖6顯示在將一絕緣模件610沈積於金屬層215之第一側205上使得該模件610覆蓋電子裝置410及覆蓋接合至該裝置410之引線510之步驟150之後的圖5之封裝200。舉例而言,作為步驟150之一部分,可藉由將一絕緣材料(諸如環氧樹脂材料)注射至覆蓋第一側205並且包圍裝置410及其所接合之引線510的一注射模具(未顯示)中而形成絕緣模件610。接著可容許絕緣材料在移除注射模具之前固化,藉此提供該模件610。
圖7顯示在根據步驟125圖案化第二絕緣層225(例如,圖6)之後的圖6之封裝200。可使用與上文在圖3之背景內容中所述的用於根據步驟120圖案化第一絕緣層220(圖1至圖2)之大體上相同的程序來執行步驟125中之圖案化。如圖7中所繪示,在圖案化步驟125之後,在金屬層215之第二側210上的第二絕緣層710之剩餘部分係彼此分離且係位於與步驟120中曝露於第一側205上之接合位置310恰好相對之處。舉例而言,在步驟125中所形成之第二絕緣層710之剩餘部分之每一者的周邊720係與經由步驟120而曝露接合位置310的開口315之周邊730大體上相同。第二絕緣層710之該等剩餘部分係彼此共面,且其等與金屬層215非共面。
如圖1至圖7中所繪示,在一些情形中,可在沈積金屬電鍍層340(步驟138)、附接裝置410(步驟140)、接合引線510(步驟145)或沈積模件610(步驟150)之後於步驟125中圖案化第二絕緣層225。保留未圖案化之第二絕緣層225可有益地在此等步驟138、140、145、150之此等任一者期間對封裝賦予額外結構穩定性,藉此避免金屬層215的變形或損壞。然而,在其他情形中,可在步驟138、140、145、150之一者或全部的任一步驟之前,於步驟125中執行第二絕緣層225的圖案化。在此等情形中,圖案化之第一絕緣層320仍可在步驟138、140、145、150期間對封裝提供所期望之結構穩定性。
圖8顯示在選擇性移除未由第二側210上之第二絕緣層710之剩餘部分所覆蓋的金屬層215(圖7)之部分之步驟130之後的封裝200。
熟悉此項技術者應熟知用於選擇性移除金屬層215之部分的多種製程。舉例而言,可藉由習知化學或電化學蝕刻製程而選擇性移除金屬層215之曝露部分(例如,未由第二絕緣層710之剩餘部分所覆蓋的部分)。
在執行步驟130之後留下的金屬層215(圖7)之剩餘部分對應於複數個分離式共面金屬接合層810。該等分離式共面金屬接合層810可包括第一側205上的接合位置310。如所繪示之,該等共面金屬接合層810之每一者可包括一金屬電鍍層340。接合位置310係藉由圖案化之第一絕緣層320而彼此分離。舉例而言,在一些實施例中,由該圖案化之第一絕緣層320所界定的開口315之至少一邊緣(例如,邊緣820)接觸該等金屬接合層810之一者的接合位置310之至少一邊緣(例如,邊緣830)。在一些情形中,該等開口315之一者的一周邊(例如,周邊730)接觸該等金屬接合層810之一者的一周邊(例如,周邊850)。
共面金屬接合層810係足夠厚以允許引線接合或球形接合至該等層810(例如,金屬電鍍層340)而不使該等金屬接合層810之形狀變形。舉例而言,在一些情形中,複數個分離式共面金屬接合層810各自具有在約100微米至約150微米之一範圍內的一相同厚度230(圖2)。
如圖8中所繪示,吾人期望步驟130之選擇性移除製程使圖案化之第一絕緣層320大體上保留完整(例如,層320之厚度235(圖2)因步驟130之執行而改變不到百分之十)。使該圖案化之第一絕緣層320保持完整可有益地在裝置封裝200之製造期間或在所完成之封裝之隨後處理期間增加該裝置封裝200的結構穩定性。舉例而言,使開口315之一者的一周邊(例如,周邊730)與共面金屬接合層810之一者的一周邊(例如,周邊850)接觸可有助於賦予結構穩定性及有助於保留不同之接合位置310之間的離散分離。
圖9顯示在執行選擇性移除第二絕緣層710之剩餘部分(圖8)使得第二側215上之第二接合位置910曝露之步驟135之後的封裝200。由於已討論之原因,吾人期望步驟135之選擇性移除製程使圖案化之第一絕緣層320大體上保留完整(例如,層320之厚度235因執行步驟135而改變不到百分之十)。
熟悉此項技術者應熟知用於根據步驟135而選擇性移除第二絕緣層710之剩餘部分的多種製程。舉例而言,選擇性移除步驟135可包括熟悉此項技術者所熟知的不同之化學品以蝕刻掉經電磁輻射顯影或未經顯影之光阻。
在一些情形中,曝露之共面金屬接合層810之一陣列可形成一平台柵格陣列(land grid array;LGA)。舉例而言,第二接合位置910之至少一些可經組態為一LGA的接合墊915。在一些情形中,該等第二接合位置910之至少一些可經組態為焊球接合墊915而作為一球柵格陣列(BGA)的一部分。
圖10顯示在分離圖案化之第一絕緣層320使得該層320之分離者各自包括一電子裝置410之步驟155之後的封裝200。熟悉此項技術者應熟知可使用的分離製程,諸如用一鋸子或雷射在第一絕緣層320及任何介入之金屬接合層810或模件610中切割開口1005。
圖10亦顯示在將焊球1010接合至具有經組態為焊球接合墊915之第二接合位置910的共面金屬接合層810之第二側210之步驟160之後的封裝200。舉例而言,在執行步驟160之後,金屬接合層810的一陣列可形成一BGA。所揭示之方法100的一些實施例可消除對於用抗蝕刻金屬來電鍍金屬層215的需要,且因此,可直接將焊球1010接合至金屬層810的剩餘部分。
圖11A顯示在將焊球1010接合至位於一安裝板1120上之平台墊1110之步驟165之後的封裝200。舉例而言,經組態為一BGA的金屬接合層810與焊球1010之一陣列係可經由焊球1010而接合至平台墊1110的一陣列。安裝板1120(例如,一印刷電路板)可具有傳導線路1130,該等傳導線路1130將封裝200之電子裝置410電耦接至安裝板1120上的其他電子裝置(未顯示)或耦接至在該封裝外部的裝置。然而,在其他情形中,可將該等焊球1010首先接合至該等平台墊1110且接著接合至金屬層810之接合墊915。
或者,如圖11B中所示,在分離步驟155之後,可根據步驟170將封裝200直接連接至平台墊1110,而在接合層810之端處上不存在焊球1010(圖11A)。舉例而言,可將經組態為一LGA的金屬接合層810之一陣列直接連接至平台墊1110之一陣列。
本發明之另一實施例係一種電子裝置封裝。在圖1至圖11B之背景內容中所描述的方法之任一者可用於製造本發明之封裝。
如圖9中所示,封裝200可包含一電子裝置410,該電子裝置410係附接至複數個分離式共面金屬接合層810之一者(例如,經組態為一裝置安裝部位325之一者,圖3)的一第一側205。該封裝200進一步包含引線510,該等引線510係接合至裝置410之互連墊420並且接合至該複數個共面金屬接合層810之其他者(例如,經組態為引線接合墊330之該等者,圖3)的第一側205。該封裝200亦包含一絕緣層320,該絕緣層320係與複數個分離式共面金屬接合層810非共面。如在圖8之背景內容中所討論,圖案化之絕緣層320中之開口315的周邊730接觸該等分離式共面金屬接合層810之一者的周邊850。
在一些實施例中,該複數個分離式共面金屬接合層810包括銅(例如一銅箔215之部分)及一含銀或含金之金屬電鍍層340,該絕緣層320包括一基於環氧樹脂之光阻材料,該等引線510包括金或由金組成,且該電子裝置410包括一個或多個IC。
在一些情形中,如圖9中所示,封裝200可進一步包括一模件610,該模件610覆蓋該複數個共面金屬接合層810的第一側205。亦如圖9中所示,層810之第二相對側210並未由模件610覆蓋,藉此容許第二接合位置910用作(例如)封裝200之LGA或BGA中的接合墊915。
圖12呈現與圖9中所呈現之電子裝置封裝類似的電子裝置封裝200的一平面圖(例如,沿圖9中之觀看線12-12使用低放大率觀看)。如圖12中所繪示,封裝200的經組態為引線接合墊330之複數個共面金屬接合層810可包圍裝置410,以便使可連接至裝置410之引線510的數量最大化。然而,為簡潔起見,在圖中僅描繪若干引線510。如所繪示之,經組態為引線接合墊330的接合位置310在形狀上可為大體上圓形,然而若期望則可使用其他形狀(例如,正方形或者矩形)。
與在具有擁有長金屬跡線之導線框架的某些裝置封裝中發現之電寄生效應相比較,封裝200之複數個分離式共面金屬接合層810的使用可有助於減少電寄生效應的發生。在一些實施例中,封裝200之經組態為引線接合墊330之該複數個共面金屬接合層810各自具有小於約10000平方微米的一表面積(例如,在第一側205上)。舉例而言,一正方形形狀之引線接合墊330較佳具有約100微米乘約100微米或者更小的尺寸。舉例而言,一圓形形狀的引線接合墊330較佳具有約32微米或更小的一直徑。在一些較佳實施例中,每一引線接合墊330之第一側205具有在25平方微米至75平方微米之範圍內的一面積。舉例而言,一正方形形狀之引線接合墊330之較佳實施例具有約25微米乘約25微米至約75微米乘約75微米的尺寸。該等接合墊330可具有其他形狀,然而每一接合墊330較佳具有在與上述正方形形狀墊330相同之範圍內的一表面積。舉例而言,一些較佳引線接合墊330每一者具有在約600平方微米至約5600平方微米之一範圍內的一表面積。
如圖10中所繪示,封裝200之一些實施例可進一步包括接合之焊球1010。舉例而言,可存在接合至經組態為焊球接合墊915之複數個分離式共面金屬接合層810之每一者之第二側210的焊球接合墊915之一陣列(例如,一BGA)。(圖10)。
如圖11A及11B中進一步繪示,在封裝200的一些實施例中,該等共面分離式金屬接合層810之至少一些者的第二側210可經組態為接合至封裝200之一安裝板1120(例如,一印刷電路板)上之平台墊1110之一陣列1140的接合墊915。如圖11A中繪示,在一些實施例中,焊球接合墊915之一BGA可安裝至安裝板1120上之平台墊1110的陣列1140。在其他實施例中,如圖11B中繪示,可存在與安裝板1120上之平台墊1110之陣列1140接觸的無焊球之接合墊915的一LGA。
熟悉本申請案相關技術者將瞭解可對所描述之實施例做出其他及進一步增添、刪除、替代及修改。
200...電子裝置封裝
205...金屬層之第一側
210...金屬層之第二側
215...金屬層
220...第一絕緣層
225...第二絕緣層
230...金屬層之厚度
235...第一絕緣層之厚度
310...接合位置
315...開口
320...圖案化之第一絕緣層
325...裝置安裝部位
330...引線接合墊
340...金屬電鍍層
350...絕緣層320的一保留部分
410...電子裝置
415...黏著層
420...互連墊
510...引線
610...絕緣模件
710...第二絕緣層
720...第二絕緣層之剩餘部分的周邊
730...開口的周邊
810...分離式共面金屬接合層
820...開口的邊緣
830...接合位置的邊緣
850...分離式共面金屬接合層的周邊
910...第二接合位置
915...焊球接合墊
1005...開口
1010...焊球
1110...平台墊
1120...安裝板
1130...傳導線路
1140...平台墊之陣列
圖1呈現製造根據本發明之一電子裝置封裝之一實例方法的一流程圖;
圖2至圖11B呈現(例如)由圖1中所呈現之步驟製造的本發明之一電子裝置封裝的製造中所選擇之步驟的橫截面圖;及
圖12呈現本發明之一實例電子裝置封裝(諸如圖9中呈現之電子裝置封裝)的一平面圖。
(無元件符號說明)

Claims (10)

  1. 一種製造一電子裝置封裝的方法,其包含:用一第一絕緣層塗覆一金屬層的上側,該第一絕緣層具有下表面及上表面,該第一絕緣層之下表面及該金屬層之上表面為共面;用一第二絕緣層塗覆該金屬層的下側;圖案化該第一絕緣層使包含開口,以曝露該金屬層之該上側上的接合位置;圖案化該第二絕緣層使得該金屬層之下側上之該第二絕緣層的剩餘部分係位於與該金屬層之上側上之該等接合位置恰好相對之處;選擇性移除未由該金屬層之下側上之該第二絕緣層之該等剩餘部分覆蓋的該金屬層之諸部分,以形成分離式共面金屬接合層,其中該等分離式共面金屬接合層包括該等接合位置;及選擇性移除該第二絕緣層之該等剩餘部分,藉此曝露該等分離式共面金屬接合層之該等下側上的第二接合位置,其中該第一絕緣層之該下表面中的開口的周邊接觸該等分離式共面金屬接合層之該等上表面的周邊。
  2. 如請求項1之方法,其中該圖案化之第一絕緣層係與該等接合位置非共面。
  3. 如請求項1之方法,其中該等接合位置係藉由該圖案化之第一絕緣層而彼此分離。
  4. 如請求項1之方法,其進一步包含以一模件覆蓋於該等 共面分離式金屬接合層之上表面,其中該等共面分離式金屬接合層之下表面並未由該模件覆蓋。
  5. 如請求項1之方法,其進一步包括:分離該圖案化之第一絕緣層,使得該圖案化之第一絕緣層之分離者各自包括經組態為一裝置安裝部位的該等接合位置之至少一者。
  6. 一種電子裝置封裝,其包含:經組態為引線接合墊之複數個分離式共面金屬接合層,該等分離式共面金屬接合層具有下表面及上表面;一絕緣層,其具有一下表面與一上表面,該絕緣層之下表面及該分離式共面金屬接合層之該等上表面共面,其中該絕緣層之該下表面中之開口的周邊接觸該等經組態為引線接合墊之分離式共面金屬接合層的該等上表面的周邊;一電子裝置,其係附接於該等經組態為引線接合墊之分離式共面金屬接合層之上;及引線電接觸該電子裝置之互連墊及該等經組態為引線接合墊之分離式共面金屬接合層。
  7. 如請求項6之裝置封裝,其進一步包括覆蓋該等經組態為引線接合墊之共面分離式金屬接合層之該等上表面的一模件,其中該等經組態為引線接合墊之共面分離式金屬接合層之該等下表面並未由該模件覆蓋。
  8. 如請求項6之裝置封裝,其中該等經組態為引線接合墊之共面分離式金屬接合層包括銅層,該等絕緣層包括基 於環氧樹脂之光阻材料層,該等引線包括金引線或銅引線,且該電子裝置包括一積體電路。
  9. 如請求項6之裝置封裝,其中該等經組態為引線接合墊之複數個分離式共面金屬接合層之每一者之上表面具有在約600平方微米至約5600平方微米之一範圍內的一表面積。
  10. 如請求項7之裝置封裝,其進一步包括一安裝板,且其中該等經組態為引線接合墊之複數個共面分離式金屬接合層之至少一些者的該等下表面接合至該安裝板上之平台墊之一陣列。
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