CN101924038A - 电子器件封装及制造方法 - Google Patents
电子器件封装及制造方法 Download PDFInfo
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- CN101924038A CN101924038A CN2010102027867A CN201010202786A CN101924038A CN 101924038 A CN101924038 A CN 101924038A CN 2010102027867 A CN2010102027867 A CN 2010102027867A CN 201010202786 A CN201010202786 A CN 201010202786A CN 101924038 A CN101924038 A CN 101924038A
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Abstract
本发明涉及电子器件封装及制造方法。一种制造电子器件封装的方法,包括:以第一绝缘层涂覆金属层的第一面;以第二绝缘层涂覆所述金属层的相对的第二面;将所述第一绝缘层图案化以暴露所述金属层的第一面上的接合位置;将所述第二绝缘层图案化以使得所述相对的第二面上的所述第二绝缘层的剩余部分位置正对于所述第一面上的所述接合位置;有选择地去除所述相对的第二面上的未被所述第二绝缘层的剩余部分覆盖的所述金属层的部分,以形成分开的共面金属层,所述分开的共面金属层包括接合位置;以及有选择地去除所述第二绝缘层的所述剩余部分,从而暴露所述分开的共面金属层的所述相对的第二面上的第二接合位置。
Description
技术领域
本申请总的涉及电子器件封装及其制造方法,更具体地,涉及具有分开的金属接合层的器件封装。
背景技术
当前的引线框基础封装(leadframe base packages)包括在铜箔中蚀刻的铜迹线。这些迹线是在集成电路(IC)与外部封装周边引线之间的电连接的一部分。由于蚀刻分辨率的限制,这些铜迹线增加了封装在横向尺寸上的大小。迹线越长,电寄生效应的可能性越大,所述电寄生效应可以干扰从IC发送的和发送到IC的电信号。另外,常常通过将铜箔镀以耐蚀金属(例如,镍-钯合金)来定义铜迹线的图案化。然而,这样的图案化方案常常要求多个掩模和镀的步骤,这又会增加制造成本。
发明内容
本公开的一个实施例是一种制造电子器件封装的方法。所述方法包括:将金属层的第一面涂覆以第一绝缘层;以及将所述金属层的相对的第二面涂覆以第二绝缘层。所述方法进一步包括:将所述第一绝缘层图案化,以暴露所述金属层的第一侧上的接合位置;以及将第二绝缘层图案化以使得相对的第二面上的第二绝缘层的剩余部分位置正对于第一面上的接合位置。所述方法还包括:有选择地去除所述相对的第二面上的未被所述第二绝缘层的剩余部分覆盖的金属层的部分,以形成分开的共面金属层。所述分开的共面金属层包括所述接合位置。所述方法进一步包括:有选择地去除所述第二绝缘层的剩余部分,从而暴露所述分开的共面金属层的所述相对的第二面上的第二接合位置。
另一实施例是一种电子器件封装。所述封装包括:电子器件,其附接到被配置为器件安装位点的、多个共面的分开的金属接合层之一的第一面。所述器件还包括:导线,其被接合到电子器件的互连焊盘,并接合到被配置为导线接合焊盘的、所述分开的共面金属接合层中其他的分开的共面金属接合层的第一面。所述器件进一步包括:与所述分开的共面金属接合层不共面的绝缘层。所述绝缘层中的开口的周界与所述导线所接合的所述共面的分开的金属接合层的周界接触。
附图说明
现在参考下面的结合附图的描述,在附图中:
图1示出了根据本公开的制造电子器件封装的示例方法的流程图;
图2-11B示出了本公开的(例如,如通过图1所示的步骤制造的)电子器件封装的制造过程中的选定的步骤的截面图;以及
图12示出了本公开的示例电子器件封装(诸如图9中示出的电子器件封装)的平面图。
具体实施方式
本公开提供了一种制造电子器件封装的方法,其利用双面图案化工艺来提供具有被绝缘层分开的接合位置的分开的金属层。所公开的方法使得不需要对耐蚀金属进行图案化,从而简化并降低了制造工艺的成本。所述绝缘层对封装提供结构稳定性。在封装中利用分开的金属层有助于阻止电寄生效应的发生。
本公开的一个实施例是一种制造电子器件封装的方法。图1示出了制造电子器件封装的示例方法100的流程图。所述方法100包括:步骤110,将金属层的第一面涂覆以第一绝缘层;以及步骤115,将所述金属层的相对的第二面涂覆以第二绝缘层。所述方法100还包括:步骤120,将第一绝缘层图案化以暴露所述金属层的第一面上的接合位置。所述方法100还包括:步骤125,将第二绝缘层图案化以使得第二面上的第二绝缘层的剩余部分位置正对于所述金属层的第一面上的所述接合位置。在有些情况下,金属层的两面都涂覆以绝缘层(步骤110、115),并然后将绝缘层图案化(步骤120、125)。在其它情况下,第一面被涂敷并且第一绝缘层被图案化(步骤110和120),并然后,第二面被涂敷并且第二绝缘层被图案化(步骤115和125)。在其他情况下,在步骤125中不将第二绝缘层图案化,直到执行方法100中的附加步骤(例如,如下所述的步骤138至155中的一个或更多个)。
方法100进一步包括:步骤130,有选择地去除相对的第二面上的未被第二绝缘层的剩余部分覆盖的金属层的部分,以形成分开的共面金属层。所述分开的共面金属层包括所述接合位置。方法100还包括:步骤135,有选择地去除第二绝缘层的所述剩余部分,以使得暴露所述分开的共面金属层的剩余部分的相对的第二面上的第二接合位置。
如图1中进一步所示的,在一些实施例中,方法100进一步包括:步骤138,将金属镀层淀积到金属层的第一面上的所述接合位置中的至少一个。所述金属镀层可以促进后续的到所述接合位置的导线接合。
如图1中进一步所示的,在一些实施例中,方法100进一步包括:步骤140,将电子器件附接到器件安装位点。在有些情况下,所述金属层的第一面上的接合位置中的至少一个被配置作为器件安装位点。在一些情况下,电子器件被附接到淀积在被配置作为器件安装位点的接合位置上的金属镀层。在其它情况下,电子器件被附接到器件安装位点上的第一绝缘层的保留部分。在有些情况下,在步骤140中,多个电子器件每一附接到不同的一个器件安装位点,例如,位于足够大到适合制造数个封装的金属层上的器件安装位点。
在一些实施例中,方法100还包括:步骤145,将导线从电子器件的互连焊盘接合到被配置作为导线接合焊盘的金属层的第一面上的接合位置。
方法100可以进一步包括:步骤150,将绝缘模淀积在金属层的第一面上,以使得所述模覆盖所述电子器件(或复数个器件)及其接合的导线。方法100还可以包括:步骤155,将图案化的第一绝缘层(例如,在步骤120中形成的)分开,以使得所述第一绝缘层的被分开的一些每一都具有被配置作为器件安装位点的接合位置,并且在有些情况下,还具有附连于其的电子器件。
如也在图1中所示的,在一些实施例中,方法100可以包括:步骤160,将焊料球接合到被配置作为焊料球接合焊盘的、所述分开的共面金属层的第二面的第二接合位置。在步骤165中,焊料球可以被接合到位于安装板上的落着焊盘(landing pad)。替代地,在其他实施例中,在步骤170中,一个或更多个第二接合位置被配置作为被直接连接到安装板上的落着焊盘的接合焊盘,而不存在焊料球。
为了进一步说明方法100(图1)的诸方面,图2-11B示出了在本公开的电子器件封装200的制造中的选定步骤的截面图。继续参考图1,图2示出了在分别根据步骤110和115将金属层215的第一和第二面205、210涂覆以第一和第二绝缘层220、225之后的封装200。
在有些情况下,金属层215包括铜箔或者是铜箔,但是也可以使用其他的金属或金属合金。在有些情况下,为提供充分的刚性以与后续的制造步骤兼容,金属层215具有在大约2至150微米的范围中的厚度230。
在有些情况下,第一和第二绝缘层220、225包括相同或者不同的可图案化的材料,诸如为本领域技术人员所熟知的基于环氧树脂的光致抗蚀剂材料或其它光致抗蚀剂材料。本领域技术人员将熟悉用以形成均匀一致且连续的绝缘层220、225的可用于实现步骤110或115的涂覆工艺,诸如旋涂、喷涂或浸涂。
第一绝缘层220的厚度235的选择对对于更大厚度以给予封装200以结构稳定性的希望与对更小的厚度以便不干扰后续的将导线接合至金属层215的第一面205上的特定接合位置的希望进行平衡。例如,在有些情况下,第一绝缘层220具有在大约20至150微米的范围中的厚度235。第二绝缘层225可以具有与第一绝缘层220相同或不同的厚度。
图3A示出了在根据步骤120将第一绝缘层220(图2)图案化以暴露金属层215的第一面205上的接合位置310之后的封装200。本领域技术人员将熟悉可用于根据预先确定的互连布局图案在第一绝缘层220中形成开口315的图案化方法。例如,当第一绝缘层220由光致抗蚀剂材料构成时,可以将层220的分立的部分暴露于电磁辐射(例如,紫外线或可见光),以在所暴露的部分中引起化学反应。根据所使用的光致抗蚀剂材料的类型(例如,负性或正性光致抗蚀剂),化学反应可以使层220的暴露的部分呈现得与未暴露于电磁辐射的部分相比或多或少容易通过溶剂洗涤去除。第一绝缘层220(图2)的暴露于电磁辐射的或未暴露的部分的去除导致第一绝缘层220的其中具有开口315的剩余的图案化的第一绝缘层320。
如图3A中所示的,由于在金属层215上形成了第一绝缘层220,因此剩余的图案化的绝缘层320是与金属层215不共面的。
如图3A中进一步所示的,在步骤120中暴露的接合位置310中的一些被配置作为器件安装位点325,同时其它接合位置310被配置作为导线接合焊盘330。图3A还示出了在根据步骤138将金属镀层340淀积在接合位置上之后的封装300。例如,在一些实施例中,金属镀层340可以包括或者是贵金属(诸如银或金)或者贵金属合金(例如,镍金合金)。例如,在一些实施例中,金属镀层340可以是电沉积的,本领域技术人员将熟知其工艺。如图3A中所示的,在有些情况下,金属镀层340淀积在被配置作为器件安装位点325和作为导线接合焊盘330的接合位置310上。
在其它情况下,如图3B所示,金属镀层340沉淀在被配置作为导线接合焊盘330的接合位置310上,并且器件安装位点325包括绝缘层320的保留部分350。
图4示出了在将电子器件410附接到被配置作为器件安装位点325的、金属层215的第一面205上的接合位置310之一的步骤140之后的图3A的封装200。例如,可以利用粘合层415(诸如环氧树脂层)将电子器件410(其包括或者是IC)附接到器件安装位点325。电子器件410还可以包括互连焊盘420,以促进器件410和封装200的其它器件之间的电连接或者到在封装200外的器件的电连接。在其他实施例(未示出)中,电子器件410可以被类似地附接到包括绝缘层320的保留部分350的器件安装位点325(图3B)。
图5示出了在将导线510从电子器件410的互连焊盘420接合到被配置作为导线接合焊盘330的、第一面205上的接合位置310的步骤145之后的图4的封装200。本领域技术人员将熟悉可用于将导线510(诸如金线或铜线)从互连焊盘420并通过剩余绝缘层320中的开口315接合到导线接合焊盘330的导线接合工艺,诸如楔接合或接合剂接合(wedge or bond bonding)。剩余绝缘层320的存在可以有利地帮助防止布线材料不注意地接触超过其目标导线接合焊盘330并从而导致短路。
图6示出了在将绝缘模610淀积在金属层215的第一面205上以使得模610覆盖电子器件410和接合到器件410的导线510的步骤150之后的图5封装200。例如,可以作为步骤150的一部分,通过将绝缘材料(诸如环氧树脂材料)注入到覆盖第一面205且围绕器件410及其接合导线510的注塑模具(未示出)中来形成绝缘模610。然后可以允许绝缘材料在去除注塑模具之前固化,从而提供模610。
图7示出了在根据步骤125将第二绝缘层225(例如,图6)图案化之后的图6的封装200。可以利用基本上与用于根据步骤120将第一绝缘层205图案化(图1-2)的如上在图3的上下文中所述的相同的过程执行步骤125中的图案化。如图7中所示的,在图案化步骤125之后,金属层215的第二面210上的第二绝缘层710的剩余部分被彼此分开,并且位置正对于在步骤120中在第一面205上暴露的接合位置310。例如,在步骤125中形成的第二绝缘层710的剩余部分中的每一个的周界720基本上与经由步骤120暴露接合位置310的开口315的周界730相同。第二绝缘层710的剩余部分彼此共面,且与金属层215不共面。
如图1-7中所示的,在有些情况下,可以在淀积了金属镀层340(步骤138)、附接了器件410(步骤140)、接合了导线510(步骤145)或者淀积了模610(步骤150)之后,在步骤125中将第二绝缘层225图案化。保留未图案化的第二绝缘层225可以在这些步骤138、140、145、150中的任意步骤的期间有利地对封装给予附加的结构稳定性,从而避免变形或对金属层215的破坏。然而,在其它情况下,可以在步骤138、140、145、150中的任一个或全部之前在步骤125中执行第二绝缘层225的图案化。在此情况下,在步骤138、140、145、150期间,图案化的第一绝缘层320仍可以向封装提供期望的结构稳定性。
图8示出了在有选择地去除第二面210上的未被第二绝缘层710的剩余部分覆盖的金属层215的部分(图7)的步骤130之后的封装200。
本领域技术人员将熟悉多种用于有选择地去除部分金属层215的工艺。例如,可以通过传统的化学或电化学蚀刻工艺来有选择地去除金属层215的暴露部分(例如,未被第二绝缘层710的剩余部分覆盖的部分)。
在执行步骤130之后留下的金属层215的剩余部分对应于多个分开的共面金属接合层810。所述分开的共面金属接合层810可以包括第一面205上的接合位置310。如所示的,共面金属接合层810中的每一个可以包括金属镀层340。接合位置310通过图案化的第一绝缘层320而彼此分开。例如,在一些实施例中,通过图案化的第一绝缘层320定义的开口315中的一个开口的至少一个边缘(例如,边缘820)接触所述金属接合层810中的一个金属接合层的接合位置310的至少一个边缘(例如,边缘830)。在有些情况下,开口315中的一个开口的周界(例如,周界730)接触金属接合层810中的一个金属接合层的周界(例如,周界850)。
共面金属接合层810足够厚,以允许到层810(例如,金属镀层340)的导线接合或球接合而不使金属接合层810的形状变形。例如,在有些情况下,所述多个分开的共面金属接合层810每一都具有在大约100至150微米范围中的相同的厚度230(图2)。
如图8中所示的,对于步骤130的有选择的去除工艺,期望保留所述图案化的第一绝缘层320基本上原样的(例如,通过步骤130的表现,层320的厚度235(图2)被改变小于10个百分比)。保持图案化的第一绝缘层320原封不动可以有利地增加器件封装200在其制造期间或在所完成的封装的后续处理期间的结构稳定性。例如,将开口315中的一个开口的周界(例如,周界730)与共面金属接合层810中的一个金属接合层的周界(例如,周界850)接触有助于给予结构稳定性并且有助于保持不同接合位置310之间的分立的分离。
图9示出了在执行有选择地去除第二绝缘层710的剩余部分(图8)以使得第二面215上的第二接合位置910暴露的步骤135之后的封装200。出于已经论述的原因,对于步骤135的有选择的去除工艺,期望保留图案化的第一绝缘层320基本上原样的(例如,通过执行步骤135,层320的厚度235被改变小于10个百分比)。
本领域技术人员将熟悉用于根据步骤135有选择地去除第二绝缘层710的剩余部分的多种工艺。例如,有选择的去除步骤135可以包括本领域技术人员熟知的用于将电磁辐射显影了的或未显影的光致抗蚀剂蚀刻掉的不同化学制剂。
在有些情况下,所暴露的共面金属接合层810的阵列可以形成岸面栅格阵列(LGA)。例如,至少一些第二接合位置910可以被配置作为LGA的接合焊盘915。在其它情况下,至少一些第二接合位置910可以被配置作为焊料球接合焊盘915,其作为球栅阵列(BGA)的一部分。
图10示出了在将图案化的第一绝缘层320分开以使得层320的被分开的一些每一都包括电子器件410的步骤155之后的封装200。本领域技术人员将熟悉能在第一绝缘层320以及任何插入的金属接合层810或模610中使用的分离工艺,诸如,利用锯子或激光切削开口1005。
图10还示出了在将焊料球1010接合到具有第二接合位置910(其被配置作为焊料球接合焊盘915)的共面金属接合层810的第二面210的步骤160之后的封装200。例如,在执行步骤160之后,金属接合层810的阵列可以形成BGA。所公开的方法100的一些实施例可以使得不必将金属层215镀以耐蚀金属,并因此,焊料球1010可以直接接合到金属层810的剩余部分。
图11A示出了在将焊料球1010接合到位于安装板1120上的落着焊盘1010的步骤165之后的封装200。例如,被配置作为BGA的焊料球1010和金属接合层810的阵列可以经由焊料球1010接合到落着焊盘1110的阵列。安装板1120(例如,印刷电路板)可以具有导电线路1130,其将封装200的电子器件410电耦合到安装板1120上的其它电子器件(未示出),或者电耦合到在所述封装外的器件。然而,在其它情况下,可以首先将焊料球1010接合到落着焊盘1110,并然后接合到金属层810的接合焊盘915。
替代地,如图11B中所示的,根据步骤170,可以将分离步骤155之后的封装200直接连接到落着焊盘1110,而在接合层810的末端上不存在焊料球1010(图11A)。例如,被配置作为LGA的金属接合层810的阵列可以直接连接到落着焊盘1110的阵列。
本公开的另一实施例是电子器件封装。在图1-11B的上下文中描述的任何方法可用于制造本公开的封装。
如图9中所示的,封装200可以包括电子器件410,该电子器件410附接到多个分开的共面金属接合层810之一(例如,被配置作为器件安装位点325的一个,图3)的第一面205。封装200进一步包括导线510,其接合到器件410的互连焊盘420,并接合到所述多个共面金属接合层810中的其它的一些(例如,被配置作为导线接合焊盘330的一些,图3)的第一面205。封装200还包括绝缘层320,其与所述多个分开的共面金属接合层810不共面。如在图8的上下文中论述的,所述图案化的绝缘层320中的开口315的周界730与所述分开的共面金属接合层810之一的周界850接触。
在一些实施例中,所述多个分开的共面金属接合层810包括铜(例如,铜箔215的若干部分)以及含银或金的金属镀层340,所述绝缘层320包括基于环氧树脂的光致抗蚀剂材料,所述导线510包括金或者由金构成,所述电子器件410包括一个或更多个IC。
在有些情况下,如图9中所示的,封装200可以进一步包括模610,模610覆盖所述多个共面金属接合层810的第一面205。还如图9中示出的,所述层810的相对的第二面210未被模810覆盖,从而允许第二接合位置910作为接合焊盘915,例如,在封装200的LGA或BGA实施例中。
图12示出了与图9中呈现的所类似的电子器件封装200的平面图(例如,利用沿图9中的视线12-12的较低放大率的视图)。如图12中所示的,封装200的被配置作为导线接合焊盘330的所述多个共面金属接合层810可以围绕器件410,以便于使可以连接到器件410的导线510的数目最大化。然而,出于清楚起见,在图中仅绘出一些导线510。如所示出的,被配置作为导线接合焊盘330的接合位置310可以基本上是圆形的,但是如果期望的话,也可以使用其它形状(例如,方形或长方形)。
与在具有引线框(其具有长的金属迹线)的某些器件封装中所发现的相比,该封装200的多个分开的共面金属接合层810的使用可以有助于减少电寄生效应的发生。在一些实施例中,被配置作为导线接合焊盘330的封装200的所述多个共面金属接合层810每一都具有小于大约10000平方微米(microns2)的表面面积(例如,在第一面205上)。例如,方形的导线接合焊盘330优选具有大约100微米乘大约100微米或更小的尺寸。例如,圆形的导线接合焊盘330优选具有大约32微米或更小的直径。在一些优选实施例中,每一导线接合焊盘330的第一面205具有范围从25微米平方到75微米的面积。例如,对于方形的导线接合焊盘330的优选实施例,具有大约25微米乘以大约25微米至大约75微米乘以大约75微米的尺寸。接合焊盘330可以具有其它形状,但是每一优选具有处于与上述方形焊盘330相同范围内的表面面积。例如,一些优选的导线接合焊盘330每一都具有在从大约600到5600平方微米的范围中的表面面积。
与图10中所示的,封装200的一些实施例可以进一步包括接合的焊料球1010。例如,可以存在焊料球接合焊盘915的阵列(例如,BGA),其接合到被配置作为焊料球接合焊盘915的所述多个分开的共面金属接合层810中每一个的第二面210。(图10)。
如图11A和11B中进一步所示的,在封装200一些实施例中,所述分开的共面金属接合层810中的至少一些的第二面210可以被配置作为接合焊盘915,该接合焊盘915接合到封装200的安装板1120(例如,印刷电路板)上的落着焊盘1110的阵列1140。如图11A中所示的,在一些实施例中,焊料球接合焊盘915的BGA可以被安装到安装板1120上的落着焊盘1110的阵列1140。在其他实施例中,如图11B中所示的,可以存在与安装板1120上的落着焊盘1110的阵列1140接触的无焊料球接合焊盘915的LGA。
本申请所涉及领域的技术人员将理解可以对所描述的实施例进行其它和进一步的添加、删除、替换和修改。
Claims (10)
1.一种制造电子器件封装的方法,包括:
以第一绝缘层涂覆金属层的第一面;
以第二绝缘层涂覆所述金属层的相对的第二面;
将所述第一绝缘层图案化以暴露所述金属层的第一面上的接合位置;
将所述第二绝缘层图案化,以使得所述相对的第二面上的所述第二绝缘层的剩余部分位置正对于所述第一面上的所述接合位置;
有选择地去除所述相对的第二面上的未被所述第二绝缘层的剩余部分覆盖的所述金属层的部分,以形成分开的共面金属层,其中所述分开的共面金属层包括所述接合位置;以及
有选择地去除所述第二绝缘层的所述剩余部分,从而暴露所述分开的共面金属层的所述相对的第二面上的第二接合位置。
2.如权利要求1所述的方法,其中所述图案化的第一绝缘层与所述接合位置不共面。
3.如权利要求1所述的方法,其中所述接合位置通过所述图案化的第一绝缘层而彼此分开。
4.如权利要求1所述的方法,其中所述图案化的第一绝缘层中的多个开口中的一个开口的周界与所述分开的共面金属层中的一个共面金属层的周界接触。
5.如权利要求1所述的方法,进一步包括:将所述图案化的第一绝缘层分开以使得所述图案化的第一绝缘层中的被分开的图案化的第一绝缘层每一都包括被配置作为器件安装位点的至少一个所述接合位置。
6.一种电子器件封装,包括:
电子器件,其附接到被配置作为器件安装位点的、多个分开的共面金属接合层之一的第一面;
导线,其接合到所述电子器件的互连焊盘并接合到被配置作为导线接合焊盘的、所述分开的共面金属接合层中的其它的分开的共面金属接合层的第一面;
绝缘层,其与所述分开的共面金属接合层不共面,其中所述绝缘层中的开口的周界与所述导线所接合的所述分开的共面金属接合层的周界接触。
7.如权利要求6所述的器件封装,进一步包括:模,其覆盖所述共面的分开的金属接合层的所述第一面,其中所述共面的分开的金属接合层的相对的第二面未被所述模覆盖。
8.如权利要求6所述的器件封装,其中所述共面的分开的金属接合层包括铜层,所述绝缘层包括基于环氧树脂的光致抗蚀剂材料层,所述导线包括金线或铜线,以及所述电子器件包括集成电路。
9.如权利要求6所述的器件封装,其中所述共面的分开的金属接合层中的所述其它的共面的分开的金属接合层中的每一个的所述第一面具有在大约600到5600平方微米的范围中的表面面积。
10.如权利要求6所述的器件封装,进一步包括安装板,以及其中所述共面的分开的金属接合层中的至少一些共面的分开的金属接合层的所述第二面被配置作为接合到所述安装板上的落着焊盘阵列的接合焊盘。
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TWI427716B (zh) | 2010-06-04 | 2014-02-21 | 矽品精密工業股份有限公司 | 無載具之半導體封裝件及其製法 |
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TWI413210B (zh) | 2013-10-21 |
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