TWI366015B - Driver chip and display apparatus having the same - Google Patents

Driver chip and display apparatus having the same

Info

Publication number
TWI366015B
TWI366015B TW093138916A TW93138916A TWI366015B TW I366015 B TWI366015 B TW I366015B TW 093138916 A TW093138916 A TW 093138916A TW 93138916 A TW93138916 A TW 93138916A TW I366015 B TWI366015 B TW I366015B
Authority
TW
Taiwan
Prior art keywords
same
display apparatus
driver chip
driver
chip
Prior art date
Application number
TW093138916A
Other languages
English (en)
Other versions
TW200530676A (en
Inventor
Ju-Young Yoon
Chun-Ho Song
Seong-Yong Hwang
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200530676A publication Critical patent/TW200530676A/zh
Application granted granted Critical
Publication of TWI366015B publication Critical patent/TWI366015B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
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    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
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    • H01L2924/01004—Beryllium [Be]
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    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
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    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW093138916A 2003-12-16 2004-12-15 Driver chip and display apparatus having the same TWI366015B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020030091951A KR101051013B1 (ko) 2003-12-16 2003-12-16 구동 칩 및 이를 갖는 표시장치

Publications (2)

Publication Number Publication Date
TW200530676A TW200530676A (en) 2005-09-16
TWI366015B true TWI366015B (en) 2012-06-11

Family

ID=34793179

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093138916A TWI366015B (en) 2003-12-16 2004-12-15 Driver chip and display apparatus having the same

Country Status (5)

Country Link
US (2) US7327411B2 (zh)
JP (1) JP4782410B2 (zh)
KR (1) KR101051013B1 (zh)
CN (1) CN100437234C (zh)
TW (1) TWI366015B (zh)

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KR101051013B1 (ko) * 2003-12-16 2011-07-21 삼성전자주식회사 구동 칩 및 이를 갖는 표시장치
TW200634375A (en) * 2005-03-28 2006-10-01 Elan Microelectronics Corp Power line structure for liquid crystal display panel
EP1770610A3 (en) * 2005-09-29 2010-12-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5292665B2 (ja) * 2005-10-31 2013-09-18 株式会社ジャパンディスプレイ 表示装置
JP4943691B2 (ja) 2005-10-31 2012-05-30 ルネサスエレクトロニクス株式会社 半導体装置
JP2008164787A (ja) 2006-12-27 2008-07-17 Epson Imaging Devices Corp 液晶表示装置
KR101387922B1 (ko) * 2007-07-24 2014-04-22 삼성디스플레이 주식회사 구동 칩, 이를 갖는 구동 칩 패키지 및 표시 장치
JP2009192796A (ja) * 2008-02-14 2009-08-27 Seiko Instruments Inc 液晶表示装置
JP5246782B2 (ja) 2008-03-06 2013-07-24 株式会社ジャパンディスプレイウェスト 液晶装置および電子機器
WO2010024015A1 (ja) * 2008-09-01 2010-03-04 シャープ株式会社 半導体素子およびそれを備えた表示装置
EP2432006A1 (en) * 2009-06-16 2012-03-21 Sharp Kabushiki Kaisha Semiconductor chip and structure for mounting same
KR20110014033A (ko) * 2009-08-04 2011-02-10 삼성에스디아이 주식회사 플라즈마 디스플레이 장치
JP5250525B2 (ja) * 2009-10-16 2013-07-31 株式会社ジャパンディスプレイセントラル 表示装置
JP5452290B2 (ja) * 2010-03-05 2014-03-26 ラピスセミコンダクタ株式会社 表示パネル
JP2012227480A (ja) * 2011-04-22 2012-11-15 Japan Display East Co Ltd 表示装置及び半導体集積回路装置
JP2014026042A (ja) * 2012-07-25 2014-02-06 Japan Display Inc 表示装置
KR20140025253A (ko) * 2012-08-22 2014-03-04 삼성디스플레이 주식회사 구동칩 및 그 제조방법
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KR101983374B1 (ko) * 2012-11-06 2019-08-29 삼성디스플레이 주식회사 표시 패널, 칩 온 필름, 및 이들을 포함하는 표시 장치
KR102379591B1 (ko) * 2014-04-10 2022-03-30 삼성디스플레이 주식회사 전자부품, 이를 포함하는 전자기기 및 전자기기의 본딩 방법
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CN103488338A (zh) * 2013-08-30 2014-01-01 江西合力泰科技股份有限公司 一种改善触摸屏邦定效果的方法
KR101849339B1 (ko) 2013-09-30 2018-04-17 삼성디스플레이 주식회사 플렉서블 표시장치
CN105814675B (zh) * 2013-12-20 2019-04-16 迪睿合株式会社 电子部件、连接体、连接体的制造方法及电子部件的连接方法
JP6434210B2 (ja) * 2013-12-20 2018-12-05 デクセリアルズ株式会社 電子部品、接続体、接続体の製造方法及び電子部品の接続方法
KR102081129B1 (ko) * 2013-12-20 2020-02-25 엘지디스플레이 주식회사 액정표시장치
JP6457214B2 (ja) * 2014-08-08 2019-01-23 デクセリアルズ株式会社 電子部品、接続体、接続体の製造方法及び電子部品の接続方法
JP6645730B2 (ja) 2014-01-28 2020-02-14 デクセリアルズ株式会社 接続体及び接続体の製造方法
JP6324746B2 (ja) 2014-02-03 2018-05-16 デクセリアルズ株式会社 接続体、接続体の製造方法、電子機器
JP2015179831A (ja) 2014-02-27 2015-10-08 デクセリアルズ株式会社 接続体、接続体の製造方法及び検査方法
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CN1629926A (zh) 2005-06-22
US7903067B2 (en) 2011-03-08
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JP4782410B2 (ja) 2011-09-28

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