TWI301306B - Method of forming self-passivating interconnects and resulting devices - Google Patents

Method of forming self-passivating interconnects and resulting devices Download PDF

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Publication number
TWI301306B
TWI301306B TW095108793A TW95108793A TWI301306B TW I301306 B TWI301306 B TW I301306B TW 095108793 A TW095108793 A TW 095108793A TW 95108793 A TW95108793 A TW 95108793A TW I301306 B TWI301306 B TW I301306B
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Taiwan
Prior art keywords
bonding
metal
substrate
passivation layer
bonding structure
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TW095108793A
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English (en)
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TW200723443A (en
Inventor
Mauro Kobrinsky
Jun He
Kevin O'brien
Ying Zhou
Shriram Ramanathan
Patrick Morrow
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Intel Corp
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Publication of TW200723443A publication Critical patent/TW200723443A/zh
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Publication of TWI301306B publication Critical patent/TWI301306B/zh

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    • H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
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1301306 (1) 九、發明說明 【發明所屬之技術領域】 Φ發明之實施例大致關係於積體電路裝置的內連線之 形成’更明確地說，有關於形成自鈍化內連線結構。 【先前技術】 三維晶圓結合或晶圓堆疊爲將兩或更多已經形成有積 •體電路的半導體晶圓結合在一起。晶圓堆疊係依序被切成 分開之堆疊晶粒加以形成，每一堆疊晶粒具有多層之積體 電路。晶圓堆疊可以提供若干之可能優點。例如，由晶圓 堆疊所形成之積體電路（1C )裝置可以提供加強之效能與 功能’同時，降低成本與改良形狀因數。由晶圓堆疊所形 成之系統晶片（SOC )架構可以在具有不同技術的堆疊晶 粒間完成高頻寬連接性，例如在邏輯電路與動態隨機存取 記憶體（DRAM )之間，否則它們係具有不匹配的製程。 ® 同時，藉由使用三維晶圓結合，可以完成較小之晶粒尺 寸，而降低內連線延遲。晶圓堆疊技術有很多可能應用， 包含高效能處理裝置、視訊與圖形處理機、高密度與高頻 寬記憶體晶片、前述SOC解決方案等等。 三維晶圓結合的一方法爲金屬結合。於金屬晶圓結合 中，兩晶圓藉由將形成在晶圓之一上之金屬結合結合結合 至形成在另一晶圓上之對應金屬結合結構而接合在一起。 例如，若干銅結合墊可以形成在第一晶圓上及對應量之銅 結合墊可以形成在第二晶圓上。第一與第二晶圓被對準並 -5- (2) 1301306 放在一起，使得在第一晶圓上之每一銅墊配合第二晶 之對應銅墊。然後，執行結合處理（例如藉由施加壓 /或升溫），以接合配合之結合墊，藉以在第一與第 圓間形成多數內連線，而形成一晶圓堆疊。各個第一 二晶圓包含用於多數晶粒的積體電路，及晶圓堆疊被 成若干堆疊晶粒。每一堆疊晶粒包含來自第一晶圓的 fel與來自弟—·晶圓的另一晶粒’适些晶粒被部份先前 ®成之內連線所機械與電氣連接。 【發明內容及實施方式】 參考第1圖，顯示出一種形成自鈍化內連線的方 第1圖之方法實施例進一步被顯示於第2A-2D圖與第 3C圖與第4圖。 現參考第1圖中之方塊110，一或多數結合結構 成在第一基材上，每一結合結構至少部份包含：一第 ® 屬及一第二金屬（或其他元素）。如第2A圖所示， 出在表面211上形成有若干結合結構213的第— 2 1 0。每一結合結構2 1 3均被電氣連接一形成在基材 中之導體。於一實施例中，基材210包含一半導體晶 其上形成有用於若干晶粒的積體電路。一層介電材料 也被安排在第一基材210的表面211上。介電層217 以包含適當介電材料，例如Si〇2、ShN4、摻碳氧 (CDO ) 、SiOF、或旋塗材料（例如旋塗玻璃或 物）。於一實施例中，結合結構2 1 3延伸於介電層2 : 圓上 力與 一晶 與第 切割 一晶 所形 法。 ;3A- 被形 一金 顯示 基材 2 10 圓， 2 17 也可 化物 聚合 [7的 (3) 1301306 外表面上（例如藉由硏磨或回蝕介電層加以完成）。 如上所述，結合結構2 1 3至少部份包含第一金屬與第 二金屬（或其他元素）的合金。第一金屬包含導電金屬， 其將最後形成導電內連線的一部份。於一實施例中，第一 金屬包含銅。然而，第一金屬可以包含任何其他適當導電 金屬（例如鋁、金、銀等），或導電金屬合金。如上所建 議，每一結合結構213只有一部份包含第一與第二金屬的 ®合金，而結合結構之其他部份則包含第一金屬，這將如下 參考第3 A-3C圖加以詳細說明。 第二金屬或元素包含具有能力以在予以形成之內連線 上形成鈍化層之任何金屬（或其他元素）。於一實施例 中，第二金屬包含可以擴散經第一金屬的物質，使得第二 金屬可以遷移至內連線結構的自由表面，以形成鈍化層。 適合於第二金屬的金屬包含但並不限定於鋁、鈷、錫、 鎂、及鈦。於一實施例中，第二元素包含非金屬。依據一 ® 實施例，出現在合金（第一與第二金屬）中的第二金屬 (或元素）的數量係在或低於第二金屬可溶於第一金屬中 之限制。於一實施例中，金屬合金中之第二金屬的含量係 於〇· 1至1 0原子％之間。例如，假如第一金屬包含銅及第 二金屬包含鋁，則出現在Cl! ( A1 )合金中之鋁的量多達 約3原子％。 依據另一實施例，在室溫，完成在第一金屬內之第二 金屬（或元素）的遷移之擴散機制爲緩慢或實質不存在， 使得第二金屬被”捕獲”於第一金屬的晶格結構內，這防止 (4) 1301306 了鈍化層之過早形成。鈍化層之過早形成（例如在將結合 結構213結合至第二基材的結合結並之前，這將如下所 述）可能阻礙金屬結合。然而，在升溫時，第二金屬（或 元素）能擴散經第一金屬，使得第二金屬可以分隔開內連 線結構的自由表面’以形成一鈍化層。當與另一金屬作成 合金時’部份金屬的傾向於遷移至自由表面係爲已知現 象，不再進一步討論。 於另一實施例中，結合結構213包含第一金屬與兩或 更多其他金屬（或其他元素）。這些其他金屬（或元素） 均包含一物質’其能擴散通過第一金屬，以形成鈍化層。 因此’鈍化層可以包含兩（或更多）其他金屬或其他元素 的組合。 於一實施例中，鈍化層係形成在含氧的環境中，及鈍 化層包含第二金屬的氧化物（例如Al2〇3 )。依據另一實 施例，鈍化層被形成在含氮的環境中，及鈍化層包含第二 金屬的氮化物（例如A1N )。於另一實施例中，鈍化層包 含第二金屬（或其他材料）。 於第1圖的方塊120中，一或多數結合結構被形成在 第二基材上，每一結合結構包含第一金屬。在第二基材上 之結合結構可运用地包含弟一金屬（或其他元素），使得 每一結合結構的至少一部份包含第一與第二金屬的合金。 如第2B圖所示，顯示具有表面221之第二基材220，其 上已經形成有若干結合結構2 2 3。每一結合結構2 2 3均可 以電氣連接至形成在第二基材220中之導體。於一實施例 (5) 1301306 ψ. 中，第二基材220包含另一半導體晶圓，其上，形成 於對應數量晶粒的積體電路。一層介電材料227可以 在第二基材220的表面221上。介電層227可以包含 適當介電材料，例如Si02、Si3N4、CDO、SiOF或一 材料（例如旋塗玻璃或聚合物）。於一實施例中，結 構2 2 3延伸於介電層2 2 7的外表面上（例如，以硏磨 蝕介電層加以完成）。 Φ 在第二基材220上之結合結構223將被與第一 2 1 0的結合結構2 1 3對準並匹配，及將執行一結合程 以在第一與第二基材間形成內連線。這些內連線均由 一基材210上之結合結構213與在第二基材220上之 結合結構223形成，及一鈍化層將被形成在來自第二 (或元素或其他金屬及/或元素的組合）之每一內 上。如上所述，在第二基材上之結合結構223可以包 一金屬（沒有第二金屬）。依據此實施例，匹配結合 ® 之一（例如結合結構213或結合結構223 )包含第 屬，及鈍化層係由出現在此一結合結構中之第二金 成。然而，依據另一實施例，在第二基材22 0上之結 構223至少部份包含第一金屬與第二金屬的合金。因 最後建立在每一內連線之鈍化層被由分別出現在第一 二基材2 1 0、2 2 0的每一匹配結合結構2 1 3、結合結構 中之第二金屬所形成。第一與第二金屬（或元素）之 係如上所述。 在第一與第二基材210、220上之結合結構213 有用 安排 任何 旋塗 合結 或回 基材 序， 在第 匹配 金屬 連線 含第 結構 二金 屬形 合結 此， 與第 223 特徵 •223 -9 - (6) 1301306 可以具有任何適當形狀，只要在第一基材210上之結 構213可以匹配並結合至第二基材220上之結合結精 即可，以形成內連線延伸於兩基材間。於一實施例中 合結構213、223均包含一圓形或正方形結合墊。然 應了解所揭示之實施例並不限定於此等結合墊之形成 時，結合結構213、223也可以包含其他適當形狀（ 球形凸塊）。於一實施例中，結合結構2 1 3、2 2 3可 修有於0.1/zm至10//m間之厚度（T)(見第3A圖） 合結構213、223也可以由適當製程或處理形成。結 構213、223的各種實施例將於以下參考第3A-3 C圖 詳細說明。 回到第1圖，特別是方塊130中，第一與第二基 結合結構被對準並接觸以作結合，使得在第一基材上 合結構可以與在第二基材上之結合結構結合在一起， 第一與第二基材間形成內連線。這係進一步如第2C 胃示，其中第一與第二基材210、220已經對準並放在 作結合。在第一基材210上之每一結合結構213已經 並匹配在第二基材2 2 0上之對應之結合結構223。 在對準與接觸後之結合結構213、22 3的各實施 如第3A-3C圖所示。首先，參考第3A圖，顯示結合 213a、223a之實施例。整個結合結構213a、223a ( 些結構的大部份）包含第一與第二金屬合金（例如金呂 的合金）。結合結構2 1 3 a可以首先藉由將一層介電 2 1 7沉積在第一基材2 1 0上，然後，在結合結構的 合結 【223 ，結 而， ，同 例如 以具 。結 合結 加以 材的 之結 以在 圖所 一起 對準 例係 結構 或這 與銅 材料 位置 -10- (7) 1301306 處，形成進入介電層2 1 7的導孔或其他孔徑（例如藉由遮 罩與蝕刻製程）。第一與第二金屬合金然後被沉積於導孔 中（例如，藉由全面沉積步驟後，再進行平坦化步驟，例 如化學機械硏磨），以形成結合結構2 1 3 a。介電層2 1 7可 以被硏磨或回蝕，以曝露結合結構的上部份，如第3 A圖 所不。在第二基材2 2 0上之結合結構2 2 3 a可以以類似方 式加以形成。 ® 參考第3B圖，顯示出結合結構213b，223b的其他實 施例。結合結構2 1 3 b包含一上部份3 0 1，其大致包含第一 金屬（例如銅）與下部份.3 03，其包含第一與第二金屬 (例如銅與鋁）的合金。同樣地，結合結構2 2 3 b包含一 上部份302，其大致包含第一金屬與一下部份304，其包 含弟一與弟一金屬的合金。結合結構213b可以由首先沉 積一層介電材料217於第一基材210上，然後，在結合結 構之位置，形成進入介電層2 1 7的導孔或其他孔徑（例如 •藉由一遮罩及蝕刻處理）。一層第一與第二金屬合金然後 被沉積在導孔（例如藉由選擇地沉積在結合結構位置下第 一基材2 1 0中之導體上），以形成結合結構的下部份 3 03。一層第一金屬然後沉積在合金層上（例如藉由選擇 沉積先前沉積在每一導孔中之合金層上，或許，後續有一 平坦化步驟），以形成結合結構2 1 3 a的上部份3 0 1。介電 層2 1 7可以被硏磨或回蝕，以曝露結合結構的上部份，如 第3B圖所示。在第二基材220上之結合結構223b可以以 類似方式形成。 -11 - (8) 1301306 再者，參考第3C圖，顯示結合結構213c、223c的其 他實施例。結合結構213c包含一內部份3 05，其係由第一 金屬（例如銅）構成。結合結構2 1 3 c的內部份3 0 5係爲 外部份3 07所包圍，該外部份係由第一與第二金屬（例如 銅及鋁）的合金所構成。同樣地，結合結構223 c包含一 內部份3 06，其係由第一金屬構成，內部份3 06係爲外部 份3 08所包圍，該外部份係由第一與第二金屬之合金所構 馨成。結合結構2 1 3 c可以首先藉由沉積介電材料層2 1 7於 第一基材2 1 0上，然後，在結構的位置，形成導孔或其他 孔徑（例如藉由一遮罩及蝕刻製程）進入介電層2 1 7。第 一與第二金屬的合金的種層然後可以沉積在導孔中（例如 藉由全面沉積製程），以形成結合結構之外部份3 07。第 一金屬層然後沉積在合金層上（例如藉由後續全面沉積步 驟，其隨後進行一平坦化步驟），以形成結合結構2 1 3 c 的內部份3 05。介電層217可以被硏磨或回蝕，以曝露結 鲁合結構的上部份，如第3C圖所示。在第二基材220上之 結合結構223 c可以以類似方式形成。 於第3A-3C圖中，結合結構213、223係相同。然 而，應注意的是，在第一與第二基材210、220上之結合 結構可以不同。例如，第一基材2 1 0可以具有類似於第 3A圖所示之結構，而第二基材220可以具有類似於第3B 圖所示之結構。例如，第一基材210可以具有類似第3A 至3C圖中任一者所示之結合結構，而第二基材220可以 具有由第一金屬（例如銅）所構成之結合結構。讀者可以 -12- (9) 1301306 了解，可以取決於予以形成之內連線的想要特徵及 境，而使用任意組合之匹配結合結構。 於結合時，在第一基材2 1 0上之結合結構2 1 3 與第二基材220上之結合結構223結合，以形成延 基材間之內連線。爲了最佳化結合，於部份實施例 人想要於結合結構213、22 3間（見第2C、3A-3C 之參考號290 )的介面處，禁止形成一鈍化層。因 ®據一實施例，吾人想要延遲第二金屬的遷移至結 213、223的內表面，直到完成於結合結構間之結合 於一實施例中，這可以藉由在介面290處放置一大 一金屬（例如銅）的材料加以完成。第3B與3C圖 結構（213b、223b及 213c、223c)的例子，其在 構間之介面290，提供一層（一數量之）第一金屬 面290之此層（或數量）之第一金屬主要作爲一 能’其在結合前，減緩第二金屬的遷移入介面。於 B施例中，金屬（或其他元素）作成之一或多數其他 安置於金屬層之間，以進一步在結合前，延遲第二 遷移入介面中（例如在第3B及3C圖中，另一材料 積在Cu ( A1 )及Cu層之間）。 兩結合結構213、223的對準係進一步如第 示。參考此圖，當兩結合結構213、223被對準 時’將會有若干自由表面（例如結合結構的外面） 環境中。這些曝露之自由表面包含結合結構2 1 3、 延伸於其相關介電層217、陽極元件227上之表面 操作環 係予以 伸於兩 中，吾 及4圖 此，依 合結構 爲止。 致爲第 爲結合 結合結 。在介 延遲功 另一實 層可以 金屬的 可以沉 4圖所 並接觸 曝露至 223之 418、 -13- (10) 1301306 警 4 2 8。另外，由於結合結構2 1 3、2 2 3間之失準，曝露之自 讀 由表面419、429可能存在於界面290。在結合結構213、 223結合形成一內連線後，這些自由表面 418、428、 419、429可能保留曝露至外部環境，使得它們容易受到氧 化與腐蝕。然而，予以在結合時或結合後（由第二金屬的 遷移至這些自由表面）形成之鈍化層可以禁止此等氧化與 腐蝕（雖然鈍化層本身可能部份由氧化製程形成）。 ® 結合可以在適當製程狀態下進行。於一實施例中，在 第一與第二基材210、220上之結合結構213、223在壓力 下接.觸並受到高溫。依據一實施例，於結合結構2 1 3、223 間之接觸壓力範圍多達5MPa，並在高達450 °C的溫度執行 結合。結合所發生之周圍環境也可能影響結合，以及鈍化 層的形成。於一實施例中，結合係被執行於包含氧的氣氛 中，其中，鈍化層可以爲第二金屬的氧化物（例如 Al2〇3)。於另一實施例中，結合係被執行於包含氮的氣 ®氛中，所形成之鈍化層可以爲第二金屬的氮化物（例如 A1N )。在另一實施例中，結合係在真空下執行，及所形 成之鈍化層可以實質包含第二金屬（雖然如果結合基材並 未氣密密封，則鈍化層的後續氧化可能發生）。這些係結 合可以進行的少數狀態例，讀者也可以了解其他製程狀態 也可以使用，這係取決於所予以形成之內連線的想要特性 而定。 於結合時，兩製程應發生··（ 1 )於匹配結合結構 2 I 3、223間之金屬結合的形成，以形成延伸於第一與第二 -14- (11) 1301306 基材210、220間之內連線（見方塊130);及（2)第 屬的遷移至結合結構213、223的自由表面（見 圖），以形成一鈍化層在每一內連線上，如同第1圖 塊140所述。這被進一步以第2D圖加以顯示，其顯 經由匹配結合結構213、223形成之內連線23 0，結合 213、223已經被彼此結合。如於第2D圖所示，鈍 240已經被形成在每一內連線230上，此鈍化層240 ®第二金屬（例如第二金屬的氧化物或氮化物，或許實 第二金屬形成）。於一實施例中，每一內連線23 0實 含第一金屬；然而，於其他實施例中，部份第二金屬 保留在內連線230內（例如部份第二金屬可以保持^ 獲”於第一金屬的晶格結構中，因爲在將所有第二金 析到自由表面之前，結合被停止）。在一實施例中， 前述製程-例如，結合及鈍化層形成-可能同時發生（ 乎同時）。然而，於其他實施例中，這兩製程可以依 ®生（例如結合可先發生，隨後，第二金屬遷移至自由 並形成鈍化層）。 鈍化層240的厚度將爲第一與第二金屬的選擇及 形成之製程狀態（例如氣氛、溫度及時間等）的函數 厚度可以加以指定，以完成鈍化層240的想要特徵（ 抗腐触、抗電遷移、電氣阻隔等）。依據一實施例， 連線23 0上之鈍化層240可以具有大約5至1 000埃 厚度。例如，當鈍化層240包含ΑΙ2〇3 (及內連線實 銅）時，鈍化層可以具有約3 0埃的厚度。另外，當 二金 第4 之方 示已 結構 化層 被由 質由 質包 可以 皮，，捕 屬解 此兩 或近 序發 表面 此層 。此 例如 在內 間之 質爲 鈍化 -15- (12) 1301306 層240包含AIN (及內連線實質爲銅）時，鈍化層可以具 有約1 00埃的厚度。讀者可以了解，也可以完成其他厚 度。 如前所建議，上述用以形成自鈍化內連線的實施例可 以用以將半導體晶圓結合在一起，以形成一晶圓堆疊。此 晶圓堆曼500的實施例係例示於第5A及5B圖中，其中第 5B圖爲第5A圖之沿著線B-B所取之晶圓堆疊的剖面圖。 春參考這些圖，一晶圓堆疊500包含第一晶圓501及第二晶 圓5 02，每一晶圓50 1、502均分別包含一基材510、 520。每一晶圓501、502之基材510、520典型包含一半 導體材料，例如矽（Si )、絕緣層上覆矽（SOI )、砷化 鎵（GaAs)等。用於若干堆疊晶粒505之積體電路已經被 形成在每一晶圓501、502上，及晶圓堆疊500被最後切 割成這些分離之堆疊晶粒5 05。用於每一堆疊晶粒5 05之 積體電路可以包含若干主動裝置512 (例如電晶體、電容 ®等），形成在第一晶圓501的基材510上，及若干主動裝 置522形成在第二晶圓502的基材520上。 安置在第一晶圓501表面上的是內連線結構514，及 安置在第二晶圓502表面上的是內連線524。一般而言， 每一內連線結構514、524均包含若干層金屬化、每一層 金屬化與鄰近層分開有一層介電材料（或其他絕緣材 料）’並與鄰近層以導孔作內連線。內連線514、524的 介電層經常被稱爲”內介電層，，（或ILD ) ，ILD層可以包 含任何適當絕緣材料，例如Si02、Si304、CD0、SiOF、 -16- (13) 1301306 或旋塗材料（例如旋塗玻玻璃或聚合物）。每一 屬化包含若干導體（例如軌跡），其發送信號、 接地線’用以進出每一晶粒5 〇 5的積體電路，此 含一導電材料，例如銅、鋁、銀、金與這些（或 料的合金。 安置於第一與第二晶圓501、502之間並機 連接兩晶圓的是若干內連線5 3 〇。形成在每一內 鲁是鈍化層54 〇。依據—實施例，內連線5 3 〇實質 及鈍化層540包含鋁。依據另一實施例，鈍化層 銘’於另一實施例中，鈍化層包含氮化鋁。於 中’內連線爲自鈍化，並依據上述之一或多數實 形成。 於一實施例中，第一與第二晶圓501、502 尺寸與形狀;然而，於另一實施例中，這些晶圓 形狀及/或尺寸。於一實施例中，第一與第二晶 ® 502包含相同材料，於另一實施例中，第一與 501、5 02包含不同材料。同時，雖然晶圓501、 使用實質相同製程製造，但在另一實施例中，晶 5 02可以使用不同製程製造。於一實施例中， (例如晶圓5 0 1 )包含使用第一製程所形成之邏 及另一晶圓（例如晶圓502 )則使用第二製程之 所形成之記憶體電路（例如DRAM、SRAM等） 讀者可以了解，所揭示之實施例可以應用至任一 圓或晶圓組合-無關於尺寸、形狀、材料、架釋 層上之金 電力，及 金屬化包 其他）材 械及電氣 連線上的 包含銅， 包含氧化 一實施例 施例加以 具有相同 具有不同 圓 501、 第一晶圓 502可以 圓 501、 晶圓之一 輯電路， 不同製程 。因此， 類型之晶 I及/或製 -17- (14) 1301306 程，如同於此所用，”晶圓”應不在範圍上限定爲任一特定 類型的晶圓或晶圓組合。 最後，晶圓堆疊500將如上所述被切割成若干分開之 堆疊晶粒5 05。每一堆疊晶粒將包含來自第一晶圓501之 晶粒與來自第二晶圓502的一晶粒。這兩堆疊晶粒將藉由 若干內連線530所互連-電氣與機械方式。 上述用以形成自鈍化內連線之實施例已經被解釋，至 β少部份解釋爲形成三維晶圓堆疊。然而，應了解的是，所 揭示之實施例並不限應用於晶圓堆疊，再者，所揭示實施 例也可以應用至其他裝置或應用例。例如，上述實施例可 以用以形成在一積體電路晶粒與一封裝基材間之自鈍化內 連線，及/或在封包與一電路板間形成自鈍化內連線。上 述實施例可以應用至晶圓至晶粒結合及晶粒至晶粒的結 合。 同時，應注意的是，在第2A_2D圖中，若干結合結構 ®與內連線係以容易看出之方式加以顯示。同樣地，在第 5A-5B圖中，只有有限量之內連線530及主動裝置512、 5 22也是爲了容易看出加以顯示。然而，讀者可以了解， 第2A-2D圖之基材210、220與第5A-5B圖之半導體晶圓 5 0 1、5 02可以包含數以千計或百萬計之此等內連線（2 3 0 或5 3 0 )。同樣地，形成在用於每一堆疊晶粒5 0 5之晶圓 501、502上之積體電路可以包含千萬，甚至一億以上之主 動裝置5 12、5 2 2 (例如電晶體）。因此，應了解的是，第 2A-2D圖及第5A-5B圖爲簡化示意圖，只作協助了解本案 -18- (15) 1301306 之實施例，並不應由這些示意圖提出不必要的限制。 參考第6圖，所示爲電腦系統600的一實施例。電腦 系統600包含一匯流排605，其上連接有各種元件。匯流 排60 5係想要代表一或多數匯流排的集合，例如系統匯流 排、週邊元件界面（PCI )匯流排、小電腦系統界面 (SCSI )匯流排等-其係互連電腦系統600的元件。爲了 容易了解，這些匯流排被以單一匯流排605代表，應了解 •的是，電腦系統600並不作如此限定。熟習於本技藝者可 以了解，電腦系統600可以具有任何適當之匯流排架構， 並可以包含任意數量的匯流排及匯流排組合。 連接至匯流排605的是一處理裝置（或多個裝置） 610。處理裝置610可以包含任何適當之處理裝置或系 統’包含一微處理機、網路處理機、客戶指定積體電路 (ASIC )、場可程式閘陣列（FPGA )或類似裝置。應了 解的是，雖然第6圖顯示單一處理裝置6 1 0，但電腦系統 • 60 0也可以包含兩或更多之處理裝置。 電腦系統600也包含系統記憶體620與匯流排605連 接’該系統記憶體620包含例如任何適當類型與數量之記 憶體’例如靜態隨機存取記憶體（SRAM )、動態隨機存 取記憶體（DRAM )、同步DRAM ( SDRAM )、或雙資料 率DRAM ( DDRDRAM )。電腦系統600操作時，一作業 系統與其他應用程式可以內佇在該系統記憶體620中。 電腦系統600更包含一唯讀記憶體（R〇M ) 63 0，與 匯流排60 5連接。ROM63 0可以儲存用於處理裝置610之 «19- (16) 1301306 指令。電腦系統600更包含一儲存裝置640 (或多數儲存 裝置）連接至匯流排605。儲存裝置640包含任一適當非 揮發記憶體，例如，一硬碟機。作業系統與其他程式可以 儲存在儲存裝置64〇中。再者，用以存取可移除儲存媒體 的裝置（例如軟碟機或CD ROM)可以與匯流排605連 接。 電腦系統600也可以包含一或多數I/O (輸入/輸出） •裝置660，連接至匯流排605。常用輸入裝置包含鍵盤、 例如滑鼠之指標裝置、及其他資料輸入裝置，而常用輸出 裝置包含視訊顯示器、列表機及聲音輸出裝置。可以了解 的是，只有少收幾個I/O裝置被連接至電腦系統600。 電腦系統6 0 0可以更包含一網路界面6 7 0與匯流排 60:5連接。網路界面670包含任何適當硬體、軟體或硬體 與軟體的組合，其能連接電腦系統600與一網路（例如網 路界面卡）者。網路界面670可以在任何適當媒體，例如 ® 無線、銅線、光纖、或其組合上建立與（多數）網路的鏈 路，經由任何適當之協定，例如TCP/IP (傳輸控制協定/ 網際網路協定）、HTTP (超文字傳輸協定）及其他，來 支援資訊的交換。 應了解的是，示於第6圖之電腦系統電腦系統600係 想要代表此一系統的例示實施例，此系統可以包含其他元 件，其爲了清楚及容易了解已經被省略。例如，電腦系統 6 00可以包含一 DMA (直接記憶體存取）控制器、有關於 處理裝置61 0的晶片組、其他記憶體（例如快取記億 -20- (17) 1301306 體）、及其他信號線與匯流排。同時，應了解的是，電腦 系統600可能不會包含所有第6圖所示之元件。 於一實施例中，電腦系統6 0 0包含具有一堆疊晶粒的 元件’該堆疊晶粒包含依據一或多數前述實施例加以形成 之自鈍化內連線。例如，電腦系統600的處理裝置6 1 0可 以包含具有自鈍化內連線的堆疊晶粒。然而，應了解的 是’電腦系統6 0 0的其他元件（例如網路界面6 7 0等）可 ®以包含一裝置，該裝置具有自鈍化內連線的元件。 前述詳細說明與附圖只作例示並不是限定用。其主要 是爲了清楚了解所揭示之實施例，並不用以作不必要的限 定。對於此所述之實施例的各種添加、刪除及修改，及其 他配置可以爲熟習於本技藝者在不脫離實施例之精神與申 請專利範圍下完成。 【圖式簡單說明】 第1圖爲形成自鈍化內連線方法的實施例之示意圖。 第2A-2D圖爲第1圖之方法的例示實施例的示意圖。 第3 A-3 C圖爲可用以形成自鈍化內連線之結合結構的 各實施例示意圖。 第4圖爲如第2C圖所示之對準與結合兩結合結構實 施例的示意圖。 第5A圖爲包含自鈍化內連線之晶圓堆疊實施例之示 意圖。 第5B圖爲沿著第5A圖之線B-B所取之第5A圖的晶 -21 - (18) 1301306 圓堆疊之剖面示意圖。 第6圖爲電腦系統實施例之示意圖，其可以包含依據 所揭示實施例所形成之元件。 【主要元件符號說明】 210 :第一基材 2 1 1 :表面 2 1 3 ·結合結構 2 1 7 :介電層 2 2 0 :第二基材 221 :表面 2 2 3 ·結合結構 227 :介電層 23 0 :內連線 2 4 0 :鈍化層 2 9 0 :介面 2 1 3 a ·結合結構 2 2 3 a :結合結構 2 1 3 b :結合結構 223b·結合結構 3 0 1 :上部份 3 02 :上部份 3 03 :下部份 3 04 :下部份 -22- (19) (19)1301306 2 1 3 c :結合結構 2 2 3 c :結合結構 3 0 5 :內部份 306 :內部份 3 0 7 :外部份 3 0 8 :外部份 4 1 8 :自由表面 4 1 9 :自由表面 4 2 8 :自由表面 429 :自由表面 5 0 0 :晶圓堆疊 5 0 1 :第一晶圓 5 02 :第二晶圓 5 05 :分開堆疊晶粒 5 1 0 :基材 512 :主動裝置 5 1 4 :內連線結構 520 :基材 522 :主動裝置 5 24 :內連線結構 5 3 0 :內連線 5 4 0 :鈍化層 6 00 :電腦系統 605 :匯流排 (20) 1301306 6 1 0 :處理裝置 6 2 0 :系統記憶體
63 0 ： ROM 640 :儲存裝置 65 0 :可移除儲存媒體 670 :網路界面 660 :輸入/輸出裝置

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1301306 「—~ - 、 外年令月A曰修(更)正本 w 一▲ ’一·Ι i — — 十、申請專利範圍 附件2A : 第95 1 08 793號專利申請案 中文申請專利範圍替換本 民國97年4月1〇日修正 1 ·一種形成自鈍化內連線的方法，包含： 在一第一基材上，形成一結合結構，該第一基材的該 結合結構包含一導電金屬與一元素； ^ 在一第二基材上，形成一結合結構，該第二基材的該 結合結構包含該導電金屬與該元素；及 將該第一基材的該結合結構結合至該第二基材的該結 合結構’以在該第一與第二基材間形成一內連線，其中該 元件遷移至該等結合結構的自由表面，以在該內連線上形 成一鈍化層及其中形成至少一該等結合結構包含由該導電 金屬與該元素的合金形成該結合結構的第一部份，以及實 質由該導電金屬形成該結合結構的第二部份。 φ 2 ·如申請專利範圍第1項所述之方法，更包含在出現 有氧時執行該結合，其中該鈍化層包含該元素的氧化物。 3 ·如申請專利範圍第1項所述之方法，更包含在出現 有氮時執行該結合，其中該鈍化層包含該元素的氮化物。 4 ·如申請專利範圍第1項所述之方法’更包含在一真 空中執行該結合，其中該鈍化層實質包含該元素。 5 .如申請專利範圍第1項所述之方法，其中該第一基 ’材包含第一半導體晶圓，該第一半導體晶圓具有用於一數 量晶粒的積體電路，以及，該第二基材包含第二半導體晶 1301306 圓，該第二半導體晶圓具有用於對應數量晶粒的積體電 路。 6β如申請專利範圍第1項所述之方法，其中形成至少 一該等結合結構包含由該導電金屬與該元素的合金形成該 結合結構。 7.如申請專利範圍第1項所述之方法，其中該導電金 屬包含銅。 H 8 .如申請專利範圍第1項所述之方法，其中該元素包 含一金屬。 9 .如申請專利範圍第1項所述之方法，其中該元素包 含非金屬。 1 〇.如申請專利範圍第1項所述之方法，其中至少一 該等結合結構包含該元素，並進一步包含一附加元素，其 中該附加元素遷移至該等結合結構的該等自由表面’以配 合該元素形成該鈍化層。 • 1 1. 一種形成有自鈍化內連線的積體電路裝置，包含： 一第一積體電路晶粒； 一第二積體電路晶粒； 多數內連線，其延伸於該第一晶粒與該第二晶粒之 間，各個該等內連線包含一導電金屬；及 一鈍化層，安置於各個該等內連線上，該鈍化層包含 一元素’其能經該導電金屬遷移至自由表面， 其中形成至少一該等結合結構包含由該導電金屬與該 元素的合金形成該結合結構的第一部份，以及實質由該導 -2- 1301306 電金屬形成該結合結構的第二部份。 12•如申請專利範圍第η項所述之積體電路裝置’其 中該鈍化層包含該元素的氧化物。 13. 如申請專利範圍第U項所述之積體電路裝置，其 中該鈍化層包含該元素的氮化物。 14. 如申請專利範圍第U項所述之積體電路裝置，其 中該鈍化層實質包含該元素。 • 15·如申請專利範圍第11項所述之積體電路裝置，其 中該導電金屬包含銅。 16. 如申請專利範圍第15項所述之積體電路裝置，其 Φ該元素包含-金屬’其係由！§'錫、銘、鎂、及駄所構 成之群組中選出。 17. 如申請專利範圍第Η項所述之積體電路裝置，其 中該元素包含非金屬。 18. 如申請專利範圍第Η項所述之積體電路裝置’其 • 中該鈍化層包含至少—附加元素，其能經由該導電金屬遷 移到該等自由表面。 19·一種形成自鈍化內連線的方法， 在一第一半導體晶圓上，形成多數結合墊，該第一半 導體晶圓包含用於一數量晶粒的電路，各個該等結合塾包 含銅與一第二金屬； 在一第二半導體晶圓上，形成多數結合墊，該第二半 導體晶圓包含用於一對應數量晶粒的電路，各個該等結合 墊包含銅與該第二金屬；及 - 3- 1301306 將該第一晶圓上之該等多數結合墊的各個結合墊結合 至在該第二晶圓上之該等多數結合墊的匹配結合墊，以在 該第一與第一晶圓間形成多數內連線，其中該第二金屬遷 移至該等結合墊的自由表面，以在各個該等內連線上，形 成一鈍化層及其中形成至少一該等結合結構包含由該導電 金屬與該元素的合金形成該結合結構的第一部份，以及實 質由該導電金屬形成該結合結構的第二部份。 φ 20.如申請專利範圍第19項所述之方法，其中該第二 金屬包含一金屬，其係由鋁、錫、鈷、鎂及鈦所構成之群 組中選出。 2 1 ·如申請專利範圍第1 9項所述之方法，其中該鈍化 層包含該第二金屬的氧化物或該第二金屬的氮化物。 2 2.如申請專利範圍第19項所述之方法，更包含將該 結合晶圓切割成一數量的堆疊晶粒，各個堆疊晶粒包含來 自該第一晶圓的一晶粒，來自該第二晶圓的一晶粒，及電 • 氣耦合該兩晶粒的部份該內連線。 2 3.—種形成自鈍化內連線的方法，包含： 在一第一基材上形成一結合結構，該第一基材的該結 合結構包含一該導電金屬與一元素； 在一第二基材上形成一結合結構，該第二基材的該結 合結構包含該導電金屬；及 將該第一'基材的該結合結構結合至該弟一*基材的該結 合結構，以在該第一與第二基材間形成一內連線，其中該 元素遷移至該等結合結構的自由表面’以在該內連線上形 -4- 1301306 成一鈍化層及其中形成該第一基材的該結合結構包含由該 導電金屬與該元素的合金形成該結合結構的第一部份，以 及實質由該導電金屬形成該結合結構的第二部份。 2 4.如申請專利範圍第23項所述之方法，更包含在出 現有氧時，執行該結合，其中該鈍化層包含該元素的氧化 物。 25·如申請專利範圍第23項所述之方法，更包含在出 現有氮時，執行該結合，其中該鈍化層包含該元素的氮化 物。 2 6 ·如申請專利範圍第2 3項所述之方法，更包含在真 空中執行該結合，其中該鈍化層實質包含該元素。 27. 如申請專利範圍第23項所述之方法，其中形成該 第一基材的該結合結構包含由該導電金屬與該元素的合 金，形成該結合結構。 28. 如申請專利範圍第23項所述之方法，其中該元素 包含一金屬。 29. 如申請專利範圍第23項所述之方法，其中該元素 包含一非金屬。 3 0.如申請專利範圍第23項所述之方法，其中該第一 基材的該結合結構更包含一附加元素’其中該附加元素遷 移到該等結合結構的該等自由表面’以配合該元素，形成 該鈍化層。 -5-
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