JP6062393B2 - 半導体装置の製造方法及び半導体装置 - Google Patents

半導体装置の製造方法及び半導体装置 Download PDF

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JP6062393B2
JP6062393B2 JP2014098753A JP2014098753A JP6062393B2 JP 6062393 B2 JP6062393 B2 JP 6062393B2 JP 2014098753 A JP2014098753 A JP 2014098753A JP 2014098753 A JP2014098753 A JP 2014098753A JP 6062393 B2 JP6062393 B2 JP 6062393B2
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Prior art keywords
opening
bonding material
semiconductor device
wafer
bonding
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JP2015216257A (ja
Inventor
藤塚　徳夫
徳夫 藤塚
尾崎　貴志
貴志 尾崎
和也 浅岡
和也 浅岡
建一 青
青　　建一
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Denso Corp
Toyota Motor Corp
Toyota Central R&D Labs Inc
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Denso Corp
Toyota Motor Corp
Toyota Central R&D Labs Inc
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Priority to JP2014098753A priority Critical patent/JP6062393B2/ja
Priority to US14/699,411 priority patent/US20150325538A1/en
Priority to DE102015107290.4A priority patent/DE102015107290A1/de
Priority to CN201510239111.2A priority patent/CN105097574B/zh
Publication of JP2015216257A publication Critical patent/JP2015216257A/ja
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Description

本明細書は、半導体装置の製造方法及び半導体装置に関する。
特許文献１には、第１基板と第２の基板との接続の形成方法が開示されている。まず、金属を含む接合構造を第１の基板上及び第２の基板上に形成する。次いで、第１の基板上の接合構造を第２の基板上の接合構造に接合し、接続を形成する。
特表２００８−５３３７４３号公報
特許文献１の接続の形成方法では、接合の際に、２個の接合構造に含まれる金属を溶解させる。そのため、重力や、接合に伴う鉛直方向の力が金属にかかることによって、溶解した金属が水平方向に広がりやすい。その結果、金属が、接触すべきではない箇所に接触する、基板の外に流れ出る等の問題が生じる可能性が高い。特に、接合が形成されている箇所が複数個あり、かつ、各接合箇所の間隔が狭い場合に、接合箇所同士が接触してしまうおそれが高い。
本明細書は、２個の半導体ウェハの接合時に接合材料を水平方向に広がりにくくする技術を提供する。
本明細書では、表面に保護膜を備える相補型金属酸化膜半導体ウェハと、別の半導体ウェハと、を備える半導体装置の製造方法を開示する。製造方法は、開口部形成工程と、導通孔形成工程と、配置工程と、接合工程と、を備える。開口部形成工程では、相補型金属酸化膜半導体ウェハの第１の部分と、半導体ウェハの第２の部分と、のうち、少なくとも一方の部分の内側及び外側に及ぶ範囲に非貫通の開口部を形成する。第１の部分は、相補型金属酸化膜半導体ウェハのうち、保護膜が位置する表面の一部分及びその下方に位置する部分を含み、第２の部分は、半導体ウェハのうち、半導体ウェハの表面の一部分及びその下方に位置する部分を含む。導通孔形成工程では、相補型金属酸化膜半導体ウェハ内の金属材料に通じる導通孔を第１の部分の内側に形成する。配置工程では、第１の接合材料を導通孔内及び第１の部分に配置し、第２の接合材料を第２の部分に配置する。接合工程では、配置された第１の接合材料と、配置された第２の接合材料と、を接合する。
上記の構成では、開口部形成工程において、相補型金属酸化膜半導体ウェハ及び／又は半導体ウェハに開口部が形成されることによって、開口部の内外で表面に段差が生じている。そのため、接合工程において、第１の接合材料及び第２の接合材料が水平方向に流れたとしても、開口部の外側に流れにくくなっている。即ち、第１の接合材料及び第２の接合材料を水平方向に広がりにくくすることができる。
本明細書では、半導体装置も開示する。半導体装置は、相補型金属酸化膜半導体と、別の半導体と、を備える。相補型金属酸化膜半導体は、表面に位置する保護膜と、相補型金属酸化膜半導体内に位置する金属材料と、保護膜が位置する側の面である第１の面から金属材料に通じる導通孔と、導通孔内及び第１の面上に位置する第１の接合材料と、を備える。半導体は、第２の面と、第２の面上に位置する第２の接合材料であって、第１の接合材料に接合されている第２の接合材料と、備える。半導体装置は、相補型金属酸化膜半導体の第１の面上と、半導体の第２の面上と、のうち、少なくとも一方の面上に非貫通の開口部を備える。第１の接合材料及び第２の接合材料は、一方の面上において開口部が位置する部分の少なくとも一部に充填されている。半導体装置は、上記の製造方法によって製造される半導体装置に対応している。即ち、上記の構成によっても、第１の接合材料及び第２の接合材料を水平方向に広がりにくくすることができる。
第１実施例の開口部形成工程を説明するための断面図である。 第１実施例の開口部形成工程を説明するための断面図である。 第１実施例の開口部形成工程を説明するための断面図である。 第１実施例の導通孔形成工程を説明するための断面図である。 第１実施例の配置工程を説明するための断面図である。 第１実施例の配置工程を説明するための断面図である。 第１実施例の接合工程を説明するための断面図である。 シールリングを備える半導体装置の上面図である。 図８の一点鎖線ＩＸで切断した断面図である。 第２実施例の開口部形成工程を説明するための断面図である。 第２実施例の開口部形成工程を説明するための断面図である。 第２実施例の開口部形成工程を説明するための断面図である。 第２実施例の導通孔形成工程を説明するための断面図である。 第２実施例の配置工程を説明するための断面図である。 第２実施例の配置工程を説明するための断面図である。 第２実施例の接合工程を説明するための断面図である。 第３実施例の開口部形成工程及び溝部形成工程を説明するための断面図である。 第３実施例の開口部形成工程及び溝部形成工程を説明するための断面図である。 第３実施例の開口部形成工程及び溝部形成工程を説明するための断面図である。 第３実施例の導通孔形成工程を説明するための断面図である。 第３実施例の配置工程を説明するための断面図である。 第３実施例の接合工程を説明するための断面図である。 第３実施例の接合工程を説明するための断面図である。 第４実施例の溝部形成工程を説明するための断面図である。 第４実施例の接合工程を説明するための断面図である。 第５実施例の開口部形成工程を説明するための断面図である。 第５実施例の接合工程を説明するための断面図である。 第６実施例の溝部形成工程を説明するための断面図である。 第６実施例の接合工程を説明するための断面図である。 第７実施例の溝部形成工程を説明するための断面図である。 第７実施例の接合工程を説明するための断面図である。
最初に、以下に説明する実施例の特徴を列記する。なお、ここに列記する特徴は、何れも独立して有効なものである。
（特徴１）半導体装置の製造方法の開口部形成工程において、第１の部分の内側及び外側に及ぶ範囲に非貫通の開口部を形成してもよい。
（特徴２）半導体装置の製造方法は、さらに、接合工程の前に、一方の部分の全周を囲む溝部であって、一方の部分の外側、かつ、開口部の内側に位置する溝部を形成してもよい。この構成によると、接合工程において、溝部に到達した第１の接合材料及び第２の接合材料は、溝部内に流れる。そのため、第１の接合材料及び第２の接合材料を水平方向により広がりにくくすることができる。
（特徴３）半導体装置は、第１の面上に非貫通の開口部を備えていてもよい。
（特徴４）半導体装置は、さらに、開口部の内側の特定の領域の全周を囲む溝部を備えていてもよい。
（第１実施例）
図１〜９を参照して、第１実施例の半導体装置の製造方法を説明する。
（開口部形成工程）
まず、図１に示すように、相補型金属酸化膜半導体（以下ではＣＭＯＳ（Complementary Metal-Oxide Semiconductorの略）と呼ぶ）ウェハ２を準備する。ＣＭＯＳウェハ２は、ベアウェハ４と、回路６と、シリコン酸化膜１０と、金属部材１２と、シリコン窒化膜１４と、を備える。ベアウェハ４は、シリコン等からなる基板である。ベアウェハ４は、板状体である。回路６は、ベアウェハ４上に位置する。回路６は、トランジスタ回路等の電気回路である。シリコン酸化膜１０は、ベアウェハ４及び回路６を覆っている。シリコン酸化膜１０は、絶縁材として用いられている。金属部材１２は、シリコン酸化膜１０内に位置する。なお、図示省略しているが、シリコン酸化膜１０内には、金属部材１２の他にも別の金属部材が位置していてもよい。この場合に、金属部材１２は、複数の金属部材のうち、最も上方（即ち、ベアウェハ４から最も遠く）に位置しているものとする。シリコン酸化膜１０の表面には段差が形成されている。第１の表面４０は、シリコン酸化膜１０の表面のうち、金属部材１２の上方及びその近傍の部分である。第２の表面４２は、シリコン酸化膜１０の表面のうち、第１の表面４０を除く部分である。第１の表面４０は、第２の表面４２よりも高い位置にある。シリコン窒化膜１４は、略一定の厚さでシリコン酸化膜１０を覆っている。シリコン窒化膜１４は、ＣＭＯＳウェハ２の耐湿性を向上させるために用いられている。第３の表面３４は、第１の表面４０を覆うシリコン窒化膜１４の部分である。第４の表面３６は、第２の表面４２を覆う部分である。第３の表面３４は、第４の表面３６よりも高い位置にある。本実施例では、シリコン酸化膜１０とシリコン窒化膜１４との２層の膜が形成されているが、変形例では、これらの膜が交互に積層され、３層以上の膜が形成されていてもよい。ただし、最上層は、シリコン窒化膜であることが好ましい。シリコン酸化膜１０のうち、金属部材１２の側方及び下方に位置する部分を層間絶縁膜８と呼ぶ。層間絶縁膜８は、層間絶縁膜に含まれる金属部材１２（及び他の金属部材）を絶縁するために形成されている。シリコン酸化膜１０のうち、層間絶縁膜８を除く部分（即ち、金属部材の上方に位置する部分）と、シリコン窒化膜１４と、をパッシベーション膜９と呼ぶ。パッシベーション膜９は、ＣＭＯＳウェハ２を保護するために形成されている。パッシベーション膜９は、ＣＭＯＳウェハ２の長期信頼性を確保するために、一定以上の厚さで形成されている必要がある。なお、後述する開口部６０及び導通孔７０は、パッシベーション膜９に形成される。
次いで、図２に示すように、シリコン窒化膜１４のうち、金属部材１２の上方に位置する部分（即ち、第３の表面３４の一部）を、トリフルオロメタンを用いたドライエッチングにより除去する。これにより、第１の表面４０の一部が露出する。露出した第１の表面４０は、その外側の表面（即ち、残った第３の表面３４）よりも低い位置にある。
次いで、図３に示すように、シリコン酸化膜１０が露出した部分（即ち第１の表面４０の一部）に、テトラフルオロメタン及びトリフルオロメタンを用いたドライエッチングを行う。これにより、非貫通の開口部６０が形成される。これにより、開口部６０の内外での表面に段差が生じる。
（導通孔形成工程）
次いで、図４に示すように、開口部６０の内側のシリコン酸化膜１０の一部に、テトラフルオロメタン及びトリフルオロメタンを用いたドライエッチングを行う。これにより、金属部材１２に通じる導通孔７０が形成される。
（配置工程）
次いで、図５に示すように、適切な形状に形成された接合材料１６を、導通孔７０内と開口部６０の内側の特定の部分とに配置する。ここで、特定の部分とは、開口部６０の内側のうち、導通孔７０の近傍の部分であって、開口部６０の内側全体ではない。仮に、接合材料１６を開口部６０の内側全体に配置したとすると、後述の接合工程において、接合材料が開口部６０の外側に流れるおそれがあるからである。接合材料１６は、金属、シリコン等の導電性材料である。また、接合材料１６は、後述の接合材料２６に接合された場合に、合金となる合金材料であってもよい。
次いで、図６に示すように、微小電気機械システム（以下では、ＭＥＭＳ（Micro Electro Mechanical Systemsの略）と呼ぶ）ウェハ２２を準備する。ＭＥＭＳウェハ２２は、ベアウェハ２４と、図示省略の回路と、を備える。ＭＥＭＳウェハ２２は、ＣＭＯＳウェハ２とは異なり、シリコン酸化膜及びシリコン窒化膜を備えない。続いて、適切な形状に形成された接合材料２６をベアウェハ２４上に配置する。接合材料２６は、接合材料１６と同様に、金属、シリコン、合金材料等である。
（接合工程）
次いで、図７に示すように、接合材料１６，２６を接合する。これにより、接合材料１６，２６は、接合材料３０となる。接合の手法は、熱圧着、共晶接合、ろう付け、はんだ付け等のいずれであってもよい。接合の際に、溶解した接合材料３０は、鉛直方向に押圧されることによって、開口部６０上に広がる。しかしながら、上述したように、開口部６０の内外で表面に段差が生じているため、広がった接合材料３０は、段差によってせき止められ、開口部６０の外側には流れ出ない。なお、開口部６０の内側に広がった接合材料３０は、露出したシリコン酸化膜１０（即ち、開口部６０）を覆うため、ＣＭＯＳウェハ２の耐湿性を高くすることができる。
なお、ＭＥＭＳウェハ２２のベアウェハ２４の表面は、ＣＭＯＳウェハ２の最も上方の部分（即ち、残った第３の表面３４）に当接している。これにより、ＣＭＯＳウェハ２と、ＭＥＭＳウェハ２２と、の間に適切な距離を確保し、安定した接合（即ち、大きさや形が均一な接合）を確実に形成することができる。なお、本実施例の構成以外で、安定した接合を形成する手法としては、接合材料１６，２６を厚くする構成も考えられる。しかしながら、当該構成の場合では、接合材料３０が多量になる。そのため、接合工程において、そりやたわみが生じる、接合材料３０が広がりやすくなる、接合箇所の大きさや高さを適切となるように調整することが困難になる等の問題が生じる。
以上の各工程によって、半導体装置を製造することができる。
図８では、ＣＭＯＳウェハ２とＭＥＭＳウェハ２２との間に１２個の接合を形成する場合の半導体装置１の上面を簡略的に示している。図９には、図８の一点鎖線ＩＸの位置で切断した半導体装置１の断面図を示す。このように、接合は、複数個形成されてもよい。本実施例では、接合が複数個形成されたとしても、接合材料３０が広がりにくくなっているため、接合箇所同士が接触することを防止することができる。特に接合箇所の間隔が狭い場合に、接合箇所同士の接触防止の効果は有用である。
ＣＭＯＳウェハ２、ＭＥＭＳウェハ２２には、それぞれ、シールリング材料１１，１３が配置されている。シールリング材料１１，１３は、１２個の接合箇所の全周に形成されている。シールリング材料１１は、図示省略のシリコン窒化膜１４上に形成されている。即ち、シールリング材料１１を配置するために、シリコン酸化膜１０及びシリコン窒化膜１４を除去する必要はない。シールリング材料１３は、ベアウェハ２４上に形成されている。シールリング材料１１，１３は、接合材料と同様に、金属、シリコン、合金材料等であってもよい。シールリング材料１１，１３は、導電性のない材料であってもよい。シールリング材料１１，１３が接合されることによって、１２個の接合箇所が位置する空間の密封性を確保し、耐湿性をより高くすることができる。
（第１実施例の効果）
本実施例によると、開口部形成工程において、ＣＭＯＳウェハ２に開口部６０が形成されることによって、開口部６０の内外で表面に段差が生じている。そのため、接合工程において、接合材料３０が開口部６０の外側に流れにくくなっている。即ち、接合材料３０を水平方向に広がりにくくすることができる。
（第２実施例）
図１０〜１６を参照して、第２実施例の半導体装置の製造方法を、第１実施例とは異なる点を中心に説明する。
図１０に示すように、初期状態において、ＣＯＭＳウェハ１０２には、シリコン酸化膜１１０及びシリコン窒化膜１１４の表面は、それぞれ一定の高さであり、段差が形成されていない。即ち、パッシベーション膜１０９の形状は、第１実施例のパッシベーション膜９とは異なる。
図１１〜１６は、第１実施例の図２〜７と同様である。図１６では、ＭＥＭＳウェハ２２のベアウェハ２４の表面は、ＣＭＯＳウェハ１０２の残ったシリコン窒化膜１１４全体に当接している。
（第２実施例の効果）
本実施例でも第１実施例と同様の効果が得られる。
（第３実施例）
図１７〜２３を参照して、第３実施例の半導体装置の製造方法を、第１実施例とは異なる点を中心に説明する。
図１７は、第１実施例の図１と同様である。
図１８に示すように、第１実施例の図２よりも広い範囲のシリコン窒化膜１４にドライエッチングを行う。具体的には、第３の表面３４全体と、第４の表面３６のうち、第３の表面３４近傍の部分と、にドライエッチングを行う。これにより、第１の表面４０全体と、第２の表面４２のうち、第１の表面４０近傍の部分と、が露出する。
図１９に示すように、第１実施例の図３と同様に、シリコン酸化膜１０が露出した部分（即ち、第１の表面４０全体と、第２の表面４２のうち、第１の表面４０近傍の部分）にドライエッチングを行う。これにより、ドライエッチングを行った範囲全体に、非貫通の開口部２６０が形成され、第２の表面４２のうち、第１の表面４０近傍の部分に溝部２９０が形成される。即ち、溝部２９０は、開口部２６０の内側であって、開口部２６０の外縁に接するように形成されている。また、溝部２９０は、後述する接合材料１６が配置される部分の全周を囲むように形成されている。
図２０〜２２は、第１実施例の図４〜６と同様である。
図２３に示すように、接合材料１６，２６を接合する。これにより、接合材料１６，２６は、接合材料２３０となる。接合材料２３０は、第１実施例の図７と同様に、開口部２６０上に広がる。しかしながら、広がった接合材料２３０は、溝部２９０に流れる。溝部２９０の内側（即ち開口部２６０の内側）の表面と、開口部２６０の外側の表面と、に段差が形成されているため、広がった接合材料２３０は、段差によってせき止められ、開口部２６０の外側に流れない。なお、ＭＥＭＳウェハ２２のベアウェハ２４の表面は、ＣＭＯＳウェハ２の最も上方の部分（即ち、除去されずに残ったシリコン窒化膜１４の部分）に当接している。
（第３実施例の効果）
本実施例でも、第１実施例と同様の効果が得られる。本実施例では、さらに、ＣＭＯＳウェハ２に溝部２９０が形成されているため、接合材料２３０を開口部２６０の外側により流れにくくすることができる。
（第４実施例）
図２４，２５を参照して、第４実施例の半導体装置の製造方法を、第３実施例とは異なる点を中心に説明する。なお、以降の各実施例では、開口部形成工程、導通孔形成工程、配置工程、及び、溝部形成工程を図示省略する。
（接合工程）
図２４に示すように、本実施例では、第３実施例と比べて、溝部４９０が開口部４６０のより内側に形成されている。
図２５に示すように、接合材料１６，２６を接合する。これにより、接合材料１６，２６は、接合材料４３０となる。広がった接合材料４３０は、溝部４９０に流れる。溝部４９０の内側の表面と、溝部４９０の外側、かつ、開口部４６０の内側の表面と、に段差が形成されているため、広がった接合材料４３０は、段差によってせき止められ、溝部４９０の外側に流れにくくなっている。また、開口部２６０の内外の表面に段差が形成されているため、仮に、接合材料４３０が、溝部４９０の外側に流れたとしても、開口部２６０の外側には流れない。
（第４実施例の効果）
本実施例でも、第３実施例と同様の効果を得ることができる。
（第５実施例）
図２６，２７を参照して、第５実施例の半導体装置の製造方法を、第２実施例とは異なる点を中心に説明する。
図２６に示すように、本実施例では、ＭＥＭＳウェハ５２２に開口部５６０が形成されている。図示省略するが、開口部５６０は、開口部形成工程において、ベアウェハ２４を切削することによって、形成される。一方において、ＣＭＯＳウェハ１０２には、導通孔５７０は形成されているが、開口部は形成されていない。即ち、シリコン酸化膜１１０及びシリコン窒化膜１１４のうち、導通孔５７０が位置する部分のみが除去されている。接合材料１６は、導通孔５７０と、シリコン窒化膜５１４のうち、導通孔５７０近傍の部分と、に配置されている。接合材料２６は、開口部５６０の内側に配置されている。
図２７に示すように、接合材料１６，２６を接合する。これにより、接合材料１６，２６は、接合材料５３０となる。接合の際に、溶解した接合材料５３０は、鉛直方向に押圧されることによって、開口部５６０上に広がる。しかしながら、開口部５６０の内外で表面に段差が生じているため、広がった接合材料５３０は、段差によってせき止められ、開口部５６０の外側には流れ出ない。なお、ＭＥＭＳウェハ５２２のベアウェハ２４の最も高い部分（即ち開口部５６０の外側の部分）は、ＣＭＯＳウェハ２の残ったシリコン窒化膜１１４に当接している。
（第５実施例の効果）
本実施例によると、開口部形成工程において、ＭＥＭＳウェハ５２２に開口部５６０が形成されることによって、開口部５６０の内外で表面に段差が生じている。そのため、接合工程において、接合材料５３０が開口部５６０の外側に流れにくくなっている。即ち、接合材料５３０を水平方向に広がりにくくすることができる。
さらに、本実施例によると、シリコン窒化膜１１４が除去される範囲が狭い。また、当該範囲は、接合材料１６が配置される。従って、第１〜４実施例と比べて、ＣＭＯＳウェハ１０２の耐湿性をより高くすることができる。
（第６実施例）
図２８，２９を参照して、第６実施例の半導体装置の製造方法を、第５実施例とは異なる点を中心に説明する。
図２８に示すように、第５実施例の図２６と同様に、ＭＥＭＳウェハ６２２に開口部６６０が形成されている。本実施例では、さらに、溝部６９０が、開口部６６０の内側であって、開口部６６０の外縁に接するように形成されている。
図２９に示すように、接合材料１６，２６を接合する。これにより、接合材料１６，２６は、接合材料６３０となる。接合材料６３０は、第５実施例の図２７と同様に、開口部６６０上に広がる。しかしながら、広がった接合材料６３０は、溝部６９０に流れる。溝部６９０の内側（即ち開口部６６０の内側）の表面と、開口部６６０の外側の表面と、に段差が形成されているため、広がった接合材料６３０は、段差によってせき止められ、開口部６６０の外側に流れない。
本実施例でも、第５実施例と同様の効果が得られる。本実施例では、さらに、ＭＥＭＳウェハ６２２に溝部６９０が形成されているため、接合材料６３０を開口部６６０の外側により流れにくくすることができる。
（第７実施例）
図３０，３１を参照して、第７実施例の半導体装置の製造方法を、第６実施例とは異なる点を中心に説明する。
図３０に示すように、本実施例では、第６実施例と異なり、溝部７９０が開口部７６０のより内側に形成されている。
図３１に示すように、接合材料１６，２６を接合する。これにより、接合材料１６，２６は、接合材料７３０となる。広がった接合材料７３０は、溝部７９０に流れる。溝部７９０の内側の表面と、溝部７９０の外側、かつ、開口部７６０の内側の表面と、に段差が形成されているため、広がった接合材料７３０は、段差によってせき止められ、溝部７９０の外側に流れにくくなっている。また、開口部７６０の内外に段差が形成されているため、仮に、接合材料７３０が、溝部７９０の外側に流れたとしても、開口部７６０の外側には流れない。
（第７実施例の効果）
本実施例でも、第６実施例と同様の効果を得ることができる。
以上、本発明の具体例を詳細に説明したが、これらは例示にすぎず、特許請求の範囲を限定するものではない。特許請求の範囲に記載の技術には、以上に例示した具体例を様々に変形、変更したものが含まれる。上記の実施例の変形例を以下に列挙する。
（変形例１）第１実施例の図３では、開口部６０がＣＭＯＳウェハ２に形成され、第５実施例の図２６では、開口部５６０がＭＥＭＳウェハ２２に形成されている。即ち、開口部は、ＣＭＯＳウェハと、ＭＥＭＳウェハと、のうち、一方にのみ形成されている。変形例では、開口部は、ＣＭＯＳウェハ及びＭＥＭＳウェハの両方に形成されていてもよい。即ち、「第１の部分」と、「第２の部分」と、の両方の部分の内側及び外側に及ぶ範囲に開口部が形成されていてもよい。
（変形例２）第３実施例の図１９では、溝部２９０がＣＭＯＳウェハ２に形成され、第６実施例の図２８では、溝部６９０がＭＥＭＳウェハ６２２に形成されている。即ち、溝部は、ＣＭＯＳウェハと、ＭＥＭＳウェハと、のうち、一方（即ち、開口部が形成されているウェハ）にのみ形成されている。しかしながら、溝部は、ＣＭＯＳウェハと、ＭＥＭＳウェハと、のうち、他方（即ち、開口部が形成されていないウェハ）のみに形成されていてもよい。この場合、溝部は、配置工程において接合材料が配置される部分の全周を囲むように形成される。また、溝部は、ＣＭＯＳウェハ及びＭＥＭＳウェハの両方に形成されていてもよい。
（変形例３）各実施例のＭＥＭＳウェハに代えて、例えば、ＣＭＯＳウェハ、参照双極性相補型金属酸化膜半導体（ＢＩＣＭＯＳ（Bipolar Complementary Metal-Oxide Semiconductorの略））ウェハ等の他の種類のウェハを用いてもよい。即ち、「別の半導体ウェハ」は、どのような種類の半導体ウェハであってもよい。
（変形例４）各実施例では、２個の半導体ウェハを接合することによって、半導体装置を製造する。変形例では、実施例の各工程を繰り返し、３個以上の半導体ウェハを接合することによって、半導体装置を製造してもよい。
（変形例５）各実施例では、ＭＥＭＳウェハの表面には、シリコン酸化膜及びシリコン窒化膜が形成されていないが、変形例では、形成されていてもよい。本変形例において、ＭＥＭＳウェハに開口部や溝部を形成する場合では（第５〜７実施例参照）、シリコン酸化膜及びシリコン窒化膜のうち、開口部や溝部が位置する部分が除去される。
２，１０２：ＣＭＯＳウェハ、４，２４：ベアウェハ、６：回路、８：層間絶縁膜、９，１０９：パッシベーション膜、１０，１１０：シリコン酸化膜、１１，１３：シールリング材料、１２：金属材料、１４，１１４，５１４：シリコン窒化膜、１６，２６，３０，２３０，４３０，５３０，６３０，７３０：接合材料、２２，５２２，６２２：ＭＥＭＳウェハ、３４：第３の表面、３６：第４の表面、４０：第１の表面、４２：第２の表面、６０，２６０，４６０，５６０，６６０，７６０：開口部、７０，５７０：導通孔、２９０，４９０，６９０，７９０：溝部

Claims (6)

  1. 表面に保護膜を備える相補型金属酸化膜半導体ウェハと、別の半導体ウェハと、を備える半導体装置の製造方法であって、
    前記相補型金属酸化膜半導体ウェハの第１の部分と、前記半導体ウェハの第２の部分と、のうち、少なくとも一方の部分を取り囲む開口範囲に非貫通の開口部を形成する、開口部形成工程であって、前記第１の部分は、前記相補型金属酸化膜半導体ウェハのうち、前記保護膜が位置する表面の一部分及びその下方に位置する部分を含み、前記第２の部分は、前記半導体ウェハのうち、前記半導体ウェハの表面の一部分及びその下方に位置する部分を含み、前記開口範囲が位置するウェハの表面には、前記開口範囲と、前記開口範囲の外側に位置する非開口範囲と、が存在する、前記開口部形成工程と、
    前記相補型金属酸化膜半導体ウェハ内の金属材料に通じる導通孔を前記第１の部分の内側に形成する、導通孔形成工程と、
    第１の接合材料を前記導通孔内及び前記第１の部分に配置し、第２の接合材料を前記第２の部分に配置する、配置工程と、
    前記配置された第１の接合材料と、前記配置された第２の接合材料と、を接合する接合工程と、を備える、半導体装置の製造方法。
  2. 前記開口部形成工程において、前記第１の部分を取り囲む前記開口範囲に非貫通の前記開口部を形成する、請求項１に記載の半導体装置の製造方法。
  3. 前記製造方法は、さらに、
    前記接合工程の前に、前記少なくとも一方の部分の全周を囲む溝部であって、前記少なくとも一方の部分の外側、かつ、前記開口部の内側に位置する前記溝部を形成する、溝部形成工程を備える、請求項１又は２に記載の半導体装置の製造方法。
  4. 半導体装置であって、
    相補型金属酸化膜半導体ウェハと、別の半導体ウェハと、を備え、
    前記相補型金属酸化膜半導体ウェハは、
    表面に位置する保護膜と、
    前記相補型金属酸化膜半導体ウェハ内に位置する金属材料と、
    前記保護膜が位置する側の面である第１の面から前記金属材料に通じる導通孔と、
    前記導通孔内及び前記第１の面上に位置する第１の接合材料と、を備え、
    前記半導体ウェハは、
    第２の面と、
    前記第２の面上に位置する第２の接合材料であって、前記第１の接合材料に接合されている前記第２の接合材料と、を備え、
    前記半導体装置は、
    前記相補型金属酸化膜半導体ウェハの前記第１の面上と、前記半導体ウェハの前記第２の面上と、のうち、少なくとも一方の面上に非貫通の開口部を備え、
    前記第１の接合材料及び前記第２の接合材料は、前記一方の面上において前記開口部が位置する部分の少なくとも一部に充填されている、半導体装置。
  5. 前記半導体装置は、前記第１の面上に非貫通の前記開口部を備える、請求項４に記載の半導体装置。
  6. 前記半導体装置は、さらに、
    前記開口部の内側の特定の領域の全周を囲む溝部を備える、請求項４又は５に記載の半導体装置。
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