TW478015B - Lateral thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode - Google Patents

Lateral thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode Download PDF

Info

Publication number
TW478015B
TW478015B TW089117153A TW89117153A TW478015B TW 478015 B TW478015 B TW 478015B TW 089117153 A TW089117153 A TW 089117153A TW 89117153 A TW89117153 A TW 89117153A TW 478015 B TW478015 B TW 478015B
Authority
TW
Taiwan
Prior art keywords
region
lateral
soi
layer
gate electrode
Prior art date
Application number
TW089117153A
Other languages
English (en)
Inventor
Mark Simpson
Theodore Letavic
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of TW478015B publication Critical patent/TW478015B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/404—Multiple field plate structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Thin Film Transistor (AREA)

Description

五、發明說明（]) 孩發明係處於絕緣層上矽（S0I)裝置之領域中，而 特別的是關係到適於高壓應用的S 〇丨裝置。 更馬 於製造高電壓功率裝置中，在慣例必須在擊穿電壓 寸’"開”電阻以及製造簡化與信賴性的領域中作成取捨应 文k，通常改吾一參數像是擊穿電壓將導致另—個 是||開”電阻的退化’在理想上如此之裝置可以特性化 領域中的優秀特徵而能最小化作業上與製造上的缺點。 橫向薄膜SOI裝置之一特別有利的型式包括一半導體美 質，於該基質上之-埋藏絕緣層以及在該埋藏絕緣層2 S01層内之—橫向電晶體裝ϋ裝置像是-M〇SFET包括 在該埋藏絕緣層上之一半導體表面層且具有_第_導電型 心一源極區域（其於與第一導電型所有者相反之—第二導 私型的一個區域内加以形成），該本體區域之—通道區之上 的-個至少實質地加以絕緣且從那裡加以絕緣的閘：電極 ，孩第-導電型之-橫向漂流區$，以及藉由没極區域也 通道區域橫向加以分隔之第一導電型的汲極區域。 此型式之-裝置係於圖i中加以顯示，共同地與美國專利 案號5,246,870 (被導至一方法）與5,4丨2,241 (被導至一裝置） 相關，與該立即的專利申請案共同地被讓渡且加以組：： 此作爲參照，圖1之前述專利中所顯示的該s〇l m〇sfet裝 置具有不同的特性，像是具有-線性橫向摻雜區域與_$ 覆電場板之一薄SOI層以強化操作.，此裝置如習知者般係: 一η-通道或NMOS電晶體，具備n_型源極與汲極區域，使2 習知被參照爲NMOS電晶體的一種製程加以製程。 -4 - 478015 A7 B7 五、發明說明（2 用於強化SOI功率裝置的高電壓與高電流效能參數的更 先進技勢係加以顯示於美國專利申請案序號08/998,048中 ，其中本申請案係爲一 CIp，於1997年12月24日提出申請， 與该三即的專利申請案共同地被讓渡且加以組合與此作爲 參照，然而於改善一 S0I裝置效能的另一個技術係爲形成一 混合裝置，其將一個以上形式的裝置構築組合成爲一單一 構造，所以例如在1998年7月24曰所提出申請的美國專利申 凊案序唬09/122,407中，其與該立即的專利申請案共同地被 痕渡且加以組合與此作爲參照，一 s〇i裝置係加以揭露，其 包括在相同構造中的一個橫向DM〇s電晶體與一 ligb電晶 體 ii-----Mi— 經 濟 部 智 慧 財 產 局 消 費 合 作 社 印 製 所以很明顯地無數的技藝與處理方式已被使用以強化功 率半導體裝置的效能，持續的努力以便獲致如此的參數像 是擊穿電壓，尺寸，電流攜帶能力與製造容易的一個更爲 接近最佳化之組合，雖然所有前述的構造提供了裝置效能 上的不同程度的改良，然而沒有一種裝置或構造能完全地 最佳化所有用於高電壓，高電流作業的設計需求。 因此想要有一種可以在高壓，高電流環境内作用之一電 晶體裝置構造，其中作業參數而且特別是擊穿電壓係更進 一步地加以最佳化。 因而本發明之一目的在於提供一種可以在高壓，高電流 環境内作用之一電晶體裝置構造，該發明之一更進一步的 目的在於提供如此之一電晶體裝置，其中作業參數像是擊 穿電壓係加以強化。 線- 5- 經濟部智慧財產局員工消費合作社印製 478015 五、發明說明（3 , 根據▲ ^明，此等目的係於敎述於上的形式之一橫向薄 月吴SOI裝$置構造中加以達到，其中一介電層係被提供於該絕 緣區之至少一部份與該閘極電極上，而一場板電極係被提 供於该介電層之至少一部份上（其直接與該絕緣區接觸）， 而該場板電極係加以連接至該橫向電晶體裝置之一電極。 糸汶I明之一較佳具體實例中，該介電層加上絕緣層 (即總上邵絕緣的厚度）約係等於該埋藏絕緣層之一厚度 ’典型的介電層加上絕緣層之總厚度以及埋藏絕緣層之厚 度將係至少各爲約2微米以上，而至少約3微米爲佳。 於該發明之又一較佳具體實例中，該閘極電極延伸超過 該橫向漂移區之一半，而該場板電極係加以連接至橫向電 晶體裝置之閘極電極或源極電極之一。 、％ 根據本發明之橫向薄膜S0I裝置提供了 一顯著的改善，即 喜好的效能特性(使該裝置適合在一高壓，高電流的環境且 特別是在高擊穿電壓下作業）之一組合可加以達成。 該發明乏此等與其他方面將自此後所加、 、 、 々以敘述之具體實 例並參照之而更爲明顯並elucidated。 該發明參照後敘説明並結合附圖加以研讀可以得 完整的瞭解： 請示了-先前技藝的橫向薄膜s〇I裝置之—簡化橫剖 面視圖； 圖2顯示了根據該發明之一較佳具體實例的一個棒向尊 膜SOI裝置之一簡化橫剖面視圖；以及 圖3顯示了根據該發明之又一較佳具體實例的一個橫向 6 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） il4·! (請先閱讀背面之注意事項再填寫本頁) 訂· · -1線* 478015 B7 五、發明說明（4 薄膜S ΟI裝置之一簡化橫剖面視圖。 於該圖形中，具有相同導電形態之半導體區域大致上於 才灵剖面視圖中以相同方向的斜線加以顯示，且應瞭解該圖 形並非按照比例加以繪製。 於圖1之一簡化的橫剖面示圖中，一橫向薄膜裝置，此處 係爲一 SOI MOS電晶體20包括一半導體基質22，一埋藏絕 緣層24以及其中該裝置係被製造之一半導體表面3〇1層％ ，茲M〇S電晶體包括一導電型式的一個源極區域28，相反 導電型式之一第二型式的本體區域3〇，該第一導電型式之 一橫向漂流區域32以及亦爲第一導電型式之一汲極區域“ ，藏基本的簡化裝置構造係藉由一閘極電極刊所完成，所 訂 顯示者如同藉由一氧化物絕緣區域38完全地與其下之半導 體表面層26絕緣，雖然可以瞭解針對一 JFET裝置，一電氣 連接將被形A於以；ί；同的方式加以絕緣的閘^電極以及其 下裝置的半導體閘極區域之間，於該發明之範田壽之内充當 對於本發明起點之M0S電晶體可具有不同的效能強化特性 像疋一階段式的氧化物區域38Α，38Β，形& 一場板部份ΜΑ ，36Β之一延伸閘極電極以及一薄橫向漂流區域部份32α， 於前述先前技藝中的所有詳述者船， j叶4有如，或是如所想要的其他 效能強化特性都未偏離本發明的精神與範疇，此外該刪 電晶體20亦可包括—表面接點區域4〇與源極區域28相接觸 ，位於圖1的先料藝構造的本體内，其係藉由-介電層42 加以芫成，其上提供有一金屬拉 ,、Λ 屬接·，、、占層44，此處加以顯示爲 接觸閘極電極36，代表$曰；、風、、人 代衣夕曰曰矽牙過孩介電層42中之一穿孔 ΐί氏張尺度義_家鮮 A7 五、發明說明（5 ) (請先閱讀背面之注意事項再填寫本頁) ’要 >王意1¾先可技藝裝置中的金屬接點層44係完全地位於 問極電極36足上’所以該金屬接點層44不能充當關於該裝 置的以下邵份之一場板電極。 應瞭解孩圖形中所顯示的簡化，代表裝置敘述了特別的 裝置構造’但在該發明的範疇内之裝置外形與結構兩方面 的廣汎變化亦可加以使用，此外本發明可加以組合成無數 不同形式的高壓薄層S0I裝置，其具備爲那些熟習於此技藝 者所周知的不同底下構造，像是LDM〇s電晶體，LIGB電晶 體以及JFET裝置。 經濟部智慧財產局員工消費合作社印製 雖然如上述與圖1連接的先前技藝的構造大致上具備良 好的作業特性’其仍舊受限於最大可達擊穿電壓定格，此 係因該最大可達擊穿電壓依S〇i層的厚度以及埋藏層與以 上或'’上’’絕緣區域兩者的厚度而定，對於約6〇〇-7〇〇伏特範 圍内之一名義上的擊穿電壓，該埋藏絕緣層將具有約2_3微 米的一個厚度，其爲了最佳化效能之故將藉由大約相同厚 度的一個上（場氧化物）絕緣區域加以平衡，然而若是想要 有較向的擊穿電壓，則該SOI層的厚度必須加以減少或者是 絶緣區域的厚度必須加以增加，因爲減少該S 〇 I層厚度將使 該裝置的開態（on-state)特性嚴重地退化，故在實用上於擊 穿電壓的更進一步改善須知絕緣層的厚度增加。 將該埋藏層的厚度增加到約4-5微米係可使用已知技術 加以達成，雖然成本限制，製造困難度以及熱考量目前將 貫用的厚度限制於約此數値，爲了最佳化效能，該埋藏絕 緣層的厚度應藉由一上絕緣層加以平衡或匹配，所以沿著 -8- 本紙張尺度適用中國國家標準（CNS)A4規格（21G X 297公爱) ----- 478015 經濟部智慧財產局員工消費合作社印製 五、發明說明（6 SOI層的任何橫向位置處，絕緣材料的總厚度（如以下所討 娜者般该介電層加上上絕緣區域）將導致在S0I層表面處的 一個垂直電場，其約等於或小於鄰近埋藏絕緣層之so〖層底 邵處的垂直電場，如以下所討論者般使用習知的材料用於 不同的絕緣與介電層將產生一構造，其中該介電層與上= 緣層的總厚度約等於埋藏絕緣層的厚度，然而因該上氧絕 緣層係藉由熱氧化所產生，所以對於此層所能達到的厚2 有一上限約2微米，此係因控制熱氧化化學製程的固有:二 限制，隨著氧化厚度的增加，減少回復的一點係被達成以 便增加氧化時間及/或溫度不再導致氧化物厚度的顯著增 加，此現象已知爲迪爾_葛洛夫（Deal_Gr〇ve)氧化定律，: 且馬那些一般熟習於該技藝者所周知，因此爲了達成一較 厚的上絕緣區域，必須使用一些其他的技術。 於圖2的該裝置構造中，如此一個較厚的上絕緣區域係藉 由下述在该裝置的上表面處的一個構造變化於該裝置的相 關部份（本質上該漂流區域的汲極側區域以上的那個 中加以達成。 77 於圖2中所顯示的該裝置中，圖1中形成-場板之延伸門 極構造的該部份36A，36B係在橫方向上加以縮短，中斷^ 漂流區域32的中間部份之上，所以該間極電極延伸超過約 一半的漂流區域，而非如圖丨般延伸超過大部份的潭士區 ，介電層42係被提供於氧化物區域38B處閘極電極二二二二 區域的現在已曝光部份之上，介電層42爲一沉㈣= TE0S (四燒正石夕酸鹽）或石夕氮化物爲有利。 ％疋 請 先 閱 讀 背 面 之 注 意 事 項
頁 I 訂 線 泰紙張尺度適財關家鮮格咖x 29?^ 478015 A7 B7 五、發明說明（7 ) 相對於圖1的先前技藝的結構，於圖2的構造中，該閘極 黾極金屬接點層4 4除了閘極電極3 6外不停止，但如圖2中所 頒示者般橫向延伸向右通過閘極電極3 6的橫向中止，並且 向下至介電層42上越過上絕緣區域38B之右手側之上，越過 /τκ 4區域3 2之右手側之上，該閘極電極金屬接點層4 *之此 延伸於圖2中加以指定爲44 A充當形成一場板電極（其強化 了該裝置的高電壓效能）。 根據该發明，該介電層4 2的提供充當兩種目的，第一， 其如先前技蟄中一般提供了一上絕緣層用於閘極電極3 6， 而第二，其充當增加場板電極部份44A與底下的漂流區域 32間的絕緣材料的總厚度，此舉依次允許該底下的埋藏層 24作得較厚，但同時又在該漂流區域之上提供絕緣材料的 一個總厚度，其約等於漂流區域以下的絕緣材料厚度，因 此以先前技藝中不可能的一種方式最佳化用於高電壓作業 的裝置結構，此處的場板藉由延伸超過大部份的漂流區域 之一主要由熱氧化物的厚度户斤決定的距離之閘極電極_ -個延伸36A加以形成，因如上所附註者般，此熱氧化物 係爲其最大可達成厚度所限，肖最有利的實體結構也就是 説一較厚的埋藏絕緣層與具備一總厚度约等於埋藏絕緣層 所有者之一上絕緣層無法加以達成。 曰 *應明瞭許多不同的結構與替代係被預期處於該發明的範 田壽之内，該埋藏絕緣層的厚度以及介電層與絕緣區域的總 厚度應各爲至少2微米以上’且最好爲至少3微米，使用現 在可用的技術並考慮實用性像是成本限制，製造困難度以 __-10- 本紙張尺度適中國國家標準（CNS)A4規格（21G X 297公爱 --·--Γ.--hi — — — — --- (請先閱讀背面之注意事項再填寫本頁) ·. -線· 經濟部智慧財產局員工消費合作社印製 1 局 員 工 消 費 478015 五、發明說明（8 ) 及煞的考里，该漂泥區域以上與以下的總絕緣厚度各使斥 現在的技術可被增加至約4_5微米，雖然該發明係表達爲不 限万；此厚度將文到瞭解，亦應瞭解因在該絕緣區域^的遷 厚部份38B處僅可加以形成至約爲2微米的一個厚度，故爲 了達到用於-給定的應用的上絕緣層之想要總厚度，該上 絶緣區的想要總厚度的其餘部份將從介電層42加以形成。 _該發明的另一個應用亦加以顯示於圖3之簡化的橫剖面 不圖中’因爲圖3中所顯示的該裝置構造的較低部份係與圖 2中所顯示的裝置構造所有者完全相同，類似的元件被指定 爲類似的參考數字，該裝置的此部份將更進—步地加以詳 述於此，該圖3的構造與圖2中所顯示者之不同處在於該場 板包極44不僅延伸至右（44Α)方亦延伸左（44…方，並且向 下延伸至8〇1層26穿過疊覆層中之_通孔以接觸源極區域 28以及閘極電極36以外的表面接觸區4Q，此結構且備減少 二結構的米勒(Miner)電容的額外優點，且應注意此結構 U中该閘極電極與場板電極係爲電氣式地獨 藝二該場板係爲該問極電極之一整體延= 、不把自此電氣式地獨立）中加以達成。 :發曰:：前述方式提供了可在高電壓’冑電流的環境下 特之一電晶體裝置構造，但是強化作業參數而且 特别疋擊穿電壓。 =明：特別地參照其之數個較佳具體實例加以顯示 /曰敘以時，對於那些熟習於該技藝者將瞭解在不偏離該發 明的精神或範疇之下可能作成無數在 ' 仏〜八與砰細上的改變 L_______ -11 - 本紙張尺度翻中國g^^s)A4規格⑽x 297公互
I 478015 A7 B7 五、發明說明（9 ) ，於此專例申請案中應瞭解在一元件之前的字na’’或nan"並 不排除數個如此元件的出現，而該字ncomprising"並不排除 那些加以敘述或申請專利的其他元件或步驟的出現。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 -12 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）

Claims (1)

  1. A BCD 478015 六、申請專利範圍 1. 一橫向薄膜絕緣層上矽（SOI)裝置，包含一半導體基質 (22)，一於該基質上之埋藏絕緣層（24)以及一於該基質上 之SOI層（26)中之一橫向電晶體裝置；並且具有與第一型 所有者相反之一第二導電型的一個本體區域（30)内所形 成之一第一導電型的一個源極區（28)，鄰近該本體區之 該第一導電型之一橫向漂移區（32)，藉由該橫向漂移區 與該本體區分隔之該第一導電型之一汲極區（34)，以及 該本體區之一部份之上的一個閘極電極（36)(其中一通道 區係在作業期間加以形成且在鄰近該本體區於該橫向漂 移區之一部份上延伸），該閘極電極藉由一絕緣區（3 8， 3 8 A)至少實質上與該鄰近的本體區以及漂移區絕緣；更 包含該絕緣區之至少一部份與該閘極電極上之一介電層 (42)，以及該介電層之至少一部份上之一場板電極（44， 44A)(其直接與該絕緣區接觸），該場板電極係直接加以 連接至該橫向電晶體裝置之一電極（3 6，28)。 2. 如申請專利範圍第1項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該介電層與該絕緣區之一總厚度約係等於該埋藏 絕緣層之一厚度。 3. 如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該總厚度係至少各為約2微米以上。 4. 如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該閘極電極延伸超過該橫向漂移區之一半。 5·如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該場板電極（44)係加以連接至該橫向電晶體裝置 -13- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐)
    478015 A BCD 六、申請專利範圍 之閘極電極（36，36A)。 6. 如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該場板電極（44)係加以連接至該橫向電晶體裝置 之源極電極（28)。 7. 如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該閘極電極包含多晶矽，該場板電極包含金屬， 該絕緣區域包含一熱氧化物以及該介電層包含一沉積介 電。 8. 如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該橫向電晶體裝置包含一 LDMOS電晶體。 9. 如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該橫向電晶體裝置包含一 LIGB電晶體。 10. 如申請專利範圍第2項之橫向薄膜絕緣層上矽（SOI)裝置 ，其中該橫向電晶體裝置包含一 JFET電晶體。 11. 如申請專利範圍第1項之橫向薄膜絕緣層上矽（SOI)裝置 # ，其中該介電層與該絕緣區之一總厚度以及該埋藏層之 一厚度係加以選擇，以便使得在沿著該SOI層之任何橫向 位置處，於該SOI層的表面處之一垂直電場約等於或少於 鄰近埋藏層之SOI層底部處之一垂直電場。 -14- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)
TW089117153A 1999-06-30 2000-08-25 Lateral thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode TW478015B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/343,912 US6346451B1 (en) 1997-12-24 1999-06-30 Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode

Publications (1)

Publication Number Publication Date
TW478015B true TW478015B (en) 2002-03-01

Family

ID=23348219

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089117153A TW478015B (en) 1999-06-30 2000-08-25 Lateral thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode

Country Status (7)

Country Link
US (1) US6346451B1 (zh)
EP (1) EP1118125A1 (zh)
JP (1) JP2003504854A (zh)
KR (1) KR100719301B1 (zh)
CN (1) CN1175496C (zh)
TW (1) TW478015B (zh)
WO (1) WO2001003201A1 (zh)

Families Citing this family (89)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6310378B1 (en) * 1997-12-24 2001-10-30 Philips Electronics North American Corporation High voltage thin film transistor with improved on-state characteristics and method for making same
WO2003038905A2 (en) * 2001-11-01 2003-05-08 Koninklijke Philips Electronics N.V. Lateral soi field-effect transistor
US20040262685A1 (en) * 2001-11-01 2004-12-30 Zingg Rene Paul Thin film lateral soi power device
US20030107050A1 (en) * 2001-12-10 2003-06-12 Koninklijke Philips Electronics N.V. High frequency high voltage silicon-on-insulator device with mask variable inversion channel and method for forming the same
US8067855B2 (en) * 2003-05-06 2011-11-29 Enecsys Limited Power supply circuits
DE602004023497D1 (de) 2003-05-06 2009-11-19 Enecsys Ltd Stromversorgungsschaltungen
US7501669B2 (en) 2003-09-09 2009-03-10 Cree, Inc. Wide bandgap transistor devices with field plates
DE102004005948B4 (de) * 2004-02-02 2009-04-02 Atmel Germany Gmbh MOS-Transistor und Verfahren zur Herstellung einer MOS-Transistorstruktur
US7550783B2 (en) * 2004-05-11 2009-06-23 Cree, Inc. Wide bandgap HEMTs with source connected field plates
US7573078B2 (en) * 2004-05-11 2009-08-11 Cree, Inc. Wide bandgap transistors with multiple field plates
US9773877B2 (en) * 2004-05-13 2017-09-26 Cree, Inc. Wide bandgap field effect transistors with source connected field plates
WO2006048689A2 (en) * 2004-11-08 2006-05-11 Encesys Limited Integrated circuits and power supplies
JP2006245548A (ja) 2005-02-01 2006-09-14 Toshiba Corp 半導体装置
US11791385B2 (en) * 2005-03-11 2023-10-17 Wolfspeed, Inc. Wide bandgap transistors with gate-source field plates
US10693415B2 (en) 2007-12-05 2020-06-23 Solaredge Technologies Ltd. Testing of a photovoltaic panel
US11881814B2 (en) 2005-12-05 2024-01-23 Solaredge Technologies Ltd. Testing of a photovoltaic panel
US8530355B2 (en) 2005-12-23 2013-09-10 Infineon Technologies Ag Mixed orientation semiconductor device and method
US7709269B2 (en) * 2006-01-17 2010-05-04 Cree, Inc. Methods of fabricating transistors including dielectrically-supported gate electrodes
US7592211B2 (en) * 2006-01-17 2009-09-22 Cree, Inc. Methods of fabricating transistors including supported gate electrodes
US8823057B2 (en) 2006-11-06 2014-09-02 Cree, Inc. Semiconductor devices including implanted regions for providing low-resistance contact to buried layers and related devices
JP5105160B2 (ja) 2006-11-13 2012-12-19 クリー インコーポレイテッド トランジスタ
US7692263B2 (en) * 2006-11-21 2010-04-06 Cree, Inc. High voltage GaN transistors
US8947194B2 (en) 2009-05-26 2015-02-03 Solaredge Technologies Ltd. Theft detection and prevention in a power generation system
US11728768B2 (en) 2006-12-06 2023-08-15 Solaredge Technologies Ltd. Pairing of components in a direct current distributed power generation system
US11309832B2 (en) 2006-12-06 2022-04-19 Solaredge Technologies Ltd. Distributed power harvesting systems using DC power sources
US11735910B2 (en) 2006-12-06 2023-08-22 Solaredge Technologies Ltd. Distributed power system using direct current power sources
US8618692B2 (en) 2007-12-04 2013-12-31 Solaredge Technologies Ltd. Distributed power system using direct current power sources
US11687112B2 (en) 2006-12-06 2023-06-27 Solaredge Technologies Ltd. Distributed power harvesting systems using DC power sources
US11296650B2 (en) 2006-12-06 2022-04-05 Solaredge Technologies Ltd. System and method for protection during inverter shutdown in distributed power installations
US9112379B2 (en) 2006-12-06 2015-08-18 Solaredge Technologies Ltd. Pairing of components in a direct current distributed power generation system
US8319471B2 (en) 2006-12-06 2012-11-27 Solaredge, Ltd. Battery power delivery module
US8473250B2 (en) 2006-12-06 2013-06-25 Solaredge, Ltd. Monitoring of distributed power harvesting systems using DC power sources
US11569659B2 (en) 2006-12-06 2023-01-31 Solaredge Technologies Ltd. Distributed power harvesting systems using DC power sources
US8319483B2 (en) 2007-08-06 2012-11-27 Solaredge Technologies Ltd. Digital average input current control in power converter
US9130401B2 (en) 2006-12-06 2015-09-08 Solaredge Technologies Ltd. Distributed power harvesting systems using DC power sources
US11855231B2 (en) 2006-12-06 2023-12-26 Solaredge Technologies Ltd. Distributed power harvesting systems using DC power sources
US8013472B2 (en) 2006-12-06 2011-09-06 Solaredge, Ltd. Method for distributed power harvesting using DC power sources
US8963369B2 (en) 2007-12-04 2015-02-24 Solaredge Technologies Ltd. Distributed power harvesting systems using DC power sources
US8384243B2 (en) 2007-12-04 2013-02-26 Solaredge Technologies Ltd. Distributed power harvesting systems using DC power sources
US11888387B2 (en) 2006-12-06 2024-01-30 Solaredge Technologies Ltd. Safety mechanisms, wake up and shutdown methods in distributed power installations
US9088178B2 (en) 2006-12-06 2015-07-21 Solaredge Technologies Ltd Distributed power harvesting systems using DC power sources
US8816535B2 (en) 2007-10-10 2014-08-26 Solaredge Technologies, Ltd. System and method for protection during inverter shutdown in distributed power installations
US8531055B2 (en) 2006-12-06 2013-09-10 Solaredge Ltd. Safety mechanisms, wake up and shutdown methods in distributed power installations
EP2232690B1 (en) 2007-12-05 2016-08-31 Solaredge Technologies Ltd. Parallel connected inverters
US9291696B2 (en) 2007-12-05 2016-03-22 Solaredge Technologies Ltd. Photovoltaic system power tracking method
WO2009072076A2 (en) 2007-12-05 2009-06-11 Solaredge Technologies Ltd. Current sensing on a mosfet
US11264947B2 (en) 2007-12-05 2022-03-01 Solaredge Technologies Ltd. Testing of a photovoltaic panel
CN101217162B (zh) * 2008-01-04 2010-06-16 东南大学 高压n型金属氧化物半导体管及其制备方法
US8111052B2 (en) 2008-03-24 2012-02-07 Solaredge Technologies Ltd. Zero voltage switching
EP2294669B8 (en) 2008-05-05 2016-12-07 Solaredge Technologies Ltd. Direct current power combiner
DE102008051245B4 (de) * 2008-10-10 2015-04-02 Austriamicrosystems Ag Hochvolttransistor mit hoher Stromtragfähigkeit und Verfahren zur Herstellung
US20100117153A1 (en) * 2008-11-07 2010-05-13 Honeywell International Inc. High voltage soi cmos device and method of manufacture
JP5769915B2 (ja) * 2009-04-24 2015-08-26 ルネサスエレクトロニクス株式会社 半導体装置
US8274129B2 (en) * 2009-10-23 2012-09-25 National Semiconductor Corporation Power transistor with improved high-side operating characteristics and reduced resistance and related apparatus and method
CN105097903B (zh) * 2009-11-09 2020-07-03 苏州博创集成电路设计有限公司 绝缘体上硅的横向n型绝缘栅双极晶体管
CN101901830B (zh) * 2009-11-09 2012-02-22 苏州博创集成电路设计有限公司 绝缘体上硅的正反导通横向绝缘栅双极晶体管
CN101916727B (zh) * 2010-07-06 2012-05-09 中国科学院上海微系统与信息技术研究所 Soi高压功率器件的制备方法
US10230310B2 (en) 2016-04-05 2019-03-12 Solaredge Technologies Ltd Safety switch for photovoltaic systems
US10673222B2 (en) 2010-11-09 2020-06-02 Solaredge Technologies Ltd. Arc detection and prevention in a power generation system
US10673229B2 (en) 2010-11-09 2020-06-02 Solaredge Technologies Ltd. Arc detection and prevention in a power generation system
GB2485527B (en) 2010-11-09 2012-12-19 Solaredge Technologies Ltd Arc detection and prevention in a power generation system
GB2486408A (en) 2010-12-09 2012-06-20 Solaredge Technologies Ltd Disconnection of a string carrying direct current
GB2483317B (en) 2011-01-12 2012-08-22 Solaredge Technologies Ltd Serially connected inverters
US9450074B1 (en) * 2011-07-29 2016-09-20 Maxim Integrated Products, Inc. LDMOS with field plate connected to gate
US8570005B2 (en) 2011-09-12 2013-10-29 Solaredge Technologies Ltd. Direct current link circuit
GB2498365A (en) 2012-01-11 2013-07-17 Solaredge Technologies Ltd Photovoltaic module
GB2498790A (en) 2012-01-30 2013-07-31 Solaredge Technologies Ltd Maximising power in a photovoltaic distributed power system
GB2498791A (en) 2012-01-30 2013-07-31 Solaredge Technologies Ltd Photovoltaic panel circuitry
US9853565B2 (en) 2012-01-30 2017-12-26 Solaredge Technologies Ltd. Maximized power in a photovoltaic distributed power system
GB2499991A (en) 2012-03-05 2013-09-11 Solaredge Technologies Ltd DC link circuit for photovoltaic array
US10115841B2 (en) 2012-06-04 2018-10-30 Solaredge Technologies Ltd. Integrated photovoltaic panel circuitry
US8686505B2 (en) * 2012-07-27 2014-04-01 Infineon Technologies Dresden Gmbh Lateral semiconductor device and manufacturing method therefor
CN103035727B (zh) * 2012-11-09 2015-08-19 上海华虹宏力半导体制造有限公司 Rfldmos器件及制造方法
US9548619B2 (en) 2013-03-14 2017-01-17 Solaredge Technologies Ltd. Method and apparatus for storing and depleting energy
US9941813B2 (en) 2013-03-14 2018-04-10 Solaredge Technologies Ltd. High frequency multi-level inverter
EP2779251B1 (en) 2013-03-15 2019-02-27 Solaredge Technologies Ltd. Bypass mechanism
CN103268890B (zh) * 2013-05-28 2015-08-19 电子科技大学 一种具有结型场板的功率ldmos器件
CN103325835B (zh) * 2013-05-28 2015-10-21 电子科技大学 一种具有结型场板的soi功率ldmos器件
US9847411B2 (en) 2013-06-09 2017-12-19 Cree, Inc. Recessed field plate transistor structures
US9679981B2 (en) 2013-06-09 2017-06-13 Cree, Inc. Cascode structures for GaN HEMTs
US9755059B2 (en) 2013-06-09 2017-09-05 Cree, Inc. Cascode structures with GaN cap layers
US9570437B2 (en) 2014-01-09 2017-02-14 Nxp B.V. Semiconductor die, integrated circuits and driver circuits, and methods of maufacturing the same
US9318974B2 (en) 2014-03-26 2016-04-19 Solaredge Technologies Ltd. Multi-level inverter with flying capacitor topology
CN105097925A (zh) * 2014-05-22 2015-11-25 上海北京大学微电子研究院 一种新型功率器件结构
CN105489481B (zh) * 2016-01-13 2018-08-03 成都芯源系统有限公司 一种阶梯型厚栅氧化层的制作方法
US20170207177A1 (en) * 2016-01-18 2017-07-20 Silanna Asia Pte Ltd. Quasi-Lateral Diffusion Transistor with Diagonal Current Flow Direction
US11177663B2 (en) 2016-04-05 2021-11-16 Solaredge Technologies Ltd. Chain of power devices
US11018623B2 (en) 2016-04-05 2021-05-25 Solaredge Technologies Ltd. Safety switch for photovoltaic systems
CN111092123A (zh) * 2019-12-10 2020-05-01 杰华特微电子（杭州）有限公司 横向双扩散晶体管及其制造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8103218A (nl) * 1981-07-06 1983-02-01 Philips Nv Veldeffekttransistor met geisoleerde stuurelektrode.
US4394182A (en) 1981-10-14 1983-07-19 Rockwell International Corporation Microelectronic shadow masking process for reducing punchthrough
US5438220A (en) 1987-02-26 1995-08-01 Kabushiki Kaisha Toshiba High breakdown voltage semiconductor device
US5528397A (en) 1991-12-03 1996-06-18 Kopin Corporation Single crystal silicon transistors for display panels
US5246870A (en) 1991-02-01 1993-09-21 North American Philips Corporation Method for making an improved high voltage thin film transistor having a linear doping profile
US5362979A (en) 1991-02-01 1994-11-08 Philips Electronics North America Corporation SOI transistor with improved source-high performance
JP3207615B2 (ja) * 1992-06-24 2001-09-10 株式会社東芝 半導体装置
CN100442532C (zh) 1992-07-06 2008-12-10 株式会社半导体能源研究所 有源矩阵显示器件
US5705424A (en) 1992-09-11 1998-01-06 Kopin Corporation Process of fabricating active matrix pixel electrodes
TW435820U (en) 1993-01-18 2001-05-16 Semiconductor Energy Lab MIS semiconductor device
US5830787A (en) 1993-03-18 1998-11-03 Lg Semicon Co., Ltd. Method for fabricating a thin film transistor
DE69415987T2 (de) * 1994-11-08 1999-06-24 St Microelectronics Srl Integrierte Anordnung mit einer Struktur zum Schutz gegen hohe elektrische Felder
JPH09191111A (ja) 1995-11-07 1997-07-22 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
TW360982B (en) 1996-01-26 1999-06-11 Matsushita Electric Works Ltd Thin film transistor of silicon-on-insulator type
JP3305961B2 (ja) 1996-09-26 2002-07-24 株式会社東芝 多結晶シリコン薄膜トランジスタの製造方法
JPH10233511A (ja) 1997-02-21 1998-09-02 Toshiba Corp 薄膜トランジスタ装置及び薄膜トランジスタ装置の製造方法並びに液晶表示装置
KR19990006170A (ko) * 1997-06-30 1999-01-25 김영환 수평 바이폴라형 전계 효과 트랜지스터 및 그 제조 방법
WO1999034449A2 (en) 1997-12-24 1999-07-08 Koninklijke Philips Electronics N.V. A high voltage thin film transistor with improved on-state characteristics and method for making same
US5973341A (en) 1998-12-14 1999-10-26 Philips Electronics North America Corporation Lateral thin-film silicon-on-insulator (SOI) JFET device

Also Published As

Publication number Publication date
CN1175496C (zh) 2004-11-10
KR100719301B1 (ko) 2007-05-17
JP2003504854A (ja) 2003-02-04
CN1318208A (zh) 2001-10-17
WO2001003201A1 (en) 2001-01-11
KR20010073010A (ko) 2001-07-31
US6346451B1 (en) 2002-02-12
EP1118125A1 (en) 2001-07-25

Similar Documents

Publication Publication Date Title
TW478015B (en) Lateral thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode
KR100652449B1 (ko) 횡형 박막 실리콘-온-절연체 ｊｆｅｔ 디바이스
JP4879444B2 (ja) 高スイッチングスピードのための横方向パワーｍｏｓｆｅｔ
JP3456716B2 (ja) 薄膜ｓｏｉ装置
KR100843062B1 (ko) 횡형 박막ＳＯＩ(Ｓｉｌｉｃｏｎ-Ｏｎ-Ｉｎｓｕｌａｔｏｒ) 디바이스
US20150357458A1 (en) III-Nitride Device with Improved Transconductance
JP2010278436A5 (zh)
JP4145352B2 (ja) 直線的に傾斜したフィールド酸化物及び線形なドーピング・プロファイルを有するラテラル薄膜ｓｏｉデバイス
JP2007512700A (ja) トレンチ絶縁ゲート電界効果トランジスタ
US20080079065A1 (en) Novel U-Shape Metal-Oxide-Semiconductor (UMOS) Gate Structure For High Power MOS-Based Semiconductor Devices
JP2000294784A (ja) 電力用半導体素子
TW200409359A (en) Field effect transistor and method of manufacturing same
TW455934B (en) Lateral thin-film silicon-on-insulator (SOI) device having lateral depletion
JPH0438878A (ja) 半導体装置
KR20030097017A (ko) 높은 항복 전압, 낮은 온 저항 및 작은 스위칭 손실을갖는 전력용 반도체 소자
JP3354127B2 (ja) 高電圧素子及びその製造方法
TW441111B (en) Lateral thin-film silicon-on-insulator (SOI) device having multiple doping profile slopes in the drift region
KR100701358B1 (ko) 실리콘 온 절연체 하이브리드 트랜지스터 디바이스 구조체
TW494579B (en) Semiconductor device and process therefore
WO2011060686A1 (zh) Ldmos功率器件
JP3659195B2 (ja) 半導体装置及びその製造方法
JP2006501644A (ja) 横型絶縁ゲートバイポーラｐｍｏｓ装置
JP2004349384A (ja) 半導体装置
JP3503337B2 (ja) 半導体装置
JP2012119462A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees