TW368654B - Multi-group synchronized semiconductor memory device for easy control on the resetting groups - Google Patents

Multi-group synchronized semiconductor memory device for easy control on the resetting groups

Info

Publication number
TW368654B
TW368654B TW087100826A TW87100826A TW368654B TW 368654 B TW368654 B TW 368654B TW 087100826 A TW087100826 A TW 087100826A TW 87100826 A TW87100826 A TW 87100826A TW 368654 B TW368654 B TW 368654B
Authority
TW
Taiwan
Prior art keywords
group
resetting
row address
memory device
semiconductor memory
Prior art date
Application number
TW087100826A
Other languages
English (en)
Inventor
Mikio Sakurai
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW368654B publication Critical patent/TW368654B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618—Refresh operations over multiple banks or interleaving
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
TW087100826A 1997-08-08 1998-01-20 Multi-group synchronized semiconductor memory device for easy control on the resetting groups TW368654B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9215001A JPH1166843A (ja) 1997-08-08 1997-08-08 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW368654B true TW368654B (en) 1999-09-01

Family

ID=16665069

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087100826A TW368654B (en) 1997-08-08 1998-01-20 Multi-group synchronized semiconductor memory device for easy control on the resetting groups

Country Status (5)

Country Link
US (1) US5999472A (zh)
JP (1) JPH1166843A (zh)
KR (1) KR100273613B1 (zh)
CN (1) CN1208230A (zh)
TW (1) TW368654B (zh)

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US5999481A (en) 1997-08-22 1999-12-07 Micron Technology, Inc. Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
JP3490887B2 (ja) * 1998-03-05 2004-01-26 シャープ株式会社 同期型半導体記憶装置
US6125062A (en) 1998-08-26 2000-09-26 Micron Technology, Inc. Single electron MOSFET memory device and method
US6266734B1 (en) * 1999-07-29 2001-07-24 Micron Technology, Inc. Reducing memory latency by not performing bank conflict checks on idle banks
JP2001126472A (ja) * 1999-10-29 2001-05-11 Mitsubishi Electric Corp 半導体記憶装置
JP4024972B2 (ja) * 1999-11-05 2007-12-19 松下電器産業株式会社 半導体記憶装置
TW535161B (en) * 1999-12-03 2003-06-01 Nec Electronics Corp Semiconductor memory device and its testing method
JP2002157880A (ja) * 2000-11-15 2002-05-31 Matsushita Electric Ind Co Ltd 半導体記憶装置
KR100472723B1 (ko) * 2000-12-26 2005-03-08 주식회사 하이닉스반도체 뱅크 리프레쉬 제어 장치 및 방법
KR100429872B1 (ko) * 2001-06-27 2004-05-04 삼성전자주식회사 반도체 메모리 장치의 이용 효율을 높이는 메모리 시스템및 상기 반도체 메모리 장치의 리프레쉬 방법
US6625078B2 (en) * 2002-02-11 2003-09-23 United Memories, Inc. Look-ahead refresh for an integrated circuit memory
KR100468720B1 (ko) * 2002-03-08 2005-01-29 삼성전자주식회사 메모리 셀들의 리프레쉬 방법 및 리프레쉬 제어회로
KR100562335B1 (ko) 2003-04-30 2006-03-17 주식회사 하이닉스반도체 동작시 노이즈를 줄일 수 있는 반도체 메모리 장치
US6876593B2 (en) * 2003-07-01 2005-04-05 Intel Corporation Method and apparatus for partial refreshing of DRAMS
KR100532456B1 (ko) * 2003-07-30 2005-11-30 삼성전자주식회사 메모리 컨트롤러 및 상기 메모리 컨트롤러를 구비하는반도체 장치
US7184350B2 (en) * 2004-05-27 2007-02-27 Qualcomm Incorporated Method and system for providing independent bank refresh for volatile memories
US7088633B2 (en) * 2004-05-27 2006-08-08 Qualcomm Incorporated Method and system for providing seamless self-refresh for directed bank refresh in volatile memories
KR100909411B1 (ko) * 2004-07-16 2009-07-24 후지쯔 마이크로일렉트로닉스 가부시키가이샤 반도체 기억 장치
US7953921B2 (en) * 2004-12-28 2011-05-31 Qualcomm Incorporated Directed auto-refresh synchronization
KR100819683B1 (ko) * 2005-07-04 2008-04-04 주식회사 하이닉스반도체 반도체 메모리 장치
US7903496B2 (en) * 2005-09-29 2011-03-08 Hynix Semiconductor Inc. Semiconductor memory device
US7266032B2 (en) * 2005-09-30 2007-09-04 Infineon Technologies Ag Memory device having low Vpp current consumption
US7433261B2 (en) * 2005-10-17 2008-10-07 Infineon Technologies Ag Directed auto-refresh for a dynamic random access memory
KR100706830B1 (ko) * 2005-10-19 2007-04-13 주식회사 하이닉스반도체 반도체 메모리의 액티브 구간 제어장치 및 방법
KR100809960B1 (ko) * 2006-09-28 2008-03-07 삼성전자주식회사 반도체 메모리 장치의 리프레시 회로 및 리프레시 방법
KR100834394B1 (ko) * 2007-01-03 2008-06-04 주식회사 하이닉스반도체 반도체 메모리 소자의 리프레쉬신호 공급장치
JP5045337B2 (ja) 2007-09-27 2012-10-10 富士通セミコンダクター株式会社 半導体メモリ、半導体メモリの動作方法およびシステム
KR100956777B1 (ko) * 2008-08-08 2010-05-12 주식회사 하이닉스반도체 어드레스 래치 회로 및 이를 이용한 반도체 메모리 장치
KR102161278B1 (ko) * 2013-08-07 2020-09-29 에스케이하이닉스 주식회사 액티브 제어 장치 및 이를 포함하는 반도체 장치
KR20160004620A (ko) 2014-07-03 2016-01-13 에스케이하이닉스 주식회사 반도체 메모리 장치
KR102403340B1 (ko) * 2016-02-22 2022-06-02 에스케이하이닉스 주식회사 리프레쉬 제어 장치
KR102419535B1 (ko) * 2016-03-18 2022-07-13 에스케이하이닉스 주식회사 메모리 장치
KR102436992B1 (ko) * 2016-09-21 2022-08-29 에스케이하이닉스 주식회사 리프레시 제어 장치
US10504580B2 (en) 2017-08-31 2019-12-10 Micron Technology, Inc. Systems and methods for refreshing a memory bank while accessing another memory bank using a shared address path

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4933907A (en) * 1987-12-03 1990-06-12 Mitsubishi Denki Kabushiki Kaisha Dynamic random access memory device and operating method therefor
JP2988804B2 (ja) * 1993-03-19 1999-12-13 株式会社東芝 半導体メモリ装置
JPH10135577A (ja) * 1996-10-31 1998-05-22 Mitsubishi Materials Corp 紫外レーザ光用光学材

Also Published As

Publication number Publication date
CN1208230A (zh) 1999-02-17
JPH1166843A (ja) 1999-03-09
US5999472A (en) 1999-12-07
KR100273613B1 (ko) 2000-12-15
KR19990023069A (ko) 1999-03-25

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