TW328582B - Dot clock reproducing method and dot clock reproducing apparatus thereof - Google Patents

Dot clock reproducing method and dot clock reproducing apparatus thereof

Info

Publication number
TW328582B
TW328582B TW086105041A TW86105041A TW328582B TW 328582 B TW328582 B TW 328582B TW 086105041 A TW086105041 A TW 086105041A TW 86105041 A TW86105041 A TW 86105041A TW 328582 B TW328582 B TW 328582B
Authority
TW
Taiwan
Prior art keywords
dot clock
clock reproducing
clock signal
reproducing
reproducing apparatus
Prior art date
Application number
TW086105041A
Other languages
English (en)
Inventor
Hideki Abe
Noriyuki Iwakura
Takahisa Hatano
Yoshikuni Shindou
Kazuhiro Yamada
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Application granted granted Critical
Publication of TW328582B publication Critical patent/TW328582B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G09G5/008—Clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Synchronizing For Television (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Television Signal Processing For Recording (AREA)
TW086105041A 1996-05-07 1997-04-18 Dot clock reproducing method and dot clock reproducing apparatus thereof TW328582B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP11247696 1996-05-07
JP05130697A JP3487119B2 (ja) 1996-05-07 1997-03-06 ドットクロック再生装置

Publications (1)

Publication Number Publication Date
TW328582B true TW328582B (en) 1998-03-21

Family

ID=37307318

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086105041A TW328582B (en) 1996-05-07 1997-04-18 Dot clock reproducing method and dot clock reproducing apparatus thereof

Country Status (6)

Country Link
US (1) US5940136A (zh)
EP (1) EP0807923A1 (zh)
JP (1) JP3487119B2 (zh)
KR (1) KR100543991B1 (zh)
CN (1) CN1131640C (zh)
TW (1) TW328582B (zh)

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JP4831231B2 (ja) * 1996-02-22 2011-12-07 セイコーエプソン株式会社 ドットクロック信号を調整するための方法及び装置
EP0881621B1 (en) 1997-05-22 2010-08-11 Panasonic Corporation Scan conversion adjustment circuit for liquid crystal display
DE19731112B4 (de) * 1997-07-19 2009-10-01 Robert Bosch Gmbh Verfahren und Schaltungsanordnung zur Erkennung von kurzen Impulsen eines digitalen Eingangssignals
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FR2778044B1 (fr) 1998-04-23 2000-06-16 Thomson Multimedia Sa Procede de recuperation d'horloge lors de l'echantillonnage des signaux de type informatique
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JP4769431B2 (ja) 2004-05-28 2011-09-07 Ｏｋｉセミコンダクタ株式会社 ドットクロック同期生成回路
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KR100790984B1 (ko) 2006-03-03 2008-01-02 삼성전자주식회사 Ｄｏｔ 클럭 신호의 주파수에 관계없이 일정한 주파수의시스템 클럭 신호를 생성하는 디스플레이용 구동 집적회로및 시스템 클럭 신호 생성 방법
JP4182124B2 (ja) 2006-06-30 2008-11-19 Ｎｅｃディスプレイソリューションズ株式会社 画像表示装置、ドットクロック位相調整回路及びクロック位相調整方法
JP2008182314A (ja) * 2007-01-23 2008-08-07 Matsushita Electric Ind Co Ltd 位相調整装置およびその関連技術
JP4932517B2 (ja) 2007-02-08 2012-05-16 Ｎｅｃディスプレイソリューションズ株式会社 画像表示装置及びその周波数調整方法
JP2008276132A (ja) * 2007-05-07 2008-11-13 Nec Electronics Corp ドットクロック発生回路、半導体装置及びドットクロック発生方法
JP2011164356A (ja) * 2010-02-09 2011-08-25 Canon Inc 表示装置および表示方法
JP5610207B2 (ja) * 2010-08-31 2014-10-22 カシオ計算機株式会社 位相調整装置、位相調整方法及び画像表示装置
US9385858B2 (en) * 2013-02-20 2016-07-05 Avago Technologies General Ip (Singapore) Pte. Ltd. Timing phase estimation for clock and data recovery
CN103684733B (zh) 2013-09-28 2017-01-25 国家电网公司 一种时钟同步对时的自动校验方法及其专用设备
JP2017219586A (ja) * 2016-06-03 2017-12-14 株式会社ジャパンディスプレイ 信号供給回路及び表示装置
CN107784992A (zh) * 2016-08-25 2018-03-09 晨星半导体股份有限公司 显示器控制装置与控制方法
CN106656182A (zh) * 2016-11-24 2017-05-10 深圳市鼎阳科技有限公司 一种数字芯片接收adc输出数据的方法及数字芯片

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Also Published As

Publication number Publication date
CN1168065A (zh) 1997-12-17
EP0807923A1 (en) 1997-11-19
JPH1026953A (ja) 1998-01-27
JP3487119B2 (ja) 2004-01-13
US5940136A (en) 1999-08-17
KR19980079216A (ko) 1998-11-25
KR100543991B1 (ko) 2006-03-23
CN1131640C (zh) 2003-12-17

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MM4A Annulment or lapse of patent due to non-payment of fees