TW328141B - Manufacturing method for semiconductor wafer and IC card and its bearer - Google Patents
Manufacturing method for semiconductor wafer and IC card and its bearerInfo
- Publication number
- TW328141B TW328141B TW085113772A TW85113772A TW328141B TW 328141 B TW328141 B TW 328141B TW 085113772 A TW085113772 A TW 085113772A TW 85113772 A TW85113772 A TW 85113772A TW 328141 B TW328141 B TW 328141B
- Authority
- TW
- Taiwan
- Prior art keywords
- bearer
- semiconductor wafer
- wafer
- manufacturing
- engineering process
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000002131 composite material Substances 0.000 abstract 4
- 238000005516 engineering process Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 1
- 239000007788 liquid Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07773—Antenna details
- G06K19/07777—Antenna details the antenna being of the inductive type
- G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07773—Antenna details
- G06K19/07777—Antenna details the antenna being of the inductive type
- G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
- G06K19/07783—Antenna details the antenna being of the inductive type the inductive antenna being a coil the coil being planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5388—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates for flat cards, e.g. credit cards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05022—Disposition the internal layer being at least partially embedded in the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
- H01L2224/05572—Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/819—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
- H01L2224/81901—Pressing the bump connector against the bonding areas by means of another connector
- H01L2224/81903—Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Networks & Wireless Communication (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Weting (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31508995 | 1995-12-04 | ||
PCT/JP1996/002863 WO1997021243A1 (en) | 1995-12-04 | 1996-10-02 | Method for processing semiconductor wafer, method for manufacturing ic card, and carrier |
Publications (1)
Publication Number | Publication Date |
---|---|
TW328141B true TW328141B (en) | 1998-03-11 |
Family
ID=18061281
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW085113772A TW328141B (en) | 1995-12-04 | 1996-11-11 | Manufacturing method for semiconductor wafer and IC card and its bearer |
Country Status (8)
Country | Link |
---|---|
US (3) | US6342434B1 (zh) |
EP (1) | EP0866494A4 (zh) |
KR (1) | KR19990071818A (zh) |
CN (1) | CN1203696A (zh) |
AU (1) | AU729849B2 (zh) |
CA (1) | CA2238974A1 (zh) |
TW (1) | TW328141B (zh) |
WO (1) | WO1997021243A1 (zh) |
Families Citing this family (115)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19921230B4 (de) * | 1999-05-07 | 2009-04-02 | Giesecke & Devrient Gmbh | Verfahren zum Handhaben von gedünnten Chips zum Einbringen in Chipkarten |
JP2001044144A (ja) | 1999-08-03 | 2001-02-16 | Tokyo Seimitsu Co Ltd | 半導体チップの製造プロセス |
US6140146A (en) * | 1999-08-03 | 2000-10-31 | Intermec Ip Corp. | Automated RFID transponder manufacturing on flexible tape substrates |
JP2001094005A (ja) * | 1999-09-22 | 2001-04-06 | Oki Electric Ind Co Ltd | 半導体装置及び半導体装置の製造方法 |
DE19962431B4 (de) * | 1999-12-22 | 2005-10-20 | Micronas Gmbh | Verfahren zum Herstellen einer Halbleiteranordnung mit Haftzone für eine Passivierungsschicht |
KR100467009B1 (ko) * | 2000-08-04 | 2005-01-24 | 샤프 가부시키가이샤 | 반도체 웨이퍼 표면의 오염을 방지할 수 있는 반도체웨이퍼의 박층화 방법 및 반도체 웨이퍼의 이면 연삭장치 |
JP4546626B2 (ja) * | 2000-08-29 | 2010-09-15 | 株式会社ディスコ | 半導体素子のピックアップ方法 |
JP2002075937A (ja) * | 2000-08-30 | 2002-03-15 | Nitto Denko Corp | 半導体ウエハの加工方法 |
JP2002092575A (ja) * | 2000-09-19 | 2002-03-29 | Mitsubishi Electric Corp | 小型カードとその製造方法 |
JP2002134466A (ja) * | 2000-10-25 | 2002-05-10 | Sony Corp | 半導体装置の製造方法 |
US6949158B2 (en) * | 2001-05-14 | 2005-09-27 | Micron Technology, Inc. | Using backgrind wafer tape to enable wafer mounting of bumped wafers |
US6794751B2 (en) * | 2001-06-29 | 2004-09-21 | Intel Corporation | Multi-purpose planarizing/back-grind/pre-underfill arrangements for bumped wafers and dies |
JP3892703B2 (ja) | 2001-10-19 | 2007-03-14 | 富士通株式会社 | 半導体基板用治具及びこれを用いた半導体装置の製造方法 |
JP3880397B2 (ja) * | 2001-12-27 | 2007-02-14 | 日東電工株式会社 | 保護テープの貼付・剥離方法 |
US6908784B1 (en) * | 2002-03-06 | 2005-06-21 | Micron Technology, Inc. | Method for fabricating encapsulated semiconductor components |
US6881675B2 (en) * | 2002-05-15 | 2005-04-19 | Taiwan Semiconductor Manufacturing Co, Ltd. | Method and system for reducing wafer edge tungsten residue utilizing a spin etch |
JP3838637B2 (ja) * | 2002-06-10 | 2006-10-25 | 日東電工株式会社 | ガラス基板ダイシング用粘着シートおよびガラス基板ダイシング方法 |
JP2004014956A (ja) * | 2002-06-11 | 2004-01-15 | Shinko Electric Ind Co Ltd | 微小半導体素子の加工処理方法 |
US7148126B2 (en) * | 2002-06-25 | 2006-12-12 | Sanken Electric Co., Ltd. | Semiconductor device manufacturing method and ring-shaped reinforcing member |
US6903442B2 (en) * | 2002-08-29 | 2005-06-07 | Micron Technology, Inc. | Semiconductor component having backside pin contacts |
US6780733B2 (en) * | 2002-09-06 | 2004-08-24 | Motorola, Inc. | Thinned semiconductor wafer and die and corresponding method |
JP3748844B2 (ja) * | 2002-09-25 | 2006-02-22 | Necエレクトロニクス株式会社 | 半導体集積回路およびそのテスト方法 |
SG116533A1 (en) * | 2003-03-26 | 2005-11-28 | Toshiba Kk | Semiconductor manufacturing apparatus and method of manufacturing semiconductor device. |
US7288465B2 (en) * | 2003-04-15 | 2007-10-30 | International Business Machines Corpoartion | Semiconductor wafer front side protection |
TWI318649B (en) | 2003-06-06 | 2009-12-21 | Hitachi Chemical Co Ltd | Sticking sheep, connecting sheet unified with dicing tape,and fabricating method of semiconductor device |
US6951775B2 (en) * | 2003-06-28 | 2005-10-04 | International Business Machines Corporation | Method for forming interconnects on thin wafers |
EP1494167A1 (en) * | 2003-07-04 | 2005-01-05 | Koninklijke Philips Electronics N.V. | Flexible semiconductor device and identification label |
JP2005039114A (ja) * | 2003-07-17 | 2005-02-10 | Disco Abrasive Syst Ltd | 半導体ウェーハ移し替え装置 |
JP4405211B2 (ja) * | 2003-09-08 | 2010-01-27 | パナソニック株式会社 | 半導体チップの剥離装置、剥離方法、及び半導体チップの供給装置 |
DE20318462U1 (de) | 2003-11-26 | 2004-03-11 | Infineon Technologies Ag | Anordnung elektronischer Halbleiterbauelemente auf einem Trägersystem zur Behandlung der Halbleiterbauelemente mit einem flüssigen Medium |
US20050136653A1 (en) * | 2003-12-22 | 2005-06-23 | Ramirez Jose G. | Non-adhesive semiconductor wafer holder and assembly |
US20050147489A1 (en) * | 2003-12-24 | 2005-07-07 | Tian-An Chen | Wafer supporting system for semiconductor wafers |
TWI230426B (en) * | 2004-04-07 | 2005-04-01 | Optimum Care Int Tech Inc | Packaging method of integrated circuit |
DE102004018249B3 (de) * | 2004-04-15 | 2006-03-16 | Infineon Technologies Ag | Verfahren zum Bearbeiten eines Werkstücks an einem Werkstückträger |
DE102004018250A1 (de) * | 2004-04-15 | 2005-11-03 | Infineon Technologies Ag | Wafer-Stabilisierungsvorrichtung und Verfahren zu dessen Herstellung |
US20050281056A1 (en) * | 2004-05-25 | 2005-12-22 | Loomis Jason A | Ornament lighting apparatus |
KR101020661B1 (ko) * | 2004-06-02 | 2011-03-09 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체장치 |
JP4306540B2 (ja) * | 2004-06-09 | 2009-08-05 | セイコーエプソン株式会社 | 半導体基板の薄型加工方法 |
KR100574983B1 (ko) * | 2004-07-06 | 2006-05-02 | 삼성전자주식회사 | 반도체소자 제조를 위한 반도체웨이퍼 처리방법 |
US7591863B2 (en) * | 2004-07-16 | 2009-09-22 | Semiconductor Energy Laboratory Co., Ltd. | Laminating system, IC sheet, roll of IC sheet, and method for manufacturing IC chip |
US20150287660A1 (en) | 2007-01-05 | 2015-10-08 | Semiconductor Energy Laboratory Co., Ltd. | Laminating system, ic sheet, scroll of ic sheet, and method for manufacturing ic chip |
WO2006011665A1 (en) * | 2004-07-30 | 2006-02-02 | Semiconductor Energy Laboratory Co., Ltd. | Laminating system, ic sheet, scroll of ic sheet, and method for manufacturing ic chip |
US20060046499A1 (en) * | 2004-08-20 | 2006-03-02 | Dolechek Kert L | Apparatus for use in thinning a semiconductor workpiece |
US7354649B2 (en) | 2004-08-20 | 2008-04-08 | Semitool, Inc. | Semiconductor workpiece |
US20060040111A1 (en) * | 2004-08-20 | 2006-02-23 | Dolechek Kert L | Process chamber and system for thinning a semiconductor workpiece |
US7193295B2 (en) * | 2004-08-20 | 2007-03-20 | Semitool, Inc. | Process and apparatus for thinning a semiconductor workpiece |
US7288489B2 (en) * | 2004-08-20 | 2007-10-30 | Semitool, Inc. | Process for thinning a semiconductor workpiece |
US20060046433A1 (en) * | 2004-08-25 | 2006-03-02 | Sterrett Terry L | Thinning semiconductor wafers |
US7049208B2 (en) | 2004-10-11 | 2006-05-23 | Intel Corporation | Method of manufacturing of thin based substrate |
TWI237915B (en) * | 2004-12-24 | 2005-08-11 | Cleavage Entpr Co Ltd | Manufacturing method of light-emitting diode |
EP1858058B1 (en) * | 2005-02-03 | 2012-01-11 | Shin-Etsu Polymer Co., Ltd. | Fixation carrier, production method of fixation carrier, use method of fixation carrier, and substrate reception container |
JP4528668B2 (ja) * | 2005-05-17 | 2010-08-18 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
JP4613709B2 (ja) * | 2005-06-24 | 2011-01-19 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
US7169248B1 (en) * | 2005-07-19 | 2007-01-30 | Micron Technology, Inc. | Methods for releasably attaching support members to microfeature workpieces and microfeature assemblies formed using such methods |
DE102006000687B4 (de) | 2006-01-03 | 2010-09-09 | Thallner, Erich, Dipl.-Ing. | Kombination aus einem Träger und einem Wafer, Vorrichtung zum Trennen der Kombination und Verfahren zur Handhabung eines Trägers und eines Wafers |
US20070183184A1 (en) * | 2006-02-03 | 2007-08-09 | Semiconductor Energy Laboratory Ltd. | Apparatus and method for manufacturing semiconductor device |
KR100804891B1 (ko) * | 2006-02-14 | 2008-02-20 | 엘에스전선 주식회사 | 다이싱 다이 접착필름 및 이를 이용한 반도체 패키징 방법 |
US7749349B2 (en) * | 2006-03-14 | 2010-07-06 | Micron Technology, Inc. | Methods and systems for releasably attaching support members to microfeature workpieces |
US20070217119A1 (en) * | 2006-03-17 | 2007-09-20 | David Johnson | Apparatus and Method for Carrying Substrates |
US20070238222A1 (en) | 2006-03-28 | 2007-10-11 | Harries Richard J | Apparatuses and methods to enhance passivation and ILD reliability |
US20070246839A1 (en) * | 2006-04-21 | 2007-10-25 | Applied Materials, Inc. | Method of proximity pin manufacture |
US7985621B2 (en) * | 2006-08-31 | 2011-07-26 | Ati Technologies Ulc | Method and apparatus for making semiconductor packages |
KR100817718B1 (ko) * | 2006-12-27 | 2008-03-27 | 동부일렉트로닉스 주식회사 | 반도체 소자 제조방법 |
US7851333B2 (en) * | 2007-03-15 | 2010-12-14 | Infineon Technologies Ag | Apparatus comprising a device and method for producing it |
JP4746003B2 (ja) * | 2007-05-07 | 2011-08-10 | リンテック株式会社 | 移載装置及び移載方法 |
US7767557B2 (en) * | 2007-05-11 | 2010-08-03 | Micron Technology, Inc. | Chilled wafer dicing |
US7816232B2 (en) * | 2007-11-27 | 2010-10-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor substrate and semiconductor substrate manufacturing apparatus |
CN101925996B (zh) * | 2008-01-24 | 2013-03-20 | 布鲁尔科技公司 | 将器件晶片可逆地安装在载体基片上的方法 |
US20090191029A1 (en) * | 2008-01-30 | 2009-07-30 | Taeg Ki Lim | System for handling semiconductor dies |
JP5417729B2 (ja) * | 2008-03-28 | 2014-02-19 | 住友ベークライト株式会社 | 半導体用フィルム、半導体装置の製造方法および半導体装置 |
WO2009099191A1 (ja) | 2008-02-07 | 2009-08-13 | Sumitomo Bakelite Company Limited | 半導体用フィルム、半導体装置の製造方法および半導体装置 |
US7972969B2 (en) * | 2008-03-06 | 2011-07-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and apparatus for thinning a substrate |
DE102008024790A1 (de) * | 2008-05-23 | 2009-12-10 | Smartrac Ip B.V. | Antennenanordnung für eine Chipkarte |
JP2009295695A (ja) * | 2008-06-03 | 2009-12-17 | Sumco Corp | 半導体薄膜付基板およびその製造方法 |
TWI439351B (zh) * | 2008-09-29 | 2014-06-01 | Nitto Denko Corp | Adsorption tablets |
DE102008055155A1 (de) | 2008-12-23 | 2010-07-01 | Thin Materials Ag | Trennverfahren für ein Schichtsystem umfassend einen Wafer |
JP2009094539A (ja) * | 2009-01-21 | 2009-04-30 | Disco Abrasive Syst Ltd | Csp基板の分割加工方法 |
US8820728B2 (en) * | 2009-02-02 | 2014-09-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor wafer carrier |
EP2402981B1 (de) | 2009-03-18 | 2013-07-10 | EV Group GmbH | Vorrichtung und Verfahren zum Ablösen eines Wafers von einem Träger |
US8237252B2 (en) | 2009-07-22 | 2012-08-07 | Stats Chippac, Ltd. | Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation |
EP2290679B1 (de) | 2009-09-01 | 2016-05-04 | EV Group GmbH | Vorrichtung und Verfahren zum Ablösen eines Produktsubstrats (z.B. eines Halbleiterwafers) von einem Trägersubstrat durch Verformung eines auf einem Filmrahmen montierten flexiblen Films |
CN101722470B (zh) * | 2009-11-24 | 2011-09-28 | 成都东骏激光股份有限公司 | 一种激光晶体的加工方法 |
EP2523209B1 (de) | 2010-04-23 | 2017-03-08 | EV Group GmbH | Vorrichtung und Verfahren zum Ablösen eines Produktsubstrats von einem Trägersubstrat |
US8563405B2 (en) | 2010-05-06 | 2013-10-22 | Ineffable Cellular Limited Liability Company | Method for manufacturing semiconductor device |
US8852391B2 (en) | 2010-06-21 | 2014-10-07 | Brewer Science Inc. | Method and apparatus for removing a reversibly mounted device wafer from a carrier substrate |
US9263314B2 (en) | 2010-08-06 | 2016-02-16 | Brewer Science Inc. | Multiple bonding layers for thin-wafer handling |
JP2012079936A (ja) * | 2010-10-01 | 2012-04-19 | Nitto Denko Corp | ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法 |
EP2650124B1 (en) * | 2010-12-09 | 2019-05-15 | Asahi Kasei Kabushiki Kaisha | Fine-structure laminate, method for preparing fine-structure laminate, and production method for fine-structure laminate |
JP2013008915A (ja) * | 2011-06-27 | 2013-01-10 | Toshiba Corp | 基板加工方法及び基板加工装置 |
CN102339780B (zh) * | 2011-09-30 | 2013-07-17 | 格科微电子(上海)有限公司 | 晶片的吸附与支撑装置及其衬垫、半导体处理设备 |
US9390949B2 (en) * | 2011-11-29 | 2016-07-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer debonding and cleaning apparatus and method of use |
US11264262B2 (en) * | 2011-11-29 | 2022-03-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer debonding and cleaning apparatus |
US10381254B2 (en) * | 2011-11-29 | 2019-08-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Wafer debonding and cleaning apparatus and method |
DE102012001345A1 (de) * | 2012-01-24 | 2013-07-25 | Giesecke & Devrient Gmbh | Verfahren zum Herstellen eines Datenträgers |
JP5591859B2 (ja) * | 2012-03-23 | 2014-09-17 | 株式会社東芝 | 基板の分離方法及び分離装置 |
JP6035468B2 (ja) * | 2012-07-03 | 2016-11-30 | アールエフエイチアイシー コーポレイション | 半導体−オン−ダイヤモンドウェハのハンドルおよび製造方法 |
JP5970986B2 (ja) * | 2012-07-05 | 2016-08-17 | 富士通株式会社 | ウエハー基板の製造方法 |
KR102007042B1 (ko) * | 2012-09-19 | 2019-08-02 | 도쿄엘렉트론가부시키가이샤 | 박리 장치 |
US9331230B2 (en) * | 2012-10-30 | 2016-05-03 | Cbrite Inc. | LED die dispersal in displays and light panels with preserving neighboring relationship |
US9543197B2 (en) * | 2012-12-19 | 2017-01-10 | Intel Corporation | Package with dielectric or anisotropic conductive (ACF) buildup layer |
TWI533034B (zh) * | 2013-04-23 | 2016-05-11 | 住華科技股份有限公司 | 軟性彩色濾光片及軟性彩色顯示元件之製造方法 |
US9013039B2 (en) * | 2013-08-05 | 2015-04-21 | Globalfoundries Inc. | Wafer support system for 3D packaging |
JP6113019B2 (ja) * | 2013-08-07 | 2017-04-12 | 株式会社ディスコ | ウエーハの分割方法 |
FR3012257A1 (fr) * | 2013-10-21 | 2015-04-24 | Soitec Silicon On Insulator | Procede de prehension d'un substrat |
US9613842B2 (en) | 2014-02-19 | 2017-04-04 | Globalfoundries Inc. | Wafer handler and methods of manufacture |
KR102427159B1 (ko) | 2015-11-11 | 2022-08-01 | 삼성전자주식회사 | 테이프 필름의 라미네이션 장치 및 그를 포함하는 반도체 소자의 제조 설비 |
US9997399B2 (en) * | 2016-08-16 | 2018-06-12 | Mikro Mesa Technology Co., Ltd. | Method for transferring semiconductor structure |
KR102450310B1 (ko) | 2017-11-27 | 2022-10-04 | 삼성전자주식회사 | 반도체 칩 및 이를 구비하는 멀티 칩 패키지 |
US10586725B1 (en) * | 2018-01-10 | 2020-03-10 | Facebook Technologies, Llc | Method for polymer-assisted chip transfer |
US10559486B1 (en) * | 2018-01-10 | 2020-02-11 | Facebook Technologies, Llc | Method for polymer-assisted chip transfer |
JP7282461B2 (ja) * | 2019-04-16 | 2023-05-29 | 株式会社ディスコ | 検査装置、及び加工装置 |
US11041879B2 (en) | 2019-06-06 | 2021-06-22 | International Business Machines Corporation | Fluidized alignment of a semiconductor die to a test probe |
CN111453997A (zh) * | 2020-04-14 | 2020-07-28 | 拓米(成都)应用技术研究院有限公司 | 单面蚀刻制造超薄玻璃的方法及超薄玻璃 |
CN112105166B (zh) * | 2020-09-02 | 2024-03-29 | 深圳市鑫达辉软性电路科技有限公司 | 一种fpc翘曲修复装置 |
US20220402146A1 (en) * | 2021-06-18 | 2022-12-22 | Win Semiconductors Corp. | Testing system and method of testing and transferring light-emitting element |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3861978A (en) | 1973-03-08 | 1975-01-21 | Western Electric Co | Method of joining two bodies after treatment with an inorganic colloid |
JPS55160440A (en) | 1979-05-31 | 1980-12-13 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Device for fixing thin plate |
US4339297A (en) * | 1981-04-14 | 1982-07-13 | Seiichiro Aigo | Apparatus for etching of oxide film on semiconductor wafer |
JPS6133831A (ja) * | 1984-07-24 | 1986-02-17 | Citizen Watch Co Ltd | 真空吸着装置 |
JPH0694088B2 (ja) | 1986-02-20 | 1994-11-24 | 株式会社井上ジャパックス研究所 | ワイヤカツト放電加工装置 |
JPS62193725U (zh) * | 1986-05-30 | 1987-12-09 | ||
JPS63256342A (ja) | 1987-04-10 | 1988-10-24 | Sumitomo Electric Ind Ltd | 半導体ウエ−ハの研削方法 |
JPS63256354A (ja) * | 1987-04-14 | 1988-10-24 | Mitsubishi Electric Corp | 複合材の高精度研磨方法 |
JPH01281231A (ja) * | 1987-10-22 | 1989-11-13 | Fujitsu Ltd | 試料保持装置 |
JPH01134945A (ja) | 1987-11-19 | 1989-05-26 | Tokyo Electron Ltd | ウエハ保持装置 |
JPH01139628A (ja) | 1987-11-26 | 1989-06-01 | Nitto Boseki Co Ltd | フッ素樹脂補強用ガラス繊維製品 |
JPH02309638A (ja) | 1989-05-24 | 1990-12-25 | Fujitsu Ltd | ウエハーエッチング装置 |
JPH0353546A (ja) * | 1989-07-21 | 1991-03-07 | Mitsubishi Electric Corp | 半導体装置の製造方法およびその製造装置 |
US5155068A (en) | 1989-08-31 | 1992-10-13 | Sharp Kabushiki Kaisha | Method for manufacturing an IC module for an IC card whereby an IC device and surrounding encapsulant are thinned by material removal |
DE4002018A1 (de) | 1990-01-24 | 1991-07-25 | Helmut K Rohrer | Verfahren und vorrichtung zum erleichtern des loesens von elektronischen bauteilen von einer wafer-traegerfolie |
JPH03256677A (ja) | 1990-03-02 | 1991-11-15 | Sony Corp | 薄片吸着保持装置 |
JPH0567371A (ja) | 1991-08-02 | 1993-03-19 | Sony Corp | 記録再生装置 |
JPH0582631A (ja) | 1991-09-20 | 1993-04-02 | Toshiba Ceramics Co Ltd | 半導体ウエーハ用真空チヤツク |
JP2634343B2 (ja) | 1991-10-28 | 1997-07-23 | 信越化学工業株式会社 | 半導体ウェーハの保持方法 |
JPH06177099A (ja) | 1992-12-02 | 1994-06-24 | Toshiba Corp | 半導体ペレットの薄化方法 |
US5268065A (en) * | 1992-12-21 | 1993-12-07 | Motorola, Inc. | Method for thinning a semiconductor wafer |
JP3410202B2 (ja) | 1993-04-28 | 2003-05-26 | 日本テキサス・インスツルメンツ株式会社 | ウェハ貼着用粘着シートおよびこれを用いた半導体装置の製造方法 |
JP3067479B2 (ja) | 1993-07-30 | 2000-07-17 | 信越半導体株式会社 | ウエーハの高平坦度エッチング方法および装置 |
JPH07106285A (ja) | 1993-10-08 | 1995-04-21 | Oki Electric Ind Co Ltd | 半導体製造方法 |
DE4433833A1 (de) * | 1994-09-22 | 1996-03-28 | Fraunhofer Ges Forschung | Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung unter Erreichung hoher Systemausbeuten |
JP2581017B2 (ja) * | 1994-09-30 | 1997-02-12 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JPH08181092A (ja) | 1994-12-26 | 1996-07-12 | Sumitomo Metal Ind Ltd | 半導体ウエハ研磨用保持プレート |
JP3197788B2 (ja) | 1995-05-18 | 2001-08-13 | 株式会社日立製作所 | 半導体装置の製造方法 |
-
1996
- 1996-02-10 US US09/077,548 patent/US6342434B1/en not_active Expired - Lifetime
- 1996-10-02 CN CN96198789A patent/CN1203696A/zh active Pending
- 1996-10-02 CA CA002238974A patent/CA2238974A1/en not_active Abandoned
- 1996-10-02 AU AU71447/96A patent/AU729849B2/en not_active Ceased
- 1996-10-02 EP EP96932799A patent/EP0866494A4/en not_active Withdrawn
- 1996-10-02 KR KR1019980704098A patent/KR19990071818A/ko not_active Application Discontinuation
- 1996-10-02 WO PCT/JP1996/002863 patent/WO1997021243A1/ja not_active Application Discontinuation
- 1996-11-11 TW TW085113772A patent/TW328141B/zh not_active IP Right Cessation
-
2001
- 2001-11-26 US US09/991,750 patent/US6589855B2/en not_active Expired - Lifetime
- 2001-11-26 US US09/991,747 patent/US6573158B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0866494A4 (en) | 2000-03-22 |
US6573158B2 (en) | 2003-06-03 |
US20020048907A1 (en) | 2002-04-25 |
AU729849B2 (en) | 2001-02-08 |
CN1203696A (zh) | 1998-12-30 |
KR19990071818A (ko) | 1999-09-27 |
US6589855B2 (en) | 2003-07-08 |
CA2238974A1 (en) | 1997-06-12 |
AU7144796A (en) | 1997-06-27 |
US6342434B1 (en) | 2002-01-29 |
WO1997021243A1 (en) | 1997-06-12 |
US20020034860A1 (en) | 2002-03-21 |
EP0866494A1 (en) | 1998-09-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW328141B (en) | Manufacturing method for semiconductor wafer and IC card and its bearer | |
USRE35119E (en) | Textured metallic compression bonding | |
EP1021824A4 (en) | PLANARIZATION PROCESS FOR SEMICONDUCTOR SUBSTRATES | |
EP0881671A3 (en) | Method for fabricating semiconductor device | |
EP0288052A3 (en) | Semiconductor device comprising a substrate, and production method thereof | |
EP0082256A3 (en) | Method of manufacturing a semiconductor device comprising dielectric isolation regions | |
MY129570A (en) | Semiconductor integrated circuit device and a method of manufacturing the same | |
WO1997024752A3 (en) | A method of manufacturing a high voltage gan-aln based semiconductor device and semiconductor device made | |
EP0867918A3 (en) | Process for producing semiconductor substrate | |
CA2279786A1 (en) | A composition and method for selectively etching a silicon nitride film | |
GB9204961D0 (en) | Method of mounting silicon chips on metallic mounting surfaces | |
EP0412545A2 (en) | IC package and IC card incorporating the same thereinto | |
CA2159243A1 (en) | Method of Manufacturing Chip-Size Package-Type Semiconductor Device | |
MY123249A (en) | A semiconductor device and a method of manufacturing the same and an electronic device | |
SG125932A1 (en) | Method of forming strained silicon on insulator substrate | |
EP0757377A3 (en) | Semiconductor substrate and fabrication method for the same | |
WO2002068320A3 (en) | Devices having substrates with openings passing through the substrates and conductors in the openings, and methods of manufacture | |
CA2075020A1 (en) | Method for preparing semiconductor member | |
CA2061264A1 (en) | Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution | |
KR970023772A (ko) | 에스오아이 (soi) 구조를 갖는 본드 결합된 기판 및 그 제조 방법 | |
AU5410500A (en) | Device and method for making devices comprising at least a chip mounted on a support | |
EP1043767A4 (en) | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, PRINTED CIRCUIT BOARD, AND ELECTRONIC DEVICE | |
ATE342608T1 (de) | Herstellungsverfahren einer hybriden integrierten schaltung mit einem halbleiterbauelement und einem piezoelektrischen filter | |
GB2170042B (en) | Method of making integrated circuit silicon die composite having hot melt adhesive on its silicon base | |
FR2767966B1 (fr) | Dispositif a circuit integre securise et procede de fabrication |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |