TW201709293A - 用於內連線的釕金屬特徵部填補 - Google Patents
用於內連線的釕金屬特徵部填補 Download PDFInfo
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- TW201709293A TW201709293A TW105117505A TW105117505A TW201709293A TW 201709293 A TW201709293 A TW 201709293A TW 105117505 A TW105117505 A TW 105117505A TW 105117505 A TW105117505 A TW 105117505A TW 201709293 A TW201709293 A TW 201709293A
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- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 title claims abstract description 10
- 239000002184 metal Substances 0.000 claims abstract description 114
- 229910052751 metal Inorganic materials 0.000 claims abstract description 114
- 239000000758 substrate Substances 0.000 claims abstract description 86
- 238000000034 method Methods 0.000 claims abstract description 47
- 238000000151 deposition Methods 0.000 claims abstract description 15
- 229910052707 ruthenium Inorganic materials 0.000 claims abstract description 9
- 239000007789 gas Substances 0.000 claims description 22
- 238000010438 heat treatment Methods 0.000 claims description 22
- 230000006911 nucleation Effects 0.000 claims description 21
- 238000010899 nucleation Methods 0.000 claims description 21
- 230000008569 process Effects 0.000 claims description 12
- 238000005229 chemical vapour deposition Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 9
- 238000000231 atomic layer deposition Methods 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 239000012159 carrier gas Substances 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 238000007747 plating Methods 0.000 claims description 2
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 239000002245 particle Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 68
- 239000010949 copper Substances 0.000 description 18
- 238000001878 scanning electron micrograph Methods 0.000 description 9
- 238000001465 metallisation Methods 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 239000003989 dielectric material Substances 0.000 description 5
- 238000004377 microelectronic Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- WEVYAHXRMPXWCK-UHFFFAOYSA-N Acetonitrile Chemical compound CC#N WEVYAHXRMPXWCK-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- -1 butyl imino-trimethylmethylamino-ruthenium Chemical compound 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011534 incubation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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- C23C16/45523—Pulsed gas flow or change of composition over time
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
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- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
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- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
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- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76882—Reflowing or applying of pressure to better fill the contact hole
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- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
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Abstract
提供至少部分填補基板中之特徵部的方法。方法包含提供含有特徵部的基板;沉積釕(Ru)金屬層以至少部分填補特徵部;並且熱處理基板以使特徵部中的Ru金屬層回流。
Description
本發明係關於使用低電阻係數之釕(Ru)金屬對微電子裝置進行特徵部(例如介層孔與渠溝)之無縫隙填補的方法。 [相關申請案的交互參照]
本發明與2015年6月5日提申之美國臨時專利申請案第62/171739號有關,並主張該案之優先權,該案以全文加入本案之參考資料。
積體電路含有各種半導體裝置與複數之導電金屬通道,其供應電源給半導體裝置且使這些半導體裝置可以共享及交換資訊。在積體電路之中,利用使金屬層彼此互相絕緣的金屬間或層間介電層而將金屬層互相堆疊在另一金屬層之上。
通常地,各金屬層必須與至少一額外的金屬層形成電性接觸。藉由在用以使金屬層分離的層間介電質之中蝕刻出特徵部(亦即介層孔)而達成此種電性接觸,且利用金屬填補所產生的介層孔而產生內連線。金屬層通常佔據層間介電質中被蝕刻出的通道。「介層孔」一般代表形成於介電層之中的任何特徵部,例如孔洞、線路或其它類似特徵部,其提供通過介電層而到達介電層之下方的導體層之電性連接。類似地,一般將連接兩個或更多之介層孔的金屬層稱為渠溝。
在用以製造積體電路的多層金屬化方案中使用銅(Cu)金屬,會因為Cu原子在介電材料(例如SiO2
)中的高遷移率而產生問題,且Cu原子可能在Si中產生電性缺陷。因此,一般以阻障材料包封Cu金屬層、填補Cu的渠溝、及填補Cu的介層孔而防止Cu原子擴散到介電材料及Si之中。在沉積Cu晶種之前,通常先將阻障層沉積在渠溝與介層孔的側壁與底部之上,且較佳的係,阻障層包括在Cu之中不起反應且不融和、對介電材料提供優良的接合且提供低電阻係數的材料。
裝置效能的提升通常伴隨著裝置面積的減小或裝置密度的提高。提高裝置密度需要使用於形成內連線之介層孔的尺寸縮小,包括更高的深寬比(亦即深度對寬度之比例)。隨著介層孔的尺寸縮小且深寬比提高,愈來愈難在介層孔的側壁上形成具有足夠厚度的擴散阻障層,同時又提供足夠的容積給介層孔中的金屬層。此外,隨著介層孔與渠溝尺寸縮小且介層孔與渠溝中之層的厚度減小,層及層之接面的材料性質變得日益重要。具體而言,必須謹慎地將形成這些層的製程整合到對所有製程順序的步驟均維持優良控制的可製造的製程順序中。
關於在基板之日益微型化的特徵部中使用Cu金屬的問題,需要使用其他低電阻係數的金屬來取代Cu。
提供對微電子裝置中之內連線進行無縫隙Ru金屬特徵部填補的方法。
根據本發明之一實施例,提供透過下列步驟以至少部分填補基板中之特徵部的方法:提供包含特徵部的基板;沉積釕(Ru)金屬層以至少部分填補該特徵部;並且熱處理該基板以使該特徵部中的該Ru金屬層回流。
根據另一實施例,提供透過下列步驟以填補基板中之特徵部的方法:提供包含特徵部的基板;沉積將該特徵部填補的保型釕(Ru)金屬層;並且熱處理該基板以使該特徵部中的該保型Ru金屬層回流,其中該保型Ru金屬層具有在該特徵部中的縫隙空孔,且該熱處理將該縫隙空孔密合並使該特徵部中的該保型Ru金屬層之晶粒尺寸增大。
根據更另一實施例,提供透過下列步驟以至少部分填補基板中之特徵部的方法:提供包含特徵部的基板,其中該特徵部係在該基板上的介電層中形成;在該特徵部中形成成核層;在該成核層上沉積保型釕(Ru)金屬層以至少部分填補該特徵部;並且熱處理該基板以使該特徵部中的該保型Ru金屬層回流,其中該熱處理使特徵部填補物中的縫隙減少並使該特徵部中的該保型Ru金屬層之晶粒尺寸增大。
以若干實施例來描述使用低電阻係數之Ru金屬對微電子裝置進行特徵部之無縫隙填補的方法。
根據一實施例,提供至少部分填補基板中之特徵部的方法。該方法包括提供含有特徵部的基板;沉積釕(Ru)金屬層以至少部分填補該特徵部;並且熱處理該基板以使該特徵部中的該Ru金屬層回流。該至少部分填補的方法利用毛細作用將受熱軟化的Ru金屬下拉進非常狹窄的特徵部,並利用Ru金屬的再結晶作用而形成更大的Ru金屬晶粒。本案發明人發現,Ru金屬的低溫再結晶作用及回焊的獨特且意想不到的結果,可用來以Ru金屬填補取代Cu金屬填補。大晶粒尺寸之經回焊Ru金屬具有取代Cu金屬在狹窄特徵部中之填補所需要的低電阻。業已證實,為符合國際半導體科技技術藍圖(ITRS)之電阻要求,Ru金屬(有著短的有效電子平均自由路徑)為在10nm (5nm技術節點)最小特徵部尺寸下作為Cu金屬取代品的極佳選擇。由於Ru金屬的許多材料及電子性質,與Cu金屬相比,Ru金屬較不因特徵部尺寸比例減小而受影響。
特徵部可包括(例如)渠溝或介層孔。特徵部之直徑可小於30nm、小於20nm、小於10nm、或小於5nm。特徵部之直徑可介於20nm及30nm之間、介於10nm及20nm之間、介於 5nm及10nm之間、或介於 3nm 及5nm之間。特徵部之深度可(例如)大於20nm、大於50nm、大於100nm、或大於200nm。特徵部可具有(例如)介於2:1及 20:1之間、介於2:1及10:1之間、或介於2:1及5:1之間的深寬比。在一範例中,基板(例如Si)包括介電層,且特徵部係在介電層中形成。
圖1根據本發明之一實施例說明在基板中用於Ru金屬填補的狹窄特徵部之尺寸。透過下列動作準備狹窄特徵部:在Si基板中蝕刻特徵部,之後在經蝕刻的特徵部中沉積(回填)氧化物層(SiO2
),而減小該經蝕刻的特徵部的直徑。該經蝕刻的特徵部具有50nm、56nm、 64nm、及 80 nm的直徑。在特徵部的中間深度附近處,經回填的特徵部具有約11.5nm、約14nm、約 17.4nm、及約 28.5nm的直徑(寬度)。
圖2A及2B根據本發明之一實施例呈現在基板中用於Ru金屬薄膜填補的特徵部之剖面及頂視SEM影像。基板中之特徵部的準備記載於圖1中。圖2A中的特徵部具有約14nm之直徑、約120nm之深度、約8.5之深寬比、及約 112nm之節距。圖2B中的特徵部具有約11.5nm之直徑、約110nm之深度、約9.5之深寬比、及約 100nm之節距。
圖3A根據本發明之一實施例呈現在基板中之狹窄特徵部中的Ru金屬沉積之剖面SEM影像。基板中之特徵部的準備記載於圖1中。特徵部具有約11.5nm、約17.4nm及約28.5nm之直徑。在Ru金屬沉積之前,先在約350°C之基板溫度下使用原子層沉積(ALD)並使用第三丁基亞胺基-三-乙基甲基胺基-鉭(TBTEMT, Ta(NCMe3
)(NEtMe)3
)及氨(NH3
)的交替暴露在特徵部中沉積15Å厚的 TaN 成核層。在約200°C之基板溫度下以化學氣相沉積(CVD)並使用Ru3
(CO)12
及CO載氣在該TaN 成核層上沉積厚度為70Å的保型Ru金屬層。圖3A顯示,具有11.5nm 及17.4nm之直徑的特徵部被 Ru 金屬有效地填補,然而具有 28.5nm之直徑的狹窄特徵部未被完整地填補,且在該狹窄特徵部的上部處具有一縫隙。
圖3B根據本發明之一實施例呈現在基板中之狹窄特徵部中的Ru金屬沉積之剖面SEM影像。150Å之保型Ru金屬沉積顯示,所有特徵部均被 Ru 金屬有效地填補。
圖4A及4B根據本發明之一實施例呈現在基板中之特徵部中剛沉積的Ru金屬層之剖面SEM影像。該Ru金屬層係在約200°C之基板溫度下以CVD並使用Ru3
(CO)12
及CO載氣所沉積,且該特徵部亦包含參考圖3A所述之TaN 成核層。圖4A及4B中的SEM放大率分別為200000及350000。特徵部在中間深度處(大約28nm寬)未被完整地填補,且在特徵部之頂部附近處,在Ru金屬中具有約9nm寬的一縫隙。
圖5A及5B根據本發明之一實施例呈現在基板中之特徵部中經熱處理的Ru金屬之剖面SEM影像。圖5A及5B中的SEM放大率分別為200000及350000。在450°C之基板溫度且存在形成氣體之情況下,將剛沉積的Ru金屬層熱處理歷時五分鐘。圖5A及5B顯示,熱處理將特徵部中的Ru金屬回焊,而以具有大晶粒尺寸的Ru 金屬有效地填補狹窄特徵部;並且使Ru金屬之特徵部填補物中的縫隙減少或消除。該填補方法利用毛細作用將受熱軟化的Ru金屬下拉進非常狹窄的特徵部中。此外,特徵部中任一Ru金屬縫隙空孔均因熱處理而被密合。
圖5A及5B中的結構可被進一步處理,例如透過執行平坦化處理(例如化學機械拋光(CMP))而將過多的Ru金屬從特徵部之上方移除。
根據若干實施例,在填補Ru金屬之前,可透過ALD或CVD將成核層沉積在特徵部中。該成核層可包括(例如)氮化物材料。根據一實施例,該成核層可選自由下列所組成之群組:Mo、MoN、Ta、TaN、W、WN、Ti、及TiN。該成核層的一作用為在特徵部中對Ru金屬提供優良的成核表面及接合表面,以確保Ru金屬層以短暫之孕育時間進行保型沉積。與當使用Cu金屬填補時不同的係,在介電材料與特徵部中的Ru金屬之間不需要優良的阻障層。因此,在Ru金屬填補之情況下,成核層可非常薄,且可為不連續或不完整的,其具有縫隙而在特徵部中使介電材料暴露出來。與Cu金屬特徵部填補相比,這允許增加特徵部填補的Ru金屬量。在一些範例中,成核層的厚度可為20Å 或更小、 15Å或更小、10Å或更小、或5Å或更小。
根據若干實施例,可透過ALD、CVD、鍍覆、或濺鍍來沉積Ru金屬層。在一範例中,可透過CVD並使用Ru3
(CO)12
及 CO載氣來沉積Ru金屬層。然而,可使用其他的Ru金屬前驅物來沉積Ru金屬層。在若干範例中,Ru金屬層可包括含Ru合金。
根據本發明之實施例,可在第一基板溫度下沉積Ru金屬層,且可在高於第一基板溫度的第二基板溫度下執行剛沉積的Ru金屬層之接續熱處理。例如,可在介於200°C 與 600°C之間、介於300°C 與400°C之間、介於 500°C 與 600°C之間、介於400°C 與 450°C之間、或介於450°C與 500°C之間的基板溫度下執行熱處理。此外,可在低於大氣壓力下,於Ar氣體、 H2
氣體、或Ar 氣體及 H2
氣體兩者存在之情況下執行熱處理。在一範例中,可在低於大氣壓力下,於形成氣體存在之情況下執行熱處理。形成氣體為H2
及N2
之混合物。在另一範例中,可在高真空狀態下且不使氣體流進用於熱處理之處理腔室中之情況下執行熱處理。
根據一實施例,可在氣態電漿存在之情況下執行熱處理。與未使用氣態電漿時相比,這允許降低熱處理之溫度。這允許使用可與低-k及極低-k材料相容的熱處理溫度。根據若干實施例,可在2.5 ≤ k < 3.9之低-k材料、或k < 2.5之極低-k材料中形成特徵部。在一範例中,氣態電漿可包括Ar氣體。可選擇電漿狀態而包括低能量的Ar離子。
根據另一實施例,在沉積Ru金屬層之前,可先將基板暴露到處理氣體,其將特徵部中的表面改質並提高Ru金屬層在特徵部中的成核速率。在一範例中,該處理氣體可包括氮電漿、NH3
電漿、 NH3
退火、或其中之組合。暴露到處理氣體可將特徵部中的表面氮化。在一範例中,處理氣體提高特徵部中的表面之親水性,並因此提高Ru金屬在特徵部中的成核速率。
在一範例中,在特徵部被Ru金屬層完整地填補之前,特徵部之開口可能夾止(關閉),而在特徵部中形成縫隙。根據一實施例,可透過將過多的Ru金屬從特徵部之上方移除(例如透過平坦化處理)而移除縫隙,藉此將導致夾止發生的過多的Ru金屬移除。之後,可執行熱處理以將特徵部中的Ru金屬層回焊。根據一實施例,此之後可接續在經回焊的Ru金屬層上沉積其他的Ru金屬層,並重複執行熱處理製程以達到特徵部之無縫隙填補。
在若干實施例中,已揭露使用低電阻係數之Ru金屬對微電子裝置進行特徵部(例如介層孔與渠溝)之無縫隙填補的方法。本發明前述實施例之說明係為了解釋及說明的目的而提出。其並非意欲窮舉或將本發明限制於所揭露之精確型式。本發明與隨後之申請專利範圍包含許多用語,其係僅用於說明性之目的,而不應被解釋為限制性。從上述教示,熟悉本項技藝之人士知悉可以有許多修改與變化。熟悉本項技藝之人士將理解圖式所示之各種元件的各種等效結合與替代。因此吾人意欲本發明之範疇非由此詳細描述所界定,而係由本文中隨附的申請專利範圍所界定。
無
藉著參考上述說明並結合附圖,可對本發明有更完整的了解,且其許多優點亦更顯清楚,在附圖中:
圖1根據本發明之一實施例說明在基板中用於Ru金屬填補的狹窄特徵部之尺寸;
圖2A及2B根據本發明之一實施例呈現在基板中用於Ru金屬薄膜填補的特徵部之剖面及頂視掃描式電子顯微鏡(SEM)影像;
圖3A根據本發明之一實施例呈現在基板中之狹窄特徵部中的Ru金屬沉積之剖面SEM影像;
圖3B根據本發明之一實施例呈現在基板中之狹窄特徵部中的Ru金屬沉積之剖面SEM影像;
圖4A及4B根據本發明之一實施例呈現在基板中之特徵部中剛沉積的Ru金屬層之剖面SEM影像;以及
圖5A及5B根據本發明之一實施例呈現在基板中之特徵部中經熱處理的Ru金屬層之剖面SEM影像。
Claims (20)
- 一種至少部分填補基板中之特徵部的方法,包括下列步驟: 提供包含一特徵部的一基板; 沉積釕(Ru)金屬層以至少部分填補該特徵部;並且 熱處理該基板以使該特徵部中的該Ru金屬層回流。
- 如申請專利範圍第1項之至少部分填補基板中之特徵部的方法,更包含下列步驟: 在沉積該Ru金屬層之前,先在該特徵部中形成成核層。
- 如申請專利範圍第2項之至少部分填補基板中之特徵部的方法,其中該成核層係不完整的,其具有縫隙而使該基板在該特徵部中暴露出來。
- 如申請專利範圍第2項之至少部分填補基板中之特徵部的方法,其中該成核層係選自由下列所組成之群組:Mo、MoN、Ta、TaN、W、WN、Ti、及TiN。
- 如申請專利範圍第1項之至少部分填補基板中之特徵部的方法,更包含下列步驟: 在沉積該Ru金屬層之前,先將該基板暴露到處理氣體,該處理氣體提高該Ru金屬層在該特徵部中的成核速率。
- 如申請專利範圍第5項之至少部分填補基板中之特徵部的方法,其中該處理氣體包括氮。
- 如申請專利範圍第1項之至少部分填補基板中之特徵部的方法,其中該Ru金屬層係透過原子層沉積(ALD)、化學氣相沉積(CVD)、鍍覆、或濺鍍來沉積。
- 如申請專利範圍第7項之至少部分填補基板中之特徵部的方法,其中該Ru金屬層係透過CVD並使用Ru3 (CO)12 及 CO載氣來沉積。
- 如申請專利範圍第1項之至少部分填補基板中之特徵部的方法,其中該基板包括介電層且該特徵部係形成在該介電層中。
- 如申請專利範圍第1項之至少部分填補基板中之特徵部的方法,其中該熱處理係在Ar氣體、 H2 氣體、Ar 氣體及 H2 氣體、或 H2 氣體及N2 氣體存在之情況下執行。
- 如申請專利範圍第1項之至少部分填補基板中之特徵部的方法,其中該Ru金屬層係在第一基板溫度下沉積,且該熱處理係在高於該第一基板溫度的第二基板溫度下執行。
- 如申請專利範圍第11項之至少部分填補基板中之特徵部的方法,其中該第二基板溫度介於200°C 與 600°C之間。
- 如申請專利範圍第1項之至少部分填補基板中之特徵部的方法,其中沉積該Ru金屬層使該特徵部之開口在該特徵部被填補Ru金屬層之前發生夾止,因此在該特徵部中形成一縫隙,該方法更包括下列步驟:在該熱處理之前,先將導致夾止發生的過多的Ru金屬從該特徵部之上方移除。
- 如申請專利範圍第13項之至少部分填補基板中之特徵部的方法,更包含下列步驟: 在該特徵部中的經熱處理的Ru金屬層上沉積其他的Ru金屬層; 熱處理該其他的Ru金屬層以使該特徵部中的該其他的Ru金屬層回流。
- 一種填補基板中之特徵部的方法,包括下列步驟: 提供包含一特徵部的一基板; 沉積將該特徵部填補的保型釕(Ru)金屬層;並且 熱處理該基板以使該特徵部中的該保型Ru金屬層回流,其中該保型Ru金屬層具有在該特徵部中的縫隙空孔,且該熱處理將該縫隙空孔密合並使該特徵部中的該保型Ru金屬層之晶粒尺寸增大。
- 如申請專利範圍第15項之填補基板中之特徵部的方法,其中該基板包括介電層且該特徵部係形成在該介電層中。
- 如申請專利範圍第15項之填補基板中之特徵部的方法,其中該保型Ru金屬層係在第一基板溫度下沉積,且該熱處理係在高於該第一基板溫度且介於200°C 與 600°C之間的第二基板溫度下執行。
- 一種至少部分填補基板中之特徵部的方法,包括下列步驟: 提供包含一特徵部的一基板,其中該特徵部係在該基板上的介電層中形成; 在該特徵部中形成成核層; 在該成核層上沉積保型釕(Ru)金屬層以至少部分填補該特徵部;並且 熱處理該基板以使該特徵部中的該保型Ru金屬層回流,其中該熱處理使特徵部填補物中的縫隙減少並使該特徵部中的該保型Ru金屬層之晶粒尺寸增大。
- 如申請專利範圍第18項之至少部分填補基板中之特徵部的方法,其中該保型Ru金屬層係在第一基板溫度下沉積,且該熱處理係在高於該第一基板溫度且介於200°C 與 600°C之間的第二基板溫度下執行。
- 如申請專利範圍第18項之至少部分填補基板中之特徵部的方法,其中該成核層係選自由下列所組成之群組: Mo、MoN、Ta、TaN、W、WN、Ti、及TiN。
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