TW200811953A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Semiconductor device and semiconductor device manufacturing method Download PDF

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Publication number
TW200811953A
TW200811953A TW096122758A TW96122758A TW200811953A TW 200811953 A TW200811953 A TW 200811953A TW 096122758 A TW096122758 A TW 096122758A TW 96122758 A TW96122758 A TW 96122758A TW 200811953 A TW200811953 A TW 200811953A
Authority
TW
Taiwan
Prior art keywords
film
copper
semiconductor device
wiring
wafer
Prior art date
Application number
TW096122758A
Other languages
English (en)
Chinese (zh)
Inventor
Masahiro Horigome
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200811953A publication Critical patent/TW200811953A/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6506—Formation of intermediate materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68—Organic materials, e.g. photoresists
    • H10P14/683—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC
    • H10P14/687—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC the materials being fluorocarbon compounds, e.g. (CHxFy) n or polytetrafluoroethylene

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW096122758A 2006-06-23 2007-06-23 Semiconductor device and semiconductor device manufacturing method TW200811953A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006174429A JP5194393B2 (ja) 2006-06-23 2006-06-23 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW200811953A true TW200811953A (en) 2008-03-01

Family

ID=38833277

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096122758A TW200811953A (en) 2006-06-23 2007-06-23 Semiconductor device and semiconductor device manufacturing method

Country Status (8)

Country Link
US (1) US20090134518A1 (https=)
EP (1) EP2034517A4 (https=)
JP (1) JP5194393B2 (https=)
KR (1) KR20090003368A (https=)
CN (1) CN101461043A (https=)
IL (1) IL195951A0 (https=)
TW (1) TW200811953A (https=)
WO (1) WO2007148535A1 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120049239A (ko) * 2009-06-26 2012-05-16 도쿄엘렉트론가부시키가이샤 플라즈마 처리 방법
JP5364765B2 (ja) 2011-09-07 2013-12-11 東京エレクトロン株式会社 半導体装置及び半導体装置の製造方法
US8691709B2 (en) 2011-09-24 2014-04-08 Tokyo Electron Limited Method of forming metal carbide barrier layers for fluorocarbon films
JP2015195282A (ja) * 2014-03-31 2015-11-05 東京エレクトロン株式会社 成膜方法、半導体製造方法及び半導体装置
JP5778820B1 (ja) * 2014-04-09 2015-09-16 日本特殊陶業株式会社 スパークプラグ
TW201622205A (zh) * 2014-08-04 2016-06-16 吉坤日礦日石能源股份有限公司 具有凹凸圖案之構件的製造方法
WO2016080034A1 (ja) * 2014-11-18 2016-05-26 三菱電機株式会社 信号伝送絶縁デバイス及びパワー半導体モジュール

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03140496A (ja) * 1989-10-25 1991-06-14 Daido Steel Co Ltd 母材の表面着色方法
JP3158598B2 (ja) * 1991-02-26 2001-04-23 日本電気株式会社 半導体装置およびその製造方法
JP4355039B2 (ja) * 1998-05-07 2009-10-28 東京エレクトロン株式会社 半導体装置及び半導体装置の製造方法
JP2000208622A (ja) * 1999-01-12 2000-07-28 Tokyo Electron Ltd 半導体装置及びその製造方法
DE60037395T2 (de) * 1999-03-09 2008-11-27 Tokyo Electron Ltd. Herstellung eines halbleiter-bauelementes
JP4260764B2 (ja) * 1999-03-09 2009-04-30 東京エレクトロン株式会社 半導体装置の製造方法
EP1077479A1 (en) * 1999-08-17 2001-02-21 Applied Materials, Inc. Post-deposition treatment to enchance properties of Si-O-C low K film
JP2004509467A (ja) * 2000-09-18 2004-03-25 エーシーエム　リサーチ，インコーポレイティド 超低誘電率誘電体と金属の組み合わせ
JP3817463B2 (ja) * 2001-11-12 2006-09-06 新光電気工業株式会社 多層配線基板の製造方法
JP2005026386A (ja) * 2003-07-01 2005-01-27 Matsushita Electric Ind Co Ltd 半導体装置
JP4413556B2 (ja) * 2003-08-15 2010-02-10 東京エレクトロン株式会社 成膜方法、半導体装置の製造方法
JP2005109138A (ja) 2003-09-30 2005-04-21 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP4715207B2 (ja) * 2004-01-13 2011-07-06 東京エレクトロン株式会社 半導体装置の製造方法及び成膜システム
JP4194521B2 (ja) 2004-04-07 2008-12-10 東京エレクトロン株式会社 半導体装置の製造方法
JP4555143B2 (ja) * 2004-05-11 2010-09-29 東京エレクトロン株式会社 基板の処理方法
US20060113675A1 (en) * 2004-12-01 2006-06-01 Chung-Liang Chang Barrier material and process for Cu interconnect
JP2006190884A (ja) * 2005-01-07 2006-07-20 Toshiba Corp 半導体装置及び半導体装置の製造方法
JP2006135363A (ja) * 2006-02-14 2006-05-25 Renesas Technology Corp 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
WO2007148535A1 (ja) 2007-12-27
JP2008004841A (ja) 2008-01-10
CN101461043A (zh) 2009-06-17
IL195951A0 (en) 2009-09-01
US20090134518A1 (en) 2009-05-28
KR20090003368A (ko) 2009-01-09
EP2034517A1 (en) 2009-03-11
JP5194393B2 (ja) 2013-05-08
EP2034517A4 (en) 2010-07-21

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