KR960032686A - 플러그를 갖춘 반도체 디바이스 제조방법 - Google Patents

플러그를 갖춘 반도체 디바이스 제조방법 Download PDF

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KR960032686A
KR960032686A KR1019960003386A KR19960003386A KR960032686A KR 960032686 A KR960032686 A KR 960032686A KR 1019960003386 A KR1019960003386 A KR 1019960003386A KR 19960003386 A KR19960003386 A KR 19960003386A KR 960032686 A KR960032686 A KR 960032686A
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passageway
depositing
layer
adhesive layer
plug
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더블유. 피오드앨리스 로버트
디. 마니아 파푸
엘. 클레인 제프레이
제이. 로만 베르나드
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빈센트 비. 인그라시아
모토로라 인코포레이티드
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Publication of KR960032686A publication Critical patent/KR960032686A/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/7685Barrier, adhesion or liner layers the layer covering a conductive structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/959Mechanical polishing of wafer

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

도전성플러그(46)는 알루미늄질화접착층(42)을 이용해 반도체디바이스에서 만들어진다. 접착층은 접촉통로(44)를 만들기 전에 중간절연물(44) 위에 용착되어 종래 기술과 같이 통로의 주위벽이나 밑바닥에 일정하게 접착될 필요가 없다. 텅스텐이나 다른 플러그재료가 이때 통로 안과 접착층 위로 용착되며, 그 후 플러그를 만들기 위해 그 위의 나머지 부분이 제거된다. 접착층의 나머지 부분은 디바이스 내에 남겨질 수도 있고 적절하게 제거될 수도 있다.

Description

플러그를 갖춘 반도체 디바이스 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도 내지 제8도는 본 발명에 따른 접착층을 사용하여 도전성플러그를 형성하는 공정을 보여주는 단면도

Claims (4)

  1. 반도체디바이스를 제조하기 위한 방법에 있어서, 금속연결부를 가지는 반도체기판을 제공하는 단계와; 상기 금속연결부상에 중간절연물을 용착시키는(depositing) 단계와; 상기 중간절연물상에 알루미늄질화물로 이루어진 접착층을 용착시키는 단계와; 상기 금속연결부의 일부를 노출시키기 위해, 상기 접착층과 상기 중간 절연층을 통과하는 통로(opening)를 에칭(etching)하며 상기 통로는 상기 금속연결부상에 위치되어 그 일부를 노출시키는 에칭 단계와; 상기 통로를 충분히 채울 수 있도록 상기 통로내와 상기 접착층상에 도전성플러그재료를 용착시키는 단계 및, 상기 통로내에 도전성플러그를 형성하고 상기 금속연결부에 전기적으로 연결되도록 도전성플러그 재료를 폴리슁백(polishing back)라는 단계를 포함하는 것을 특징으로 하는 반도체 디바이스 제조방법
  2. 반도체디바이스를 제조하기 위한 방법에 있어서, 반도체기판을 제공하는 단계와; 상기 반도체기판상에 절연물을 용착시키는 단계와, 상기 절연물상에 알루미늄질화물로 이루어진 층을 용착시키는 단계와; 제1의 크기 폭을 가지는 상기 제1통로를 상기 층을 통해 에칭하는 단계와; 제2통로가 실질적으로 상기 제1통로의 크기와 같은 제2의 크기 폭을 가지도록 하드마스크로서 그 층에 상기 제1통로를 사용해 절연물 속으로 상기 제2통로를 비등방성으로 에칭하는 단계와; 상기 알루미늄질화물로 이루어진 층상에 상기 제1통로의 경계를 정하는 포토레지스트마스크를 패턴닝(patterning)하는 단계와; 상기 제1통로를 만들기 위해 포토레지스트마스트를 사용하는 단계 및; 상기 제2통로를 비등방성으로 에칭하기에 앞서 상기 포토레지스트마스크를 제거하는 단계를 포함하는 것을 특징으로 하는 반도체 디바이스 제조방법
  3. 반도체디바이스를 제조하기 위한 방법에 있어서, 도전성영역을 가지는 반도체기판을 제공하는 단계와; 상기 도전성영역상에 절연재료를 용착시키는 단계와; 상기 절연재료상에 알루미늄질화물로 이루어진 접착층을 용착시키는 단계와; 상기 도전성영역을 노출시키기 위해 상기 통로를 접착층과 절연재료 속에서 에칭하는 단계와; 상기 통로 내의 도전성플러그 재료가 절연재료에 인접할 수 있고 상기 도전성역영에 전기적으로 접촉하고 상기 통로를 충분히 채울 수 있도록, 상기 도전성플러그재료를 접착층의 나머지 부분위와 통로내로 용착시키는 단계 및; 상기 도전성플러그를 형성하기 위해 통로 윗부분 주위에 존재하는 도전성플러그 재료부를 제거하는 단계를 포함하는 것을 특징으로 하는 반도체 디바이스 제조방법
  4. 반도체디바이스를 제조하기 위한 방법에 있어서, 반도체기판을 제공하는 단계와; 상기 반도체기판상에 알루미늄으로 이루어진 주부(primary portion)와 그 위에 캡핑층(capping layer)으로 이루어진 금속연결부를 형성하는 단계와; 상기 금속연결부상에 중간절연물을 용착시키는 단계와; 상기 중간절연물상에 알루비늄질화물로 이루어진 접착층을 용착시키는 단계와; 상기 금속연결부의 상기 캡핑층 일부를 노출시키도록 상기 접착층과 상기 중간절연층 속으로 통로를 에칭하는 단계와; 상기 금속 연결부에 전기적으로 접촉하게 하고 상기 통로를 채울 때까지 텅스텐으로 이루어진 플러그층을 상기 반도체기판과 상기 접착층상에 용착시키는 단계 및; 상기 통로에 텅스텐플러그를 형성하도록 통로 위의 주변부에 있는 플러그층 부분을 제거하도록 플러그층을 폴리슁백(polishing back)하는 단계를 포함하는 것을 특징으로 하는 반도체 디바이스 제조방법
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960003386A 1995-02-24 1996-02-13 플러그를 갖춘 반도체 디바이스 제조방법 KR960032686A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/393,782 US5534462A (en) 1995-02-24 1995-02-24 Method for forming a plug and semiconductor device having the same
US393,782 1995-02-24

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KR960032686A true KR960032686A (ko) 1996-09-17

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JP (1) JP4094073B2 (ko)
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