KR940012603A - 개선된 바이폴라 트랜지스터 - Google Patents

개선된 바이폴라 트랜지스터 Download PDF

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Publication number
KR940012603A
KR940012603A KR1019930024947A KR930024947A KR940012603A KR 940012603 A KR940012603 A KR 940012603A KR 1019930024947 A KR1019930024947 A KR 1019930024947A KR 930024947 A KR930024947 A KR 930024947A KR 940012603 A KR940012603 A KR 940012603A
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South Korea
Prior art keywords
emitter
bipolar transistor
doping
separation oxide
extends
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KR1019930024947A
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English (en)
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라트남 페루말
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존 엠. 클락 3세
내쇼날 세미컨덕터 코포레이션
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Application filed by 존 엠. 클락 3세, 내쇼날 세미컨덕터 코포레이션 filed Critical 존 엠. 클락 3세
Publication of KR940012603A publication Critical patent/KR940012603A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Abstract

에미터 벽을 지니는 개선된 바이폴라 트랜지스터 및 그러한 트랜지스터를 제조하는 방법이 개시되어 있다. 상기 방법은 분리 산화물에 인접한 능동 베이스의 에지부분을 개별적을 도우핑하여 상기 에지부분에 도우핑 레벨을 증가시킴으로써 다른 형태로 존재하는 좁아지는 베이스를 저지하는 단계를 포함한다.

Description

개선된 바이폴라 트랜지스터
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 에미터벽을 지니며 폴리실리콘 접점을 갖는 본 발명에 따른 바이폴라 트랜지스터에 대한 평면도.
제4도는 단면이 제3도의 절단선으로 나타낸 바와같이 취해져 있는, 에미터벽을 지니며 폴리실리콘 접점을 갖는 본 발명에 따른 NPN 바이폴라 트랜지스터를 제조함에 있어서의 n+ 주입단계시 대한 단면도.
제5도는 단면이 제3도의 절단선으로 나타낸 바와같이 취해져 있는, 에미터벽을 지니며 폴리실리콘 접점을 갖는 본 발명에 따른 NPN 바이폴라 트랜지스터를 제조함에 있어서의 p+주입단계시에 대한 단면도.
제6도는 단면이 제3도의 절단선으로 나타낸 바와같이 취해져 있는, 에미터벽을 지니며 폴리실리콘 접점을 갖는 본 발명에 따른 NPN 바이폴라 트랜지스터에 대한 단면도.

Claims (1)

  1. 제1극성의 에미터 및 콜렉터 및 제2극성의 베이스를 갖는 에미터 벽을 지니는 바이폴라 트랜지스터를 제조하는 방법에 있어서, 분리 산화물에 의해 분리된 제1극성의 영역을 지니는 반도체 기판을 제공하는 단계, 제2극성의 도우펀트로 상기 기판을 도우핑하여 분리 산화물까지 연장하는 베이스를 형성하는 단계, 제1극성의 도우펀트로 상기 기판을 도우핑하여 분리 산화물까지 연장하는 에미터를 형성하는 단계, 및 에미터가 분리 산화물까지 연장하는 반도체 기판을 제2극성의 도우펀트로 부가적으로 도우핑하여 분리 산화물에 인접한 베이스에 제2극성의 도우펀트 레벨을 증가시키는 단계를 포함하는 바이폴라 트랜지스터의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930024947A 1992-11-24 1993-11-23 개선된 바이폴라 트랜지스터 KR940012603A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US92-07/981,188 1992-11-24
US07/981,188 US5338695A (en) 1992-11-24 1992-11-24 Making walled emitter bipolar transistor with reduced base narrowing

Publications (1)

Publication Number Publication Date
KR940012603A true KR940012603A (ko) 1994-06-23

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KR1019930024947A KR940012603A (ko) 1992-11-24 1993-11-23 개선된 바이폴라 트랜지스터

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US (1) US5338695A (ko)
EP (1) EP0600596B1 (ko)
JP (1) JP3470155B2 (ko)
KR (1) KR940012603A (ko)
DE (1) DE69332112T2 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5864162A (en) * 1993-07-12 1999-01-26 Peregrine Seimconductor Corporation Apparatus and method of making a self-aligned integrated resistor load on ultrathin silicon on sapphire
US5863823A (en) * 1993-07-12 1999-01-26 Peregrine Semiconductor Corporation Self-aligned edge control in silicon on insulator
US5930638A (en) * 1993-07-12 1999-07-27 Peregrine Semiconductor Corp. Method of making a low parasitic resistor on ultrathin silicon on insulator
US5973363A (en) * 1993-07-12 1999-10-26 Peregrine Semiconductor Corp. CMOS circuitry with shortened P-channel length on ultrathin silicon on insulator
US5581115A (en) * 1994-10-07 1996-12-03 National Semiconductor Corporation Bipolar transistors using isolated selective doping to improve performance characteristics
WO1997027630A1 (en) * 1994-10-07 1997-07-31 National Semiconductor Corporation Bipolar transistor having a collector region with selective doping profile and process for manufacturing the same
US5605849A (en) * 1994-10-07 1997-02-25 National Semiconductor Corporation Use of oblique implantation in forming base of bipolar transistor

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199380A (en) * 1978-11-13 1980-04-22 Motorola, Inc. Integrated circuit method
JPS5852339B2 (ja) * 1979-03-20 1983-11-22 富士通株式会社 半導体装置の製造方法
JPS57149770A (en) * 1981-03-11 1982-09-16 Mitsubishi Electric Corp Manufacture of semiconductor device
US4465528A (en) * 1981-07-15 1984-08-14 Fujitsu Limited Method of producing a walled emitter semiconductor device
JPS5812337A (ja) * 1981-07-16 1983-01-24 Nec Corp 半導体装置の製造方法
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
JPS5969946A (ja) * 1982-10-15 1984-04-20 Toshiba Corp 半導体集積回路及びその製造方法
US4669179A (en) * 1985-11-01 1987-06-02 Advanced Micro Devices, Inc. Integrated circuit fabrication process for forming a bipolar transistor having extrinsic base regions
KR100200058B1 (ko) * 1990-08-07 1999-06-15 클라크 3세 존 엠 반전 주입물을 분리시키는 방법
US5289024A (en) * 1990-08-07 1994-02-22 National Semiconductor Corporation Bipolar transistor with diffusion compensation

Also Published As

Publication number Publication date
DE69332112D1 (de) 2002-08-22
EP0600596A3 (en) 1995-04-19
EP0600596B1 (en) 2002-07-17
EP0600596A2 (en) 1994-06-08
JPH06216142A (ja) 1994-08-05
US5338695A (en) 1994-08-16
JP3470155B2 (ja) 2003-11-25
DE69332112T2 (de) 2003-03-20

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