DE69332112T2 - Verbesserter biolarer Transistor - Google Patents

Verbesserter biolarer Transistor

Info

Publication number
DE69332112T2
DE69332112T2 DE69332112T DE69332112T DE69332112T2 DE 69332112 T2 DE69332112 T2 DE 69332112T2 DE 69332112 T DE69332112 T DE 69332112T DE 69332112 T DE69332112 T DE 69332112T DE 69332112 T2 DE69332112 T2 DE 69332112T2
Authority
DE
Germany
Prior art keywords
biolar
transistor
improved
improved biolar
biolar transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69332112T
Other languages
English (en)
Other versions
DE69332112D1 (de
Inventor
Perumal Ratnam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE69332112D1 publication Critical patent/DE69332112D1/de
Publication of DE69332112T2 publication Critical patent/DE69332112T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004Base region of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/732Vertical transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
DE69332112T 1992-11-24 1993-10-19 Verbesserter biolarer Transistor Expired - Fee Related DE69332112T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/981,188 US5338695A (en) 1992-11-24 1992-11-24 Making walled emitter bipolar transistor with reduced base narrowing

Publications (2)

Publication Number Publication Date
DE69332112D1 DE69332112D1 (de) 2002-08-22
DE69332112T2 true DE69332112T2 (de) 2003-03-20

Family

ID=25528186

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69332112T Expired - Fee Related DE69332112T2 (de) 1992-11-24 1993-10-19 Verbesserter biolarer Transistor

Country Status (5)

Country Link
US (1) US5338695A (de)
EP (1) EP0600596B1 (de)
JP (1) JP3470155B2 (de)
KR (1) KR940012603A (de)
DE (1) DE69332112T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5973363A (en) * 1993-07-12 1999-10-26 Peregrine Semiconductor Corp. CMOS circuitry with shortened P-channel length on ultrathin silicon on insulator
US5864162A (en) * 1993-07-12 1999-01-26 Peregrine Seimconductor Corporation Apparatus and method of making a self-aligned integrated resistor load on ultrathin silicon on sapphire
US5863823A (en) * 1993-07-12 1999-01-26 Peregrine Semiconductor Corporation Self-aligned edge control in silicon on insulator
US5930638A (en) * 1993-07-12 1999-07-27 Peregrine Semiconductor Corp. Method of making a low parasitic resistor on ultrathin silicon on insulator
US5605849A (en) * 1994-10-07 1997-02-25 National Semiconductor Corporation Use of oblique implantation in forming base of bipolar transistor
US5581115A (en) * 1994-10-07 1996-12-03 National Semiconductor Corporation Bipolar transistors using isolated selective doping to improve performance characteristics
WO1997027630A1 (en) * 1994-10-07 1997-07-31 National Semiconductor Corporation Bipolar transistor having a collector region with selective doping profile and process for manufacturing the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199380A (en) * 1978-11-13 1980-04-22 Motorola, Inc. Integrated circuit method
JPS5852339B2 (ja) * 1979-03-20 1983-11-22 富士通株式会社 半導体装置の製造方法
JPS57149770A (en) * 1981-03-11 1982-09-16 Mitsubishi Electric Corp Manufacture of semiconductor device
US4465528A (en) * 1981-07-15 1984-08-14 Fujitsu Limited Method of producing a walled emitter semiconductor device
JPS5812337A (ja) * 1981-07-16 1983-01-24 Nec Corp 半導体装置の製造方法
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
JPS5969946A (ja) * 1982-10-15 1984-04-20 Toshiba Corp 半導体集積回路及びその製造方法
US4669179A (en) * 1985-11-01 1987-06-02 Advanced Micro Devices, Inc. Integrated circuit fabrication process for forming a bipolar transistor having extrinsic base regions
KR100200058B1 (ko) * 1990-08-07 1999-06-15 클라크 3세 존 엠 반전 주입물을 분리시키는 방법
US5289024A (en) * 1990-08-07 1994-02-22 National Semiconductor Corporation Bipolar transistor with diffusion compensation

Also Published As

Publication number Publication date
EP0600596A3 (de) 1995-04-19
EP0600596B1 (de) 2002-07-17
EP0600596A2 (de) 1994-06-08
JP3470155B2 (ja) 2003-11-25
KR940012603A (ko) 1994-06-23
JPH06216142A (ja) 1994-08-05
DE69332112D1 (de) 2002-08-22
US5338695A (en) 1994-08-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee