KR970054355A - 고전압용 반도체 소자 - Google Patents
고전압용 반도체 소자 Download PDFInfo
- Publication number
- KR970054355A KR970054355A KR1019950066840A KR19950066840A KR970054355A KR 970054355 A KR970054355 A KR 970054355A KR 1019950066840 A KR1019950066840 A KR 1019950066840A KR 19950066840 A KR19950066840 A KR 19950066840A KR 970054355 A KR970054355 A KR 970054355A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor device
- transistor
- lpnp
- base
- high voltage
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
본 발명은 고전압용 반도체 소자에 관한 것으로서, 다 상세하게는 레터럴(Lateral) PNP의 베이스 폭(Wb)을 증가시키지 않고 내압(BVceo) 및 전류 구동능력을 향상시키며, N웰(Well)의 확산(Diffusion) 시간없이 게이트 폴리, 에미터/컬렉터를 이용하여 레터럴 PNP 및 PMOS 반도체 소자의 전류구동능력 및 내압을 증가시킬 수 있도록 한 고전압용 반도체 소자에 관한 것이다. 이를 위한 본 발명은, LPNP 트랜지스터와 PMOS 트랜지스터 및 NPN 트랜지스터가 동시에 존재하는 반도체 소자에 있어서, 상기 LPNP 트랜지스터의 에미터/컬렉터 부분과 상기 NPN 트랜지스터의 베이스 부분 및 상기 PMOS 트랜지스터의 소오스/드레인 부분의 접합영역이 P 및 P-로 형성되어 있기 때문에 LPNP의 베이스 폭(Wb)을 증가시키지 않고 내압 및 전류 구동능력을 증진시킬 수 있는 이점을 제공한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 고전압용 반도체 소자의 구조를 도시한 단면도.
Claims (5)
- LPNP 트랜지스터와 PMOS 트랜지스터 및 NPN 트랜지스터가 동시에 존재하는 반도체 소자에 있어서, 상기 LPNP 트랜지스터의 에미터/컬렉터 부분과 상기 NPN 트랜지스터의 베이스 부분 및 상기 PMOS 트랜지스터의 소오스/드레인 부분의 접합영역이 P 및 P-로 형성되어 있는 것을 특징으로 하는 반도체 소자.
- 제1항에 있어서, 상기 LPNP 트랜지스터의 베이스 및 상기 NPN 트랜지스터의 컬렉터가 N웰 및 베이스를 셀프 얼라인(Self-Align)으로 형성되는 것을 특징으로 하는 반도체 소자.
- 제1항에 있어서, 상기 P-와 P의 베이스층이 오버랩(Overlap)되어 있는 것을 특징으로 하는 반도체 소자.
- 제1항에 있어서, 상기 LPNP 트랜지스터이 N웰과 P 및 P-를 구비하여 된 것을 특징으로 하는 반도체 소자.
- 제1항 내지 제4항 중의 어느 한 항에 있어서, 상기 N웰의 공정순서가 아이솔레이션(Isolation) 공정 또는 베이스(Base) 공정에 앞서서 진행되어 형성되는 것을 특징으로 하는 반도체 소자.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950066840A KR100190003B1 (ko) | 1995-12-29 | 1995-12-29 | 고전압용 반도체 소자 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950066840A KR100190003B1 (ko) | 1995-12-29 | 1995-12-29 | 고전압용 반도체 소자 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970054355A true KR970054355A (ko) | 1997-07-31 |
KR100190003B1 KR100190003B1 (ko) | 1999-07-01 |
Family
ID=19447469
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950066840A KR100190003B1 (ko) | 1995-12-29 | 1995-12-29 | 고전압용 반도체 소자 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100190003B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100674647B1 (ko) * | 2002-03-05 | 2007-01-25 | 매그나칩 반도체 유한회사 | 고전압용 반도체 소자의 제조 방법 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100357891B1 (ko) * | 2000-07-24 | 2002-10-25 | 임선 | 표고버섯 성분을 함유한 담배잎 제조방법 |
-
1995
- 1995-12-29 KR KR1019950066840A patent/KR100190003B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100674647B1 (ko) * | 2002-03-05 | 2007-01-25 | 매그나칩 반도체 유한회사 | 고전압용 반도체 소자의 제조 방법 |
Also Published As
Publication number | Publication date |
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KR100190003B1 (ko) | 1999-07-01 |
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