KR860001488A - 바이폴러 트랜지스터와 iil이 있는 반도체 장치 - Google Patents
바이폴러 트랜지스터와 iil이 있는 반도체 장치 Download PDFInfo
- Publication number
- KR860001488A KR860001488A KR1019850004972A KR850004972A KR860001488A KR 860001488 A KR860001488 A KR 860001488A KR 1019850004972 A KR1019850004972 A KR 1019850004972A KR 850004972 A KR850004972 A KR 850004972A KR 860001488 A KR860001488 A KR 860001488A
- Authority
- KR
- South Korea
- Prior art keywords
- region
- iil
- buried layer
- semiconductor
- bipolar transistor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims 9
- 239000000758 substrate Substances 0.000 claims 3
- 239000012535 impurity Substances 0.000 claims 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
- H01L27/0244—I2L structures integrated in combination with analog structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/764—Air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8226—Bipolar technology comprising merged transistor logic or integrated injection logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 제1의 실시예를 도시한 단면도.
제3도는 본 발명의 제2의 실시예를 도시한 단면도.
제4도는 본 발명의 제3의 실시예를 도시한 단면도.
Claims (5)
- 바이폴러 트랜지스터를 포함하는 집적회로와 IIL을 공존시킨 반도체 집적회로 장치에 있어서, 제1도전형의 반도체 기판과 그의 상부의 제2도전형 반도체층 과의 사이에 제2도전형의 매입층이 있으며, IIL영역의 매입층의 두께가 바이폴러 트랜지스터 영역의 매입층의 두께에 비해서, 제1도전형의 반도체 기판 방향으로 제1도전형의 캐리어가기 판에 도달하지 않을 정도로 큰 것을 특징으로 하는 반도체 장치.
- 상기 IIL의 영역과, 상기 바이폴러 트랜지스터 영역은 골에 의해서 분리되어 있는 것을 특징으로 하는 특허 청구의 범위 제1항 기재의 반도체 장치.
- 상기 IIL영역과 상기 바이폴러 트랜지스터 영역이 형성되는 에피택셜 성장층은, 상기 IIL영역쪽의 에피택셜성장층이 얇게 형성 되여 지는 것을 특징으로 하는 특허 청구의 범위 제2항 기재의 반도체 장치.
- 상기 IIL의 인젝터 영역과 베이스 영역과의 사이에는, 상기 IIL영역의 에피택셜 성장층 보다 불순물 농도가 높은 불순물 영역이 형성되어서 이루어지는 것을 특징으로 하는 특허 청구의 범위 제3항 기재의 반도체 장치.
- 상기 IIL영역의 매입층은 상기 바이폴로 트랜지스터 영역의 매입층보다 깊게 형성되어서 이루어지는 것을 특징으로 하는 특허 청구의 범위 제4항 기재의 반도체 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59-147535 | 1984-07-18 | ||
JP14753584A JPS6127669A (ja) | 1984-07-18 | 1984-07-18 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR860001488A true KR860001488A (ko) | 1986-02-26 |
KR920010434B1 KR920010434B1 (ko) | 1992-11-27 |
Family
ID=15432507
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019850004972A KR920010434B1 (ko) | 1984-07-18 | 1985-07-12 | 바이폴라 트랜지스터와 iil을 갖는 반도체 장치 |
Country Status (3)
Country | Link |
---|---|
US (1) | US4694321A (ko) |
JP (1) | JPS6127669A (ko) |
KR (1) | KR920010434B1 (ko) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62219636A (ja) * | 1986-03-20 | 1987-09-26 | Hitachi Ltd | 半導体装置 |
US5177584A (en) * | 1988-04-11 | 1993-01-05 | Hitachi, Ltd. | Semiconductor integrated circuit device having bipolar memory, and method of manufacturing the same |
US5244821A (en) * | 1991-06-07 | 1993-09-14 | At&T Bell Laboratories | Bipolar fabrication method |
JPH08213475A (ja) * | 1995-02-07 | 1996-08-20 | Mitsubishi Electric Corp | 半導体装置とその製造方法 |
US7064416B2 (en) * | 2001-11-16 | 2006-06-20 | International Business Machines Corporation | Semiconductor device and method having multiple subcollectors formed on a common wafer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4157268A (en) * | 1977-06-16 | 1979-06-05 | International Business Machines Corporation | Localized oxidation enhancement for an integrated injection logic circuit |
JPS5819177B2 (ja) * | 1978-07-14 | 1983-04-16 | 日本電信電話株式会社 | フレ−ム同期回路 |
US4258379A (en) * | 1978-09-25 | 1981-03-24 | Hitachi, Ltd. | IIL With in and outdiffused emitter pocket |
JPS6043024B2 (ja) * | 1978-12-30 | 1985-09-26 | 富士通株式会社 | 半導体装置の製造方法 |
-
1984
- 1984-07-18 JP JP14753584A patent/JPS6127669A/ja active Granted
-
1985
- 1985-07-12 KR KR1019850004972A patent/KR920010434B1/ko not_active IP Right Cessation
- 1985-07-17 US US06/755,912 patent/US4694321A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US4694321A (en) | 1987-09-15 |
JPH0447463B2 (ko) | 1992-08-04 |
JPS6127669A (ja) | 1986-02-07 |
KR920010434B1 (ko) | 1992-11-27 |
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FPAY | Annual fee payment |
Payment date: 19971124 Year of fee payment: 6 |
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