KR920015484A - 플루오르를 함유한 실리콘 산화막 형성방법 - Google Patents
플루오르를 함유한 실리콘 산화막 형성방법 Download PDFInfo
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- KR920015484A KR920015484A KR1019920000782A KR920000782A KR920015484A KR 920015484 A KR920015484 A KR 920015484A KR 1019920000782 A KR1019920000782 A KR 1019920000782A KR 920000782 A KR920000782 A KR 920000782A KR 920015484 A KR920015484 A KR 920015484A
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- South Korea
- Prior art keywords
- silicon oxide
- oxide film
- forming
- fluorine
- pattern
- Prior art date
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims description 14
- 229910052814 silicon oxide Inorganic materials 0.000 title claims description 14
- 229910052731 fluorine Inorganic materials 0.000 title claims 9
- 239000011737 fluorine Substances 0.000 title claims 9
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 title claims 8
- 238000000034 method Methods 0.000 title claims 8
- 230000015572 biosynthetic process Effects 0.000 title 1
- 239000000758 substrate Substances 0.000 claims 3
- 239000004952 Polyamide Substances 0.000 claims 1
- 239000004809 Teflon Substances 0.000 claims 1
- 229920006362 Teflon® Polymers 0.000 claims 1
- -1 alkoxy fluorine Chemical compound 0.000 claims 1
- 125000003545 alkoxy group Chemical group 0.000 claims 1
- 238000003780 insertion Methods 0.000 claims 1
- 230000037431 insertion Effects 0.000 claims 1
- 229920002120 photoresistant polymer Polymers 0.000 claims 1
- 229920002647 polyamide Polymers 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 239000000126 substance Substances 0.000 claims 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31625—Deposition of boron or phosphorus doped silicon oxide, e.g. BSG, PSG, BPSG
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- Computer Hardware Design (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
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- Organic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 따르는 실리콘 산화막 형성 장치를 도시하는 개략도, 제2도는 본 발명에 따라 형성된 실리콘 산화막의 적외선 흡수 스펙트럼 푸리에 변환을 도시하는 그래프.
Claims (5)
- 플루오르를 함유한 실리콘 산화막을 형성하는 방법에 있어서, 실리콘 산화막은 설정된 온도와 섭씨 200도 이하의 기판 온도에서 설정된 압력을 가진 반응실(101)내의 주성분으로서 알콕시 플루오르실레인(화학식:Fn-Si(OR)4-n, R:알콕실기, n:1내지 3의 정수)을 포함하는 증기를 포함하는 증기를 사용하여 형성되는 것을 특징으로 하는 플루오르를 함유한 실리콘 산화막 형성 방법.
- 제1항에 있어서 트리에토시플루오로시리레인(화학식:F-Si(OC2H5)3)이 알콕시플루오르실레인으로서 사용되는 것을 특징으로 하는 플루오르를 함유한 실리콘 산화막 형성 방법.
- 플루오르를 함유한 실리콘 산화막 형성 방법에 있어서, 실리콘 산화막(305)은 설정된 온도와 섭씨 150도 이하의 기판 온도에서 설정된 압력을 가진 반응실내의 주성분으로서 알콕시플루오로실레인을 포함하는 증기를 사용하여, 유기막 패턴을 제외한 일부에서 상기 유기막 패턴을 가진 기판 표면상에 선택적으로 형성되는 것을 특징으로 하는 플루오르를 함유한 실리콘 산화막 형성 방법.
- 제3항에 있어서, 상기 유기막 패턴이 포토레지스트막, 테플론막 및, 폴리마이드막중 임의의 한 막에 의해 형성되는 것을 특징으로 하는 플루오르를 함유한 실리콘 산화막 형성 방법.
- 제3항에 있어서, 상기 유기막 패턴이 반도체 기판(30)상에 형성된 배선 패턴상에 형성되며, 실리콘 산화막(306)은 상기 유기막 패턴이 제거되고 상기 실리콘산화막(306)상에 상기 유기막 패턴이 형성되지 않는 위치에서 형성된 상기 배선 패턴상의 절연 삽입층으로서 형성되는 것을 특징으로 하는 플루오르를 함유한 실리콘 산화막 형성 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP91-6312 | 1991-01-23 | ||
JP3006312A JP2697315B2 (ja) | 1991-01-23 | 1991-01-23 | フッ素含有シリコン酸化膜の形成方法 |
JP91-006312 | 1991-01-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920015484A true KR920015484A (ko) | 1992-08-27 |
KR960000376B1 KR960000376B1 (ko) | 1996-01-05 |
Family
ID=11634856
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920000782A KR960000376B1 (ko) | 1991-01-23 | 1992-01-21 | 플루오르를 함유한 실리콘 산화막 형성 방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5215787A (ko) |
EP (1) | EP0496543B1 (ko) |
JP (1) | JP2697315B2 (ko) |
KR (1) | KR960000376B1 (ko) |
DE (1) | DE69224924T2 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100364053B1 (ko) * | 1998-02-05 | 2003-02-07 | 에이에스엠 저펜 가부시기가이샤 | 반도체 기판상의 실리콘 폴리머 절연막 및 그 형성방법 |
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1991
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-
1992
- 1992-01-14 US US07/820,254 patent/US5215787A/en not_active Expired - Fee Related
- 1992-01-17 DE DE69224924T patent/DE69224924T2/de not_active Expired - Fee Related
- 1992-01-17 EP EP92300422A patent/EP0496543B1/en not_active Expired - Lifetime
- 1992-01-21 KR KR1019920000782A patent/KR960000376B1/ko not_active IP Right Cessation
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KR100364053B1 (ko) * | 1998-02-05 | 2003-02-07 | 에이에스엠 저펜 가부시기가이샤 | 반도체 기판상의 실리콘 폴리머 절연막 및 그 형성방법 |
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EP0496543B1 (en) | 1998-04-01 |
DE69224924D1 (de) | 1998-05-07 |
DE69224924T2 (de) | 1998-09-24 |
EP0496543A2 (en) | 1992-07-29 |
JP2697315B2 (ja) | 1998-01-14 |
JPH04239750A (ja) | 1992-08-27 |
EP0496543A3 (en) | 1993-10-27 |
US5215787A (en) | 1993-06-01 |
KR960000376B1 (ko) | 1996-01-05 |
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