KR910007262A - 플립플롭회로 - Google Patents
플립플롭회로 Download PDFInfo
- Publication number
- KR910007262A KR910007262A KR1019900013911A KR900013911A KR910007262A KR 910007262 A KR910007262 A KR 910007262A KR 1019900013911 A KR1019900013911 A KR 1019900013911A KR 900013911 A KR900013911 A KR 900013911A KR 910007262 A KR910007262 A KR 910007262A
- Authority
- KR
- South Korea
- Prior art keywords
- threshold
- circuit
- flip
- flop circuit
- slave
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3562—Bistable circuits of the master-slave type
- H03K3/35625—Bistable circuits of the master-slave type using complementary field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0372—Bistable circuits of the master-slave type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manipulation Of Pulses (AREA)
- Dc Digital Transmission (AREA)
- Logic Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예에 따른 플립플롭회로의 회로도,
제2도와 제3도는 제1도에 도시된 플립플롭회로의 일부를 상세하게 나타낸 회로도, 제1도에 도시된 플립플롭회로의 동작을 나타낸 신호 파형도.
Claims (1)
- 마스터-슬레이브 방식의 플립플롭회로에 있어서, 마스터단 회로(11)의 출력유지회로(13)를 구비하고, 슬레이브단회로(16)의 입력임계치에 히스테리시스특성을 갖도록 해주며, 상기 슬레이브단회로의 하이레벨임계치는 상기 유지 회로의 임계치보다 높게 설정되면서 상기 슬레이브단회로의 로우레벨임계치는 상기 유지회로의 임계치보다 낮게 설정된 것을 특징으로 하는 플립플롭회로.※ 참고사항 : 최초 출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP01-230109 | 1989-09-05 | ||
JP1230109A JP2621993B2 (ja) | 1989-09-05 | 1989-09-05 | フリップフロップ回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910007262A true KR910007262A (ko) | 1991-04-30 |
KR940005506B1 KR940005506B1 (ko) | 1994-06-20 |
Family
ID=16902703
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900013911A KR940005506B1 (ko) | 1989-09-05 | 1990-09-04 | 플립플롭회로 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5107137A (ko) |
EP (1) | EP0416576B1 (ko) |
JP (1) | JP2621993B2 (ko) |
KR (1) | KR940005506B1 (ko) |
DE (1) | DE69024431T2 (ko) |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5305451A (en) * | 1990-09-05 | 1994-04-19 | International Business Machines Corporation | Single phase clock distribution circuit for providing clock signals to multiple chip integrated circuit systems |
JP2562995B2 (ja) * | 1990-11-27 | 1996-12-11 | 三菱電機株式会社 | データ処理回路の制御方法 |
JPH04239810A (ja) * | 1991-01-23 | 1992-08-27 | Nec Ic Microcomput Syst Ltd | 単相スタティックラッチ回路 |
JP3225528B2 (ja) * | 1991-03-26 | 2001-11-05 | 日本電気株式会社 | レジスタ回路 |
JPH04349715A (ja) * | 1991-05-28 | 1992-12-04 | Sharp Corp | タイマ回路 |
TW198159B (ko) * | 1991-05-31 | 1993-01-11 | Philips Gloeicampenfabrieken Nv | |
WO1993019529A1 (en) * | 1992-03-19 | 1993-09-30 | Vlsi Technology Inc. | Asynchronous-to-synchronous synchronizers, particularly cmos synchronizers |
US5194768A (en) * | 1992-03-27 | 1993-03-16 | Advanced Micro Devices, Inc. | Apparatus for filtering noise from a periodic signal |
US5646547A (en) * | 1994-04-28 | 1997-07-08 | Xilinx, Inc. | Logic cell which can be configured as a latch without static one's problem |
JP2985554B2 (ja) * | 1993-02-03 | 1999-12-06 | 日本電気株式会社 | 記憶回路 |
JP2853726B2 (ja) * | 1993-12-29 | 1999-02-03 | 日本電気株式会社 | D型フリップフロップ回路 |
JP3626757B2 (ja) * | 1994-07-05 | 2005-03-09 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | マスタ−スレーブフリップフロップを具える電子回路及びその試験方法 |
JP2713182B2 (ja) * | 1994-09-26 | 1998-02-16 | 日本電気株式会社 | レシーバ装置 |
US5612632A (en) * | 1994-11-29 | 1997-03-18 | Texas Instruments Incorporated | High speed flip-flop for gate array |
EP0786170A1 (en) * | 1995-08-14 | 1997-07-30 | Koninklijke Philips Electronics N.V. | Mos master-slave flip-flop with reduced number of pass gates |
US5894434A (en) * | 1995-12-22 | 1999-04-13 | Texas Instruments Incorporated | MOS static memory array |
US6002284A (en) * | 1996-04-24 | 1999-12-14 | Texas Instruments Incorporated | Split-slave dual-path D flip flop |
US5949265A (en) * | 1997-10-31 | 1999-09-07 | International Business Machines Corporation | Soft latch circuit having sharp-cornered hysteresis characteristics |
US6188260B1 (en) * | 1999-01-22 | 2001-02-13 | Agilent Technologies | Master-slave flip-flop and method |
US6417711B2 (en) * | 1999-10-19 | 2002-07-09 | Honeywell Inc. | High speed latch and flip-flop |
JP2001285034A (ja) * | 2000-03-29 | 2001-10-12 | Ando Electric Co Ltd | D−ff回路 |
JP4031901B2 (ja) * | 2000-07-19 | 2008-01-09 | 株式会社東芝 | 固体撮像装置 |
JP3696501B2 (ja) * | 2000-12-08 | 2005-09-21 | シャープ株式会社 | 半導体集積回路 |
JP4218221B2 (ja) * | 2001-04-02 | 2009-02-04 | 富士電機デバイステクノロジー株式会社 | 電力変換器の駆動回路 |
US6456136B1 (en) * | 2001-04-13 | 2002-09-24 | Sun Microsystems, Inc. | Method and apparatus for latching data within a digital system |
JP2005160088A (ja) * | 2003-11-27 | 2005-06-16 | Samsung Electronics Co Ltd | パルスベースフリップフロップ |
FR2868205B1 (fr) * | 2004-03-29 | 2006-05-26 | Soisic Sa | Procede de reduction du bruit de phase d'un circuit soi de type maitre-esclave |
TW200535857A (en) * | 2004-04-20 | 2005-11-01 | Innolux Display Corp | Dynamic shift register |
JP2005341354A (ja) * | 2004-05-28 | 2005-12-08 | Nec Electronics Corp | 半導体集積回路 |
FR2884988A1 (fr) * | 2005-04-22 | 2006-10-27 | St Microelectronics Sa | Bascule protegee contre les pics de courant ou de tension |
WO2007148156A1 (en) * | 2006-06-20 | 2007-12-27 | Freescale Semiconductor, Inc. | Device and method for hadling metastable signals |
JP5211310B2 (ja) * | 2007-03-07 | 2013-06-12 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 半導体集積回路 |
JP2009105848A (ja) * | 2007-10-25 | 2009-05-14 | Mitsumi Electric Co Ltd | 論理ゲート及びこれを用いた半導体集積回路装置 |
CN104300940B (zh) * | 2014-10-01 | 2017-05-03 | 黑龙江大学 | 利用电路三要素理论的主从跟随器型单边沿k值触发器的构建方法及其电路 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5877317A (ja) * | 1981-11-02 | 1983-05-10 | Matsushita Electric Ind Co Ltd | シユミツト・トリガ回路 |
US4495628A (en) * | 1982-06-17 | 1985-01-22 | Storage Technology Partners | CMOS LSI and VLSI chips having internal delay testing capability |
US4495629A (en) * | 1983-01-25 | 1985-01-22 | Storage Technology Partners | CMOS scannable latch |
US4554467A (en) * | 1983-06-22 | 1985-11-19 | Motorola, Inc. | CMOS Flip-flop |
US4539489A (en) * | 1983-06-22 | 1985-09-03 | Motorola, Inc. | CMOS Schmitt trigger circuit |
GB2174856A (en) * | 1985-05-08 | 1986-11-12 | Racal Microelect System | Hysteresis latch arrangement |
JPS6295016A (ja) * | 1985-10-21 | 1987-05-01 | Mitsubishi Electric Corp | ラツチ回路 |
JPS63161719A (ja) * | 1986-12-24 | 1988-07-05 | Mitsubishi Electric Corp | ラツチ回路 |
JPH0691431B2 (ja) * | 1987-03-02 | 1994-11-14 | 沖電気工業株式会社 | フリツプフロツプ回路用クロツク制御回路 |
JP2549109B2 (ja) * | 1987-03-26 | 1996-10-30 | 株式会社東芝 | 半導体回路 |
US4820939A (en) * | 1987-11-24 | 1989-04-11 | National Semiconductor Corporation | Finite metastable time synchronizer |
US5015875A (en) * | 1989-12-01 | 1991-05-14 | Motorola, Inc. | Toggle-free scan flip-flop |
-
1989
- 1989-09-05 JP JP1230109A patent/JP2621993B2/ja not_active Expired - Fee Related
-
1990
- 1990-09-04 KR KR1019900013911A patent/KR940005506B1/ko not_active IP Right Cessation
- 1990-09-04 US US07/576,940 patent/US5107137A/en not_active Expired - Lifetime
- 1990-09-05 DE DE69024431T patent/DE69024431T2/de not_active Expired - Fee Related
- 1990-09-05 EP EP90117070A patent/EP0416576B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0416576A3 (en) | 1992-04-01 |
DE69024431D1 (de) | 1996-02-08 |
JPH0393310A (ja) | 1991-04-18 |
DE69024431T2 (de) | 1996-06-05 |
US5107137A (en) | 1992-04-21 |
EP0416576A2 (en) | 1991-03-13 |
JP2621993B2 (ja) | 1997-06-18 |
KR940005506B1 (ko) | 1994-06-20 |
EP0416576B1 (en) | 1995-12-27 |
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Legal Events
Date | Code | Title | Description |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20030530 Year of fee payment: 10 |
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LAPS | Lapse due to unpaid annual fee |